Song Ruo Jing
202b18b5fa
esp_clk_tree: Rename clk_tree_xxx to esp_clk_tree_xxx, add compilation warning to clk_tree.h
2023-04-27 11:11:18 +00:00
cje
93eeb4265c
fix chip broken bug when run in monitor mode of S2 and modify voltage param to fit all sleep mode of S2/C2/C3
2023-04-24 10:37:57 +08:00
Marius Vikhammer
a5c70c24e5
Merge branch 'bugfix/memprot_cleanup_iram_attr' into 'master'
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memprot: move memprot functions out of IRAM
See merge request espressif/esp-idf!20697
2023-03-28 10:18:22 +08:00
Jiang Jiang Jian
73c06b5039
Merge branch 'bugfix/sleep_current_issue_caused_by_sar_adc' into 'master'
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sleep current issue caused by sar adc
Closes IDF-6111 and WIFI-4370
See merge request espressif/esp-idf!22769
2023-03-17 17:32:59 +08:00
Marius Vikhammer
43784e7a24
memprot: move memprot functions out of IRAM
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Memprot functions are no longer placed by default in IRAM,
selecting ESP_PANIC_HANDLER_IRAM will still force panic related memprot
functions to be placed in IRAM.
2023-03-17 14:51:20 +08:00
Li Shuai
a25ce78392
sleep: fix sleep current issue caused by sar adc
2023-03-17 13:06:39 +08:00
liuning
14ca81f03f
rtc_sleep: workaround systimer stall issue during lightsleep on ESP32C3
2023-03-15 20:33:03 +08:00
jingli
cb0f517fe3
soc/soc_caps: update soc caps for chips that support power-down of modem hardware
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Closes WIFI-4424
2023-03-10 14:15:27 +08:00
Sachin Parekh
7bd5d93905
esp_hw_support: Move cpu protection in port files
2023-03-09 11:37:29 +05:30
Song Ruo Jing
1a66459b44
usb_serial_jtag: Improve the code for the issue of usb cdc device unable to work during sleep
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1. Remove RTC_CLOCK_BBPLL_POWER_ON_WITH_USB Kconfig option
During sleep, BBPLL clock always gets disabled
esp_restart does not disable BBPLL clock, so that first stage bootloader log can be printed
2. Add a new Kconfig option PM_NO_AUTO_LS_ON_USJ_CONNECTED
When this option is selected, IDF will constantly monitor USB CDC port connection status.
As long as it gets connected to a HOST, automatic light-sleep will not happen.
Closes https://github.com/espressif/esp-idf/issues/8507
2023-02-27 12:10:49 +08:00
Armando (Dou Yiwen)
4452a3cf3e
Merge branch 'feature/support_h2_adc' into 'master'
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adc: support adc h2
Closes IDF-6124, IDF-6214, IDF-6543, IDF-6215, IDF-6664, and IDF-6695
See merge request espressif/esp-idf!22205
2023-02-24 14:28:33 +08:00
Armando
c2d5c19b28
adc: ll enum renaming
2023-02-23 11:48:31 +08:00
jingli
4c3d1e24d7
codeclean: remove unused sleep related functions
2023-02-23 11:36:13 +08:00
wuzhenghui
a5467f42a0
codeclean: only S series chip VDDSDIO is configurable
2023-01-31 22:12:58 +08:00
Song Ruo Jing
2c9aa4559c
clk_tree: Add a general API to get the frequency of different clocks
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Add basic clk_tree driver and hal implementation.
2023-01-17 11:30:24 +08:00
Armando (Dou Yiwen)
d1b8da74d8
Merge branch 'refactor/improve_adc_power_maintanance' into 'master'
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adc: improve adc power maintanance
Closes IDF-6114 and IDF-6318
See merge request espressif/esp-idf!21151
2023-01-12 20:30:36 +08:00
jiangguangming
4b4491e736
rtc_time.c: simplify the rtc_time_get with LL function
2023-01-10 17:03:54 +08:00
Armando
5be3c21cfc
adc: improve power logic
2023-01-09 17:10:04 +08:00
Armando
f9da48d94f
rtc: add pwdet and sar adc power related low level func
2023-01-09 17:09:01 +08:00
morris
672ac58ad5
io_mux: can set different clock source
2022-12-29 14:46:16 +08:00
Song Ruo Jing
182e937c5a
clk_tree: Add basic clock support for esp32c6
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- Support SOC ROOT clock source switch
- Support CPU frequency change
- Support RTC SLOW clock source switch
- Support RTC SLOW clock + RC FAST calibration
Remove FPGA build for esp32c6
2022-12-13 19:18:34 +08:00
KonstantinKondrashov
741e89cbaa
esp_hw_support: Removes efuse dependency
2022-11-25 19:27:33 +08:00
Aditya Patwardhan
f79d8f9c07
esp_hw_support: Merge esp_ds.c file for different targets into one
2022-11-24 16:03:30 +05:30
Aditya Patwardhan
6a75fe5912
esp_hw_support: Update build system support for mergin esp_ds.c files
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into one
2022-11-24 16:03:23 +05:30
Aditya Patwardhan
efd05fdebb
esp32c3/esp_ds.c: Fix RSA_LEN_MAX variable
2022-11-24 15:53:51 +05:30
KonstantinKondrashov
244cf14ea8
esp_hw_support: Adds APIs to define user own MAC addresses without generation from the base MAC address
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Closes https://github.com/espressif/esp-idf/pull/7261
Closes https://github.com/espressif/esp-idf/issues/9531
2022-11-16 19:23:10 +08:00
KonstantinKondrashov
1f9260d790
all: Apply new version logic (major * 100 + minor)
2022-11-03 08:36:23 +00:00
Armando
260ee86c37
rtc: united sar peripheral control
2022-10-27 16:51:25 +08:00
Aditya Patwardhan
f9565fd31d
soc/esp_ds.h: Unify esp_ds error codes for all targets
2022-10-27 11:09:25 +05:30
Aditya Patwardhan
c8a788ca24
esp_hw_support: Merge HMAC source files into one
2022-10-27 10:59:54 +05:30
wuzhenghui
6b96534c68
bugfix: esprv_intc_int_set_type() should not use bitmap parameter
2022-10-14 11:31:22 +08:00
cje
4dddb6d8e8
fix system not stable bug when dbias storing in efuse is bigger than 27
2022-09-30 19:24:51 +08:00
jingli
05a2fbe810
esp_hw_support/clk_cali: fix xtal32k error detect
2022-09-21 03:03:25 +00:00
songruojing
e8915e14e7
esp_hw_support: fix wrong register access to set/clear rtc fast mem low power mode on c3 and h2
2022-08-03 14:33:13 +08:00
Armando
5e6a16380a
esp_adc: move adc common hw related code into esp_hw_support
2022-07-28 03:49:48 +00:00
morris
5e50ec1d66
systimer: add helper functions to convert between tick and us
2022-07-25 16:08:52 +08:00
Guillaume Souchere
0bac33ed41
esp_system: Remove deprecate section from esp_cpu.h
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- Remove esp_cpu_in_ocd_mode() from esp_cpu.h. Users should call esp_cpu_dbgr_is_attached() instead.
- Remove esp_cpu_get_ccount() from esp_cpu.h. Users should call esp_cpu_get_cycle_count() instead.
- Remove esp_cpu_set_ccount() from esp_cpu.h. Users should call esp_cpu_set_cycle_count() instead.
- Other IDF components updated to call esp_cpu_dbgr_is_attached(), esp_cpu_get_cycle_count() and esp_cpu_set_cycle_count() as well.
2022-07-22 00:06:06 +08:00
Guillaume Souchere
6005cc9163
hal: Deprecate interrupt_controller_hal.h, cpu_hal.h and cpu_ll.h interfaces
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This commit marks all functions in interrupt_controller_hal.h, cpu_ll.h and cpu_hal.h as deprecated.
Users should use functions from esp_cpu.h instead.
2022-07-22 00:06:06 +08:00
Martin Vychodil
0c87ae2a91
System/Security: Memprot API unified (ESP32S3)
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Added missing features and improvements
2022-07-09 22:57:51 +02:00
KonstantinKondrashov
0f8ff5aa15
efuse: Adds major and minor versions and others
2022-07-05 14:38:27 +08:00
Omar Chebib
cd48baf979
Refactor: move regi2c_*.h header files from esp_hw_support to soc component
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When creating G0 layer, some regi2c_*.h headers were moved out from
esp_hw_support (G1) to soc (G0). In order to be consistent with that change,
move all the remaining regi2c_*.h headers to soc too.
2022-06-30 09:40:44 +00:00
morris
7fd9a91034
dma: move from driver to hw_support
2022-06-28 14:17:12 +08:00
Omar Chebib
8fae0f0753
G0: Support Xtensa targets for G0-only compilation
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G0-only example now supports Xtensa targets. This means that G0 layer
does not depend on G1+ layers anymore
2022-06-20 11:34:20 +00:00
Martin Vychodil
339fcbf14d
System/Security: Memprot API unified (ESP32S3)
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Unified Memory protection API for all PMS-aware chips - ESP32S3 port
2022-06-20 02:36:44 +00:00
Omar Chebib
752026a174
Merge branch 'refactor/remove_g0_dep_on_g1_riscv' into 'master'
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G0: RISC-V targets have now an independent G0 layer
See merge request espressif/esp-idf!17926
2022-06-16 11:53:39 +08:00
Darian
e213e66ba3
Merge branch 'refactor/esp_hw_support_cpu' into 'master'
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esp_hw_support: Add new esp_cpu.h abstraction
Closes IDF-4769
See merge request espressif/esp-idf!17091
2022-06-14 21:11:30 +08:00
Omar Chebib
2fd784c97a
G0 RISC-V: Remove "private_include/regi2c_brownout.h" header as it has been moved and simplify "regi2c_ctrl.h"
2022-06-14 15:00:53 +08:00
Omar Chebib
5bcd9b2db8
G0: RISC-V targets have now an independent G0 layer
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G0 doesn't depend on any G1+ layer for RISC-V based targets
2022-06-14 15:00:53 +08:00
Darian Leung
61eb7baa6b
esp_hw_support: Add esp_cpu.h abstraction and API
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This commit updates the esp_cpu.h API. The new API presents a new
abstraction of the CPU where CPU presents the following interfaces:
- CPU Control (to stall/unstall/reset the CPU)
- CPU Registers (to read registers commonly used in SW such as SP, PC)
- CPU Interrupts (to inquire/allocate/control the CPUs 32 interrupts)
- Memory Port (to configure the CPU's memory bus for memory protection)
- Debugging (to configure/control the CPU's debugging port)
Note: Also added FORCE_INLINE_ATTR to the DoxyFile in order to pass doc
builds for esp_cpu.h
2022-06-14 14:30:58 +08:00
Darian Leung
556ec30457
esp_hw_support: Rename cpu_util.c to cpu.c
2022-06-14 14:30:57 +08:00