10 Commits

Author	SHA1	Message	Date
morris	1560d6f1ba	soc: add reset reasons in soc component	2021-07-13 10:45:38 +08:00
Anton Maklakov	b46b50eaa6	newlib: Add ESP_ROM_HAS_RETARGETABLE_LOCKING capability for C3 and S3 chips	2021-06-07 12:53:45 +07:00
Michael (XIAO Xufeng)	a0d13a31ec	uart: fix misleading files for UART2 ... Includes: header files, ld files and clk.c ESP32-C3 only have UART0 and UART1.	2021-04-27 17:40:19 +08:00
KonstantinKondrashov	95564b4687	secure_boot: Secure Boot V2 verify app signature on update (without Secure boot) ... - ESP32 ECO3, ESP32-S2/C3/S3	2021-03-15 12:30:20 +00:00
morris	0f5d1c1c46	rtc: supported disable rom log temporarily	2021-02-22 20:56:43 +08:00
KonstantinKondrashov	43ebb8ea61	efuse: Updates description of uart_print_control efuse	2021-02-08 18:02:55 +08:00
KonstantinKondrashov	98f726fa4b	bootloader/esp32c3: Adds secure boot (not yet supported)	2021-01-19 20:51:13 +08:00
Chen Jian Xing	5b44295cb9	esp_wifi: fix esp32c3 code issues ... 1. enable wifi clk and rm dport header 2.syn phy_init_data.h from esp32	2021-01-10 16:16:28 +08:00
Angus Gratton	a5aac93051	esp_rom: Small changes for esp32c3 support ... Updated from internal commit 6d894813	2020-12-24 13:40:01 +11:00
Angus Gratton	b68094199f	esp_rom: Add initial ESP32-C3 support ... From internal commit 7761d6e8	2020-11-30 11:12:56 +11:00