Without this include it fails to compile with this error:
```
esp/esp-idf-v5.2/components/esp_rom/include/esp32/rom/uart.h:262:32: error: implicit declaration of function 'UART_STATUS_REG' [-Werror=implicit-function-declaration]
262 | status = READ_PERI_REG(UART_STATUS_REG(uart_no));
```
Merges https://github.com/espressif/esp-idf/pull/13025
update esp32 bt-lib (952debf4)
1. Increased the length of queue for coexist requestions
2. fix(bt/controller): Cleared BT SNIFF when no connections exists
3. fix(bt/controller): Corrected a typo in coex module
This commit introduce SOC_MEM_NON_CONTIGUOUS_SRAM flag (that enebled for
esp32p4). If SOC_MEM_NON_CONTIGUOUS_SRAM is enabled:
- LDFLAGS+=--enable-non-contiguous-regions
- ldgen.py replaces "arrays[*]" from sections.ld.in with objects under
SURROUND keyword. (e.g. from linker.lf: data -> dram0_data SURROUND(foo))
- "mapping[*]" - refers to all other data
If SOC_MEM_NON_CONTIGUOUS_SRAM, sections.ld.in file should contain at
least one block of code like this (otherwise it does not make sense):
.dram0.bss (NOLOAD) :
{
arrays[dram0_bss]
mapping[dram0_bss]
} > sram_low
.dram1.bss (NOLOAD) :
{
/* do not place here arrays[dram0_bss] because it may be splited
* between segments */
mapping[dram0_bss]
} > sram_high
This commit fixes the following build issues when CONFIG_ESP_CONSOLE_NONE is
enabled:
- vfs_console.c will attempt to register a VFS entry for STDIO console even if
CONFIG_ESP_CONSOLE_NONE is enabled. This results in "undeclared `primary_path`"
error.
- esp_console_repl_chpi.c does not use "TAG" when CONFIG_ESP_CONSOLE_NONE is
enabled, leading to a "defined by not used" warning.
Closes https://github.com/espressif/esp-idf/issues/12984
According to the application note in SD Card Physical Specification:
> The host shall set ACMD41 timeout more than 1 second to abort repeat
of issuing ACMD41 when the card does not indicate ready. The timeout
count starts from the first ACMD41 which is set voltage window
in the argument.
Previously, the timeout was exactly one second, and this caused
certain larger-capacity cards to "time out", because they couldn't
finish initialization process in time.
ACMD41 argument is different between SD mode and SPI mode.
In SPI mode, the only non-zero bit may be the HCS bit. Unlike the SD
mode, the bits reflecting the host's OCR should be zero.
Previously, we used to set these bits the same way as for the SD mode.
This has caused certain cards to fail initializing, apparently their
controllers have checked the ACMD41 argument more strictly and refused
to finish initialization, resulting in an error such as
sdmmc_common: sdmmc_init_ocr: send_op_cond (1) returned 0x107
(Note that this error may have other causes than the one fixed in
this commit. For example, if the card doesn't have a sufficient and
stable power supply, it may also fail to complete the internal
initialization process, and will never clear the busy flag in R1
response.)
Closes https://github.com/espressif/esp-idf/issues/6686
Closes https://github.com/espressif/esp-idf/issues/10542
This commit added the RISC-V utility functions to set the interrupt
threshold for CLIC targets by using direct register value writes.
This makes the functions more efficient during run-time.
This is done to improve the critical section enter and exit performance on esp32p4.
fix(ble/bluedroid): Update maximum BLE reconnection attempts configuration
Closes BLERP-568, BLERP-581, and BLERP-582
See merge request espressif/esp-idf!29186
This commit updates the Panic handler behavior Kconfig setting to make
the GDBStub on Panic (CONFIG_ESP_SYSTEM_PANIC_GDBSTUB) option to be only
available when esp_gdbstub is part of the component list of the build.
Closes https://github.com/espressif/esp-idf/issues/13218
- The ROM text and data sections share the address range
(see SOC_I/DROM_MASK_LOW - SOC_I/DROM_MASK_HIGH).
- Initially, we had two PMP entries for this address range - one marking the
region as RX and the other as R.
- However, the latter entry is redundant as the former locks the PMP settings.
- We can divide the ROM region into text and data sections later when we
define boundaries marking these regions from the ROM.
The issue is `esp_flash_write_encryped` function in ROM on ESP32C3, ESP32S3
calls legacy implementation, which uses old configuration. And this causes
write fails.
The solution in this commit is to compile and link this function(and related)
in IRAM instead of the ROM one.
The IRAM cost increases around 1.2KB after the fix
