Commit Graph

2088 Commits

Author SHA1 Message Date
Armando (Dou Yiwen)
ad747b237a Merge branch 'toos/add_s3_ut_based_on_quad_octal_psram' into 'master'
ci: add s3 ut based on quad octal psram

See merge request espressif/esp-idf!18087
2022-05-16 09:57:21 +08:00
Armando
591d45151d psram: add quad mode kconfig macro on 32/s2 2022-05-12 21:36:18 +08:00
Michael (XIAO Xufeng)
76a46a939c Kconfig: remove misleading psram name IS25WP032 in the Kconfig option
Closes: https://github.com/espressif/esp-idf/issues/8863
2022-05-06 22:56:53 +08:00
Marius Vikhammer
d2872095f9 soc: moved kconfig options out of the target component.
Moved the following kconfig options out of the target component:
 * CONFIG_ESP*_DEFAULT_CPU_FREQ* -> esp_system
 * ESP*_REV_MIN -> esp_hw_support
 * ESP*_TIME_SYSCALL -> newlib
 * ESP*_RTC_* -> esp_hw_support

Where applicable these target specific konfig names were merged into
a single common config, e.g;
CONFIG_ESP*_DEFAULT_CPU_FREQ -> CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ
2022-04-21 12:09:43 +08:00
Omar Chebib
9380fd6bee G0: remove components/esp32* dependency on efuse component 2022-03-30 11:40:37 +08:00
Marius Vikhammer
29db173536 Merge branch 'feature/move_target_kconfig' into 'master'
system: move kconfig options out of target component

See merge request espressif/esp-idf!16893
2022-03-03 09:39:54 +08:00
Omar Chebib
2571aaf3c9 G0: target component (components/esp32*) doesn't depend on driver anymore 2022-03-02 04:21:00 +00:00
Marius Vikhammer
bb88338118 system: move kconfig options out of target component
Moved the following kconfig options out of the target component:
 * ESP32_X_BROWNOUT_* -> esp_system
 * ESP32_X_DEBUG_OCDAWARE -> esp_system
 * APP_NO_BLOBS -> build type (main kconfig)
2022-03-02 01:22:26 +00:00
Marius Vikhammer
edb76f14d6 esp_timer: remove legacy ESP32 FRC timer implementation. 2022-02-10 15:17:49 +08:00
Sudeep Mohanty
2fc9bd61bf ulp: refactor ulp component
This commit refactors the ulp component.
Files are now divided based on type of ulp, viz., fsm or risc-v.
Files common to both are maintained in the ulp_common folder.

This commit also adds menuconfig options for ULP within the ulp
component instead of presenting target specific configuations for ulp.
2022-01-27 11:54:42 +05:30
Marius Vikhammer
6fbef44ffc rom: remove deprecated headers from esp32 components
These have been replaced by headers in the esp_rom component.
2021-12-14 09:48:11 +08:00
Roland Dobai
766aa57084 Build & config: Remove leftover files from the unsupported "make" build system 2021-11-11 15:32:36 +01:00
baohongde
b310c062cd components/bt: move config BT_RESERVE_DRAM from bluedroid to ESP32 controller 2021-09-16 20:26:35 +08:00
Marius Vikhammer
4869b3cd4a WDT: Add support for XTAL32K Watchdog timer 2021-09-02 09:09:00 +08:00
SalimTerryLi
2347e68e6b
soc: move peripheral linker scripts out of target component 2021-07-22 12:55:01 +08:00
morris
2058e89448 Merge branch 'feature/fpga_bootloader' into 'master'
Boot ESP32 & ESP32-S2 apps on FPGA

See merge request espressif/esp-idf!8270
2021-07-18 08:06:38 +00:00
Angus Gratton
9d6366f290 esp_hw_support: Move rtc.h header from target components 2021-07-16 20:14:28 +08:00
Renz Bagaporo
b06dba7823 esp32: move app linker scripts 2021-07-16 20:14:27 +08:00
Renz Bagaporo
fddc0b6799 esp32: move remaining tests 2021-07-16 20:14:27 +08:00
Renz Bagaporo
7c22cccb9c esp32: cleanup build script 2021-07-16 20:14:27 +08:00
Renz Bagaporo
844af01eb4 esp32: move spiram, himem 2021-07-16 20:14:26 +08:00
Renz Bagaporo
452bfda367 esp32: move dport_access 2021-07-16 20:14:26 +08:00
Renz Bagaporo
702e41e1c8 esp32s2: move crypto related functions 2021-07-16 20:14:26 +08:00
Angus Gratton
c5d20dc231 fpga: Disable BOD when running on FPGA 2021-07-16 10:50:06 +10:00
Angus Gratton
1a626ef6ca esp32: App can boot on FPGA image
Includes fix for detecting ESP32 ECO3 on FPGA
2021-07-16 10:50:06 +10:00
Marius Vikhammer
05bb4a5d89 bootloader: disable psram cache bug fix for bootloader
The psram cache bug fix was also being applied to the bootloader binary (for cmake),
which doesnt do any psram access.

Applying this fix would increase the binary size, as much as 300 bytes in worst case scenarios
2021-07-13 16:28:22 +08:00
Ivan Grokhotkov
a6c721b24c esp32[s2,s3]: fix _flash_rodata_align value in the linker scripts
Regression from 4702feeee. The TLS segment is located inside
.flash.rodata, so we need to get the alignment of that section, not
.flash.rodata_noload.
2021-07-01 16:13:31 +02:00
Zhang Jun Hao
4702feeeeb esp_wifi: move unused wifi log to noload section to save binary size 2021-07-01 10:18:37 +08:00
Omar Chebib
da731a7eeb psram: add configuration macros to move workaround libc functions to flash
Workaround libc can be moved to flash thanks to KConfig macros.
However, the following functions: `itoa`, `memcmp`, `memcpy`, `memset`, `strcat`, `strcmp`, and `strlen` are always kept it in IRAM.
2021-06-23 17:40:02 +08:00
Angus Gratton
6961e4b3d5 Merge branch 'bugfix/ulp_overflow_rtc_mem' into 'master'
ulp: ULP_COPROC_RESERVE_MEM limitation

See merge request espressif/esp-idf!13814
2021-06-08 07:20:46 +00:00
Jan Brudný
325deed208 esp32: update copyright notice 2021-06-04 11:51:06 +02:00
Marius Vikhammer
018582dc64 ULP: reduce max possible memory reserved for ULP coprocessor
Some RTC slow memory is reserved by IDF, reduce CONFIG_TARGET_ULP_COPROC_RESERVE_MEM
range to reflect this.

Closes https://github.com/espressif/esp-idf/issues/7073
2021-06-04 12:15:52 +08:00
Darian Leung
787873b86b freertos: Fix CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY description
This commit fixes the ambiguity in the description of the
SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY configuration option.
2021-05-26 21:04:28 +08:00
Angus Gratton
ede477ea65 paritition_table: Verify the partition table md5sum when loading the app
Additionally, always enable the partition MD5 check if flash encryption is on in
Release mode. This ensures the partition table ciphertext has not been modified
(CVE-2021-27926).

The exception is pre-V3.1 ESP-IDF bootloaders and partition tables, which
don't have support for the MD5 entry.
2021-05-18 01:32:59 +00:00
Angus Gratton
262ab9f4c2 Merge branch 'feature/esp32_pico_v3' into 'master'
esp32/psram: ESP32-PICO-V3 does not have PSRAM and does not support external PSRAM

Closes IDF-1845

See merge request espressif/esp-idf!13419
2021-05-17 09:01:45 +00:00
Takao Akaki
897496dd73 Can't use spiram.h functions when building with cpp.
Merges https://github.com/espressif/esp-idf/pull/6658
2021-05-05 15:23:35 +02:00
KonstantinKondrashov
f35356f69d esp32/psram: ESP32-PICO-V3 does not have PSRAM and does not support external PSRAM 2021-05-04 10:49:25 +08:00
David Čermák
7f34657013 Merge branch 'feature/ethernet_link_check_esp_timer' into 'master'
esp_eth: using esp_timer to check link status

Closes IDFGH-4953

See merge request espressif/esp-idf!13155
2021-04-22 06:08:00 +00:00
Ivan Grokhotkov
0535195983 freertos: fix TLS run-time address calculation
Since dd849ffc, _rodata_start label has been moved to a different
linker output section from where the TLS templates (.tdata, .tbss)
are located. Since link-time addresses of thread-local variables are
calculated relative to the section start address, this resulted in
incorrect calculation of THREADPTR/$tp registers.

Fix by introducing new linker label, _flash_rodata_start, which points
to the .flash.rodata output section where TLS variables are located,
and use it when calculating THREADPTR/$tp.

Also remove the hardcoded rodata section alignment for Xtensa targets.
Alignment of rodata can be affected by the user application, which is
the issue dd849ffc was fixing. To accommodate any possible alignment,
save it in a linker label (_flash_rodata_align) and then use when
calculating THREADPTR. Note that this is not required on RISC-V, since
this target doesn't use TPOFF.
2021-04-21 13:45:21 +02:00
morris
c833ec5533 global: remove esp_ssc.h 2021-04-21 13:08:07 +08:00
Omar Chebib
dd849ffc26 build: (Custom) App version info is now on a dedicated section, independent of the rodata alignment
It is now possible to have any alignment restriction on rodata in the user
applicaiton. It will not affect the first section which must be aligned
on a 16-byte bound.

Closes https://github.com/espressif/esp-idf/issues/6719
2021-04-19 12:53:08 +08:00
Omar Chebib
cd79f3907d gpio: Disable USB JTAG when setting pins 18 and 19 as GPIOs on ESP32C3
When `DIS_USB_JTAG` eFuse is NOT burned (`False`), it is not possible
to set pins 18 and 19 as GPIOs. This commit solves this by manually
disabling USB JTAG when using pins 18 or 19.
The functions shall use `gpio_hal_iomux_func_sel` instead of
`PIN_FUNC_SELELECT`.
2021-04-08 14:01:18 +08:00
Renz Bagaporo
daa13b3f62 esp32: move toolchain check 2021-03-31 19:17:33 +08:00
Renz Bagaporo
a202a604d8 esp32: move system libs 2021-03-31 19:17:33 +08:00
Renz Bagaporo
bbc599493e esp32: move common fragment definitions 2021-03-31 19:17:33 +08:00
Renz Bagaporo
1b4e4c37b7 esp32: remove deprecated esp_intr.h 2021-03-31 19:17:33 +08:00
Renz Bagaporo
9478298aa4 esp32: move mac target specific configs 2021-03-31 19:17:33 +08:00
Renz Bagaporo
e6edf34e82 esp32: move esp_clk functions 2021-03-31 19:17:33 +08:00
Renz Bagaporo
a7bac58480 esp32: move system api to esp_system 2021-03-31 19:13:03 +08:00
Renz Bagaporo
393bd64a1e esp32: move crosscore int 2021-03-31 19:13:03 +08:00