found small mistake in it
we have:
PROVIDE ( ets_aes_crypt = 0x4005c9b8 );
PROVIDE ( ets_aes_disable = 0x4005c8f8 );
PROVIDE ( ets_aes_enable = 0x4005c8cc );
PROVIDE ( ets_aes_set_endian = 0x4005c928 );
PROVIDE ( ets_aes_setkey_dec = 0x4005c994 );
PROVIDE ( ets_aes_setkey_enc = 0x4005c97c );
Signed-off-by: Ivan Grokhotkov <ivan@espressif.com>
update ld and heap region
Divide origin fpga ld to several lds, choose specific ld for normal/BT/Trace by menuconfig, change iram/dram len in ld to full use hardware ram region.
See merge request !28
Fix dualcore startup
This MR includes:
- a workaround for a hardware bug with cache initialization
- fix of `#if CONFIG_WIFI_ENABLED` block in cpu_start.c for the case when WiFi is disabled.
- removal of miscellaneous delays in cpu_start.c
See merge request !22
This change removes various delays in PRO and APP CPU startup paths.
Also some unused code and ets_printf statements are cleaned up or removed.
2nd CPU now communicates that it has started through a global variable.
