Commit Graph

17 Commits

Author SHA1 Message Date
Darian Leung
1f6d7fa334 twai: Add errata workaround for listen only mode
This commit adds a workaround for the TWAI listen only mode errata which is
present on the ESP32, ESP32-S2, ESP32-S3, and ESP32-C3. twai_get_status_info()
has also been updated to account for the fact that TEC/REC are frozen in
listen only mode.

Errata Description:

When the TWAI controller is put into listen only mode, it should not influence
the TWAI bus in any way (i.e., should never send a dominant bit). However,
on the targets listed above, the TWAI controller will send dominant bits in an
error frame (i.e., active error frame), even if the controller is set to listen
only mode.

Workaround:

We can force the TWAI controller into the error passive state on startup (by
setting the REC to >= 128). Since the TEC/REC are frozen in listen only mode,
the TWAI controller will remain error passive and only send recessive bits
(i.e., passive error frames), thus will not influence the TWAI bus.

Closes https://github.com/espressif/esp-idf/issues/9157
2023-02-24 20:40:33 +08:00
Armando
984ee9dd38 adc: no longer support adc2 oneshot mode on esp32c3
Due to HW limitation, we don't support this anymore. On c3, ADC2 under oneshot mode is not stable.

However, you can enable CONFIG_ADC_ONESHOT_FORCE_USE_ADC2_ON_C3 to force use
ADC2.

Refer to errata to know more details:
https://www.espressif.com/sites/default/files/documentation/esp32-c3_errata_en.pdf
2023-02-08 09:04:28 +00:00
Armando
9b4986dd2c adc: no longer support adc2 continuous mode on esp32c3
Due to HW limitation, we don't support this anymore. On c3, ADC2 under continuous  mode is not stable.

However, you can enable CONFIG_ADC_CONTINUOUS_FORCE_USE_ADC2_ON_C3_S3 to force use
ADC2.

Refer to errata to know more details:
https://www.espressif.com/sites/default/files/documentation/esp32-c3_errata_en.pdf
2023-02-08 09:04:28 +00:00
Darian Leung
07291fdd27 TWAI: FIFO overrun handling and errata workarounds
This commit adds handling for FIFO overruns and
adds workarounds for HW errats on the ESP32.

Closes https://github.com/espressif/esp-idf/issues/2519
Closes https://github.com/espressif/esp-idf/issues/4276
2021-04-26 19:35:13 +08:00
ninh
27aa6c289f components/pm: Add slp gpio configure workaround 2021-01-15 15:34:45 +08:00
Ivan Grokhotkov
7f3b16a99d freertos: always enable static allocation
to use it for newlib locks
2020-12-29 16:18:04 +01:00
Darian Leung
4c57f50fe4 TWAI: ISR runs when cache is disabled
This commit adds the feature where the TWAI ISR will continue to
run even if the cache is disabled. Whilst cache is disabled, any
received messages will go into the RX queue, and any pending TX
messages in the TX queue will be transmitted. This feature should
be enabled using the CONFIG_TWAI_ISR_IN_IRAM option.
2020-10-10 14:19:32 +08:00
Roland Dobai
5454c268f7 Docs: Omit kconfig configurations not available for the target 2020-01-30 10:30:06 +01:00
fuzhibo
0c2bf7c8bc rtcio: add hal for driver 2019-11-21 10:40:49 +08:00
suda-morris
f94711c316 uart: add option to put ISR in IRAM 2019-10-02 16:43:02 +00:00
Roland Dobai
e9f1011b1b Rename Kconfig options (components/driver) 2019-05-21 09:09:01 +02:00
Roland Dobai
37126d3451 Correct Kconfigs according to the coding style 2019-01-29 13:37:01 +01:00
Michael (XIAO Xufeng)
8cddfa35b8 spi: fix the crash when callbacks are not in the IRAM
Introduced in 9c23b8e5 and 4f87a62f. To get higher speed, menuconfig
options are added to put ISR and other functions into the IRAM.  The
interrupt flag ESP_INTR_FLAG_IRAM is also mistakenly set when the ISR is
put into the IRAM. However callbacks, which are wrote by the user, are
called in the master and slave ISR. The user may not be aware of that
these callbacks are not disabled during flash operations. Any cache miss
during flash operation will cause panic.

Essentially IRAM functions and intrrupt flag ESP_INTR_FLAG_IRAM are
different, the latter means not disabling the ISR during flash
operations.  New bus_config flag intr_flags is offered to help set the
interrupt attribute, including priority level, SHARED, IRAM (not
disabled during flash operations).  It introduced a small BREAK to
IDFv3.1 (but the same as IDFv3.0) that the user has to manually set IRAM
flag now (therefore he's aware of the IRAM thing) to void the ISR being
disabled during flash operations.
2018-11-20 13:07:13 +08:00
Michael (XIAO Xufeng)
4f87a62f18 spi_slave: add new menuconfig item to decide whether spi slave should be put into IRAM 2018-08-23 05:21:49 +00:00
Michael (XIAO Xufeng)
9c23b8e596 feature(spi_master): allow to place functions into IRAM to get higher efficiency 2018-06-14 20:22:40 +08:00
Michael (Xiao Xufeng)
cef8baf424 bugfix(rtc): make sure peripherals (DAC, HALL) are turned off before conversion.
refactor structure of ``rtc_module.c`` to make it more clearly.

Closes https://github.com/espressif/esp-idf/issues/1517
2018-03-28 17:10:01 +08:00
michael
28e832c37e fix(adc2): fix cct and xpd configurations to improve precision of ADCs 2018-03-26 12:02:26 +00:00