This commit updates the Panic handler behavior Kconfig setting to make
the GDBStub on Panic (CONFIG_ESP_SYSTEM_PANIC_GDBSTUB) option to be only
available when esp_gdbstub is part of the component list of the build.
Closes https://github.com/espressif/esp-idf/issues/13218
Previously, Task Snapshot could be conditionally built based on the
CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT option. However, there is no overhead
with always enabling Task Snapshot functions, as the linker will remove any
functions if they are not called.
This commit...
- removes all ESP-IDF dependencies on the CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT
option so that Task Snapshot functions are always available.
- Makes CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT a hidden option to maintain
compatibility with user code.
- adds documentation regarding Task Snapshot.
- add hardware stack guard based on assist-debug module
- enable hardware stack guard by default
- disable hardware stack guard for freertos ci.release test
- refactor rtos_int_enter/rtos_int_exit to change SP register inside them
- fix panic_reason.h header for RISC-V
- update docs to include information about the new feature
1. Remove RTC_CLOCK_BBPLL_POWER_ON_WITH_USB Kconfig option
During sleep, BBPLL clock always gets disabled
esp_restart does not disable BBPLL clock, so that first stage bootloader log can be printed
2. Add a new Kconfig option PM_NO_AUTO_LS_ON_USJ_CONNECTED
When this option is selected, IDF will constantly monitor USB CDC port connection status.
As long as it gets connected to a HOST, automatic light-sleep will not happen.
Closes https://github.com/espressif/esp-idf/issues/8507
ESP32-C2 has a single group timer, thus it will use it for the interrupt watchdog,
which is more critical than the task watchdog. The latter is implement in
software thanks to the `esp_timer`component.
For RISC-V and Xtensa targets, in case a panic needs to happen when
Task WDT is triggered (ESP_TASK_WDT_PANIC), the interruptee's stack
is now used for printing the backtrace.
Abort after Task Watchdog is triggered can happen on APP CPU (second core).
ESP32-S3 stacks have currently have less useable space compared to other targets (due to
AI coprocessor context registers). This has caused a stack overflow in the IPC tasks under
some configurations. This commit increases the default IPC stack size for the ESP32-S3.
1. Since the baud rate in the ROM cannot be changed,
set the default baud rate of the 26Mhz version
of esp32c2 to 74800
2. Since the systimer configuration of the 26Mhz
version requires a non-integer systimer frequency
configuration, and this feature is not supported
in the current ROM, this option is disabled for
the 26Mhz version esp32c2
