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fast_gpio: bring up fast gpio driver on esp32c6

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This commit is contained in:
morris 2022-09-15 10:53:35 +08:00
parent 201dbb0e27
commit fd325c9fa2
4 changed files with 60 additions and 3 deletions
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55
components/hal/esp32c6/include/hal/dedic_gpio_cpu_ll.h Normal file
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@ -0,0 +1,55 @@
/*
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdint.h>
#include "riscv/csr.h"
/*fast gpio*/
#define CSR_GPIO_OEN_USER 0x803
#define CSR_GPIO_IN_USER 0x804
#define CSR_GPIO_OUT_USER 0x805
#ifdef __cplusplus
extern "C" {
#endif
__attribute__((always_inline))
static inline void dedic_gpio_cpu_ll_enable_output(uint32_t mask)
{
RV_WRITE_CSR(CSR_GPIO_OEN_USER, mask);
}
static inline void dedic_gpio_cpu_ll_write_all(uint32_t value)
{
RV_WRITE_CSR(CSR_GPIO_OUT_USER, value);
}
__attribute__((always_inline))
static inline uint32_t dedic_gpio_cpu_ll_read_in(void)
{
uint32_t value = RV_READ_CSR(CSR_GPIO_IN_USER);
return value;
}
__attribute__((always_inline))
static inline uint32_t dedic_gpio_cpu_ll_read_out(void)
{
uint32_t value = RV_READ_CSR(CSR_GPIO_OUT_USER);
return value;
}
__attribute__((always_inline))
static inline void dedic_gpio_cpu_ll_write_mask(uint32_t mask, uint32_t value)
{
RV_SET_CSR(CSR_GPIO_OUT_USER, mask & value);
RV_CLEAR_CSR(CSR_GPIO_OUT_USER, mask & ~(value));
}
#ifdef __cplusplus
}
#endif

1
components/soc/esp32c6/CMakeLists.txt
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@ -18,7 +18,6 @@ set(srcs
# ESP32C6-TODO
list(REMOVE_ITEM srcs
"adc_periph.c" # TODO: IDF-5310
"dedic_gpio_periph.c" # TODO: IDF-5331
"ledc_periph.c" # TODO: IDF-5328
"i2s_periph.c" # TODO: IDF-5314
"i2c_periph.c" # TODO: IDF-5326

4
components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
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@ -3,6 +3,10 @@
# using gen_soc_caps_kconfig.py, do not edit manually
#####################################################
config SOC_DEDICATED_GPIO_SUPPORTED
bool
default y
config SOC_GDMA_SUPPORTED
bool
default y

3
components/soc/esp32c6/include/soc/soc_caps.h
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@ -26,7 +26,7 @@
/*-------------------------- COMMON CAPS ---------------------------------------*/
// #define SOC_ADC_SUPPORTED 1 // TODO: IDF-5310
// #define SOC_DEDICATED_GPIO_SUPPORTED 1 // TODO: IDF-5331
#define SOC_DEDICATED_GPIO_SUPPORTED 1
#define SOC_GDMA_SUPPORTED 1
#define SOC_PCNT_SUPPORTED 1
// #define SOC_TWAI_SUPPORTED 1 // TODO: IDF-5313
@ -161,7 +161,6 @@
// Support to configure sleep status
#define SOC_GPIO_SUPPORT_SLP_SWITCH (1)
// TODO: IDF-5331 (Copy from esp32c3, need check)
/*-------------------------- Dedicated GPIO CAPS -----------------------------*/
#define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */
#define SOC_DEDIC_GPIO_IN_CHANNELS_NUM (8) /*!< 8 inward channels on each CPU core */