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cache: fix s2 dcache size 0 issue when psram disabled

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This commit is contained in:
Armando 2022-11-02 19:17:52 +08:00
parent d6844051fc
commit e76c52d4df
2 changed files with 1 additions and 4 deletions
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2
components/esp_system/port/cpu_start.c
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@ -340,12 +340,10 @@ void IRAM_ATTR call_start_cpu0(void)
/* If we need use SPIRAM, we should use data cache, or if we want to access rodata, we also should use data cache.
Configure the mode of data : cache size, cache associated ways, cache line size.
Enable data cache, so if we don't use SPIRAM, it just works. */
#if CONFIG_SPIRAM_BOOT_INIT
extern void esp_config_data_cache_mode(void);
esp_config_data_cache_mode();
Cache_Enable_DCache(0);
#endif
#endif
#if CONFIG_IDF_TARGET_ESP32S3
/* Configure the mode of instruction cache : cache size, cache line size. */

3
components/esp_system/port/soc/esp32s2/Kconfig.cache
View File

@ -28,8 +28,7 @@ menu "Cache config"
choice ESP32S2_DATA_CACHE_SIZE
prompt "Data cache size"
default ESP32S2_DATA_CACHE_0KB if !SPIRAM
default ESP32S2_DATA_CACHE_8KB if SPIRAM
default ESP32S2_DATA_CACHE_8KB
help
Data cache size to be set on application startup.
If you use 0KB data cache, the other 16KB will be added to the heap