From e76c52d4df6330adb874d269a2dd176d3d1ff964 Mon Sep 17 00:00:00 2001 From: Armando Date: Wed, 2 Nov 2022 19:17:52 +0800 Subject: [PATCH] cache: fix s2 dcache size 0 issue when psram disabled --- components/esp_system/port/cpu_start.c | 2 -- components/esp_system/port/soc/esp32s2/Kconfig.cache | 3 +-- 2 files changed, 1 insertion(+), 4 deletions(-) diff --git a/components/esp_system/port/cpu_start.c b/components/esp_system/port/cpu_start.c index 4740e51bb9..9b4e2a3823 100644 --- a/components/esp_system/port/cpu_start.c +++ b/components/esp_system/port/cpu_start.c @@ -340,12 +340,10 @@ void IRAM_ATTR call_start_cpu0(void) /* If we need use SPIRAM, we should use data cache, or if we want to access rodata, we also should use data cache. Configure the mode of data : cache size, cache associated ways, cache line size. Enable data cache, so if we don't use SPIRAM, it just works. */ -#if CONFIG_SPIRAM_BOOT_INIT extern void esp_config_data_cache_mode(void); esp_config_data_cache_mode(); Cache_Enable_DCache(0); #endif -#endif #if CONFIG_IDF_TARGET_ESP32S3 /* Configure the mode of instruction cache : cache size, cache line size. */ diff --git a/components/esp_system/port/soc/esp32s2/Kconfig.cache b/components/esp_system/port/soc/esp32s2/Kconfig.cache index bef23e3be6..fcb244ed31 100644 --- a/components/esp_system/port/soc/esp32s2/Kconfig.cache +++ b/components/esp_system/port/soc/esp32s2/Kconfig.cache @@ -28,8 +28,7 @@ menu "Cache config" choice ESP32S2_DATA_CACHE_SIZE prompt "Data cache size" - default ESP32S2_DATA_CACHE_0KB if !SPIRAM - default ESP32S2_DATA_CACHE_8KB if SPIRAM + default ESP32S2_DATA_CACHE_8KB help Data cache size to be set on application startup. If you use 0KB data cache, the other 16KB will be added to the heap