Merge branch 'refactor_rtc_wdt_code' into 'master'

RTC WDT: refactor code to remove duplicated code

See merge request espressif/esp-idf!16845
This commit is contained in:
Omar Chebib 2022-03-04 11:52:15 +08:00
commit dc25a8a6ba
9 changed files with 16 additions and 153 deletions

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@ -22,6 +22,10 @@ if(NOT BOOTLOADER_BUILD)
# [refactor-todo]: requires "driver" for GPIO and RTC (by sleep_gpio and sleep_modes)
list(APPEND priv_requires driver)
if(CONFIG_IDF_TARGET_ESP32 OR CONFIG_IDF_TARGET_ESP32S2)
list(APPEND srcs "rtc_wdt.c")
endif()
else()
# Requires "_esp_error_check_failed()" function
list(APPEND priv_requires "esp_system")

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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2018-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -45,6 +45,8 @@ without description where were CPUs when it happened.
#include "soc/rtc_periph.h"
#include "esp_err.h"
#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
#ifdef __cplusplus
extern "C"
{
@ -188,3 +190,5 @@ bool rtc_wdt_is_on(void);
#ifdef __cplusplus
}
#endif
#endif // CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2

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@ -9,7 +9,7 @@ entries:
rtc_pm (noflash_text)
rtc_sleep (noflash_text)
rtc_time (noflash_text)
if IDF_TARGET_ESP32C3 = n && IDF_TARGET_ESP32H2 = n && IDF_TARGET_ESP32C2 = n:
if IDF_TARGET_ESP32 = y || IDF_TARGET_ESP32S2 = y:
rtc_wdt (noflash_text)
if IDF_TARGET_ESP32S3 = y:
if SPIRAM_MODE_QUAD = y:

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@ -8,7 +8,6 @@ set(srcs
"rtc_pm.c"
"rtc_sleep.c"
"rtc_time.c"
"rtc_wdt.c"
"chip_info.c")
if(NOT BOOTLOADER_BUILD)

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@ -1,143 +0,0 @@
/*
* SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/rtc_wdt.h"
#include "soc/rtc.h"
bool rtc_wdt_get_protect_status(void)
{
return READ_PERI_REG(RTC_CNTL_WDTWPROTECT_REG) != RTC_CNTL_WDT_WKEY_VALUE;
}
void rtc_wdt_protect_off(void)
{
WRITE_PERI_REG(RTC_CNTL_WDTWPROTECT_REG, RTC_CNTL_WDT_WKEY_VALUE);
}
void rtc_wdt_protect_on(void)
{
WRITE_PERI_REG(RTC_CNTL_WDTWPROTECT_REG, 0);
}
void rtc_wdt_enable(void)
{
REG_SET_BIT(RTC_CNTL_WDTFEED_REG, RTC_CNTL_WDT_FEED);
SET_PERI_REG_MASK(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_EN | RTC_CNTL_WDT_PAUSE_IN_SLP);
}
void rtc_wdt_flashboot_mode_enable(void)
{
REG_SET_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN);
}
void rtc_wdt_disable(void)
{
bool protect = rtc_wdt_get_protect_status();
if (protect) {
rtc_wdt_protect_off();
}
REG_SET_BIT(RTC_CNTL_WDTFEED_REG, RTC_CNTL_WDT_FEED);
rtc_wdt_set_stage(RTC_WDT_STAGE0, RTC_WDT_STAGE_ACTION_OFF);
rtc_wdt_set_stage(RTC_WDT_STAGE1, RTC_WDT_STAGE_ACTION_OFF);
rtc_wdt_set_stage(RTC_WDT_STAGE2, RTC_WDT_STAGE_ACTION_OFF);
rtc_wdt_set_stage(RTC_WDT_STAGE3, RTC_WDT_STAGE_ACTION_OFF);
REG_CLR_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN);
REG_CLR_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_EN);
if (protect) {
rtc_wdt_protect_on();
}
}
void rtc_wdt_feed(void)
{
bool protect = rtc_wdt_get_protect_status();
if (protect) {
rtc_wdt_protect_off();
}
REG_SET_BIT(RTC_CNTL_WDTFEED_REG, RTC_CNTL_WDT_FEED);
if (protect) {
rtc_wdt_protect_on();
}
}
esp_err_t rtc_wdt_set_time(rtc_wdt_stage_t stage, unsigned int timeout_ms)
{
if (stage > 3) {
return ESP_ERR_INVALID_ARG;
}
uint32_t timeout = (uint32_t) ((uint64_t) rtc_clk_slow_freq_get_hz() * timeout_ms / 1000);
if (stage == RTC_WDT_STAGE0) {
WRITE_PERI_REG(RTC_CNTL_WDTCONFIG1_REG, timeout);
} else if (stage == RTC_WDT_STAGE1) {
WRITE_PERI_REG(RTC_CNTL_WDTCONFIG2_REG, timeout);
} else if (stage == RTC_WDT_STAGE2) {
WRITE_PERI_REG(RTC_CNTL_WDTCONFIG3_REG, timeout);
} else {
WRITE_PERI_REG(RTC_CNTL_WDTCONFIG4_REG, timeout);
}
return ESP_OK;
}
esp_err_t rtc_wdt_get_timeout(rtc_wdt_stage_t stage, unsigned int* timeout_ms)
{
if (stage > 3) {
return ESP_ERR_INVALID_ARG;
}
uint32_t time_tick;
if (stage == RTC_WDT_STAGE0) {
time_tick = READ_PERI_REG(RTC_CNTL_WDTCONFIG1_REG);
} else if (stage == RTC_WDT_STAGE1) {
time_tick = READ_PERI_REG(RTC_CNTL_WDTCONFIG2_REG);
} else if (stage == RTC_WDT_STAGE2) {
time_tick = READ_PERI_REG(RTC_CNTL_WDTCONFIG3_REG);
} else {
time_tick = READ_PERI_REG(RTC_CNTL_WDTCONFIG4_REG);
}
*timeout_ms = time_tick * 1000 / rtc_clk_slow_freq_get_hz();
return ESP_OK;
}
esp_err_t rtc_wdt_set_stage(rtc_wdt_stage_t stage, rtc_wdt_stage_action_t stage_sel)
{
if (stage > 3 || stage_sel > 4) {
return ESP_ERR_INVALID_ARG;
}
if (stage == RTC_WDT_STAGE0) {
REG_SET_FIELD(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_STG0, stage_sel);
} else if (stage == RTC_WDT_STAGE1) {
REG_SET_FIELD(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_STG1, stage_sel);
} else if (stage == RTC_WDT_STAGE2) {
REG_SET_FIELD(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_STG2, stage_sel);
} else {
REG_SET_FIELD(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_STG3, stage_sel);
}
return ESP_OK;
}
esp_err_t rtc_wdt_set_length_of_reset_signal(rtc_wdt_reset_sig_t reset_src, rtc_wdt_length_sig_t reset_signal_length)
{
if (reset_src > 1 || reset_signal_length > 7) {
return ESP_ERR_INVALID_ARG;
}
if (reset_src == 0) {
REG_SET_FIELD(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_SYS_RESET_LENGTH, reset_signal_length);
} else {
REG_SET_FIELD(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_CPU_RESET_LENGTH, reset_signal_length);
}
return ESP_OK;
}
bool rtc_wdt_is_on(void)
{
return (REG_GET_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_EN) != 0) || (REG_GET_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN) != 0);
}

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@ -8,7 +8,6 @@ set(srcs
"rtc_pm.c"
"rtc_sleep.c"
"rtc_time.c"
"rtc_wdt.c"
"regi2c_ctrl.c"
"chip_info.c"
)

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@ -8,7 +8,6 @@ set(srcs
"rtc_pm.c"
"rtc_sleep.c"
"rtc_time.c"
"rtc_wdt.c"
"chip_info.c"
)

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@ -1,5 +0,0 @@
/*
* SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

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@ -4,10 +4,12 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/efuse_periph.h"
#include "soc/rtc_wdt.h"
#include "soc/rtc.h"
#include "hal/efuse_ll.h"
#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
bool rtc_wdt_get_protect_status(void)
{
@ -87,9 +89,11 @@ esp_err_t rtc_wdt_set_time(rtc_wdt_stage_t stage, unsigned int timeout_ms)
return ESP_ERR_INVALID_ARG;
}
uint32_t timeout = (uint32_t) ((uint64_t) rtc_clk_slow_freq_get_hz() * timeout_ms / 1000);
#if !CONFIG_IDF_TARGET_ESP32
if (stage == RTC_WDT_STAGE0) {
timeout = timeout >> (1 + efuse_ll_get_wdt_delay_sel());
}
#endif
WRITE_PERI_REG(get_addr_reg(stage), timeout);
return ESP_OK;
}
@ -142,3 +146,5 @@ bool rtc_wdt_is_on(void)
{
return (REG_GET_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_EN) != 0) || (REG_GET_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN) != 0);
}
#endif // CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2