RTC WDT: Use target name instead of caps for rtc wdt

This commit is contained in:
Omar Chebib 2022-02-28 18:30:36 +08:00
parent dbba26643f
commit 96b362d1da
8 changed files with 6 additions and 16 deletions

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@ -22,7 +22,7 @@ if(NOT BOOTLOADER_BUILD)
# [refactor-todo]: requires "driver" for GPIO and RTC (by sleep_gpio and sleep_modes)
list(APPEND priv_requires driver)
if(CONFIG_SOC_RTC_WDT_SUPPORTED)
if(CONFIG_IDF_TARGET_ESP32 OR CONFIG_IDF_TARGET_ESP32S2)
list(APPEND srcs "rtc_wdt.c")
endif()

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@ -45,7 +45,7 @@ without description where were CPUs when it happened.
#include "soc/rtc_periph.h"
#include "esp_err.h"
#if SOC_RTC_WDT_SUPPORTED
#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
#ifdef __cplusplus
extern "C"
@ -191,4 +191,4 @@ bool rtc_wdt_is_on(void);
}
#endif
#endif // SOC_CAPS_RTC_WDT
#endif // CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2

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@ -9,7 +9,7 @@ entries:
rtc_pm (noflash_text)
rtc_sleep (noflash_text)
rtc_time (noflash_text)
if SOC_RTC_WDT_SUPPORTED = y:
if IDF_TARGET_ESP32 = y || IDF_TARGET_ESP32S2 = y:
rtc_wdt (noflash_text)
if IDF_TARGET_ESP32S3 = y:
if SPIRAM_MODE_QUAD = y:

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@ -9,7 +9,7 @@
#include "soc/rtc.h"
#include "hal/efuse_ll.h"
#if SOC_RTC_WDT_SUPPORTED
#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
bool rtc_wdt_get_protect_status(void)
{
@ -147,4 +147,4 @@ bool rtc_wdt_is_on(void)
return (REG_GET_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_EN) != 0) || (REG_GET_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN) != 0);
}
#endif // SOC_RTC_WDT_SUPPORTED
#endif // CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2

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@ -83,10 +83,6 @@ config SOC_RTC_SLOW_MEM_SUPPORTED
bool
default y
config SOC_RTC_WDT_SUPPORTED
bool
default y
config SOC_I2S_SUPPORTED
bool
default y

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@ -80,7 +80,6 @@
#define SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS 1
#define SOC_RTC_FAST_MEM_SUPPORTED 1
#define SOC_RTC_SLOW_MEM_SUPPORTED 1
#define SOC_RTC_WDT_SUPPORTED 1
#define SOC_I2S_SUPPORTED 1
#define SOC_RMT_SUPPORTED 1
#define SOC_SIGMADELTA_SUPPORTED 1

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@ -107,10 +107,6 @@ config SOC_RTC_SLOW_MEM_SUPPORTED
bool
default y
config SOC_RTC_WDT_SUPPORTED
bool
default y
config SOC_PSRAM_DMA_CAPABLE
bool
default y

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@ -65,7 +65,6 @@
#define SOC_FLASH_ENCRYPTION_XTS_AES_256 1
#define SOC_RTC_FAST_MEM_SUPPORTED 1
#define SOC_RTC_SLOW_MEM_SUPPORTED 1
#define SOC_RTC_WDT_SUPPORTED 1
#define SOC_PSRAM_DMA_CAPABLE 1
#define SOC_XT_WDT_SUPPORTED 1
#define SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY 1