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synced 2024-10-05 20:47:46 -04:00
fix(ci): some actions taken to pass CI
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@ -1,2 +1,2 @@
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| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
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| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
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| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
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| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- |
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@ -751,7 +751,7 @@ void IRAM_ATTR call_start_cpu0(void)
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#endif
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#endif
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#if SOC_DEEP_SLEEP_SUPPORTED //TODO: IDF-9245
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#if SOC_DEEP_SLEEP_SUPPORTED
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// Need to unhold the IOs that were hold right before entering deep sleep, which are used as wakeup pins
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if (rst_reas[0] == RESET_REASON_CORE_DEEP_SLEEP) {
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esp_deep_sleep_wakeup_io_reset();
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@ -59,7 +59,7 @@ void IRAM_ATTR modem_clock_hal_set_clock_domain_icg_bitmap(modem_clock_hal_conte
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}
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}
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uint32_t modem_clock_hal_get_clock_domain_icg_bitmap(modem_clock_hal_context_t *hal, modem_clock_domain_t domain)
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uint32_t IRAM_ATTR modem_clock_hal_get_clock_domain_icg_bitmap(modem_clock_hal_context_t *hal, modem_clock_domain_t domain)
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{
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HAL_ASSERT(domain < MODEM_CLOCK_DOMAIN_MAX);
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uint32_t bitmap = 0;
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@ -180,7 +180,7 @@
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#define SOC_GPIO_OUT_RANGE_MAX 21
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// GPIO0~6 on ESP32C61 can support chip deep sleep wakeup
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#define SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP (1) //TODO: IDF-9245
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#define SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP (1)
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#define SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK (0ULL | BIT0 | BIT1 | BIT2 | BIT3 | BIT4 | BIT5 | BIT6)
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#define SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT (7)
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@ -32,9 +32,9 @@ examples/system/deep_sleep:
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examples/system/deep_sleep_wake_stub:
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disable:
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- if: IDF_TARGET in ["esp32c2", "esp32p4", "esp32c61"]
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- if: ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB != 1
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temporary: true
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reason: target(s) is not supported yet # TODO: [esp32c61] IDF-9245
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reason: target(s) is not supported yet
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examples/system/efuse:
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enable:
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@ -20,6 +20,7 @@ CONFIGS = [
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pytest.mark.esp32c3,
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pytest.mark.esp32c5,
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pytest.mark.esp32c6,
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pytest.mark.esp32c61,
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pytest.mark.esp32h2,
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pytest.mark.esp32p4,
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pytest.mark.esp32c2,
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