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esp_hw_support/clk_cali: remove redundant check for cali value

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This commit is contained in:
jingli 2022-09-20 20:01:17 +08:00
parent 07d69b7cae
commit b85e5627d3
4 changed files with 4 additions and 24 deletions
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7
components/esp_system/port/soc/esp32/clk.c
View File

@ -46,11 +46,6 @@ static const char* TAG = "clk";
#define RTC_XTAL_CAL_RETRY 1
#endif
/* Lower threshold for a reasonably-looking calibration value for a 32k XTAL.
* The ideal value (assuming 32768 Hz frequency) is 1000000/32768*(2**19) = 16*10^6.
*/
#define MIN_32K_XTAL_CAL_VAL 15000000L
/* Indicates that this 32k oscillator gets input from external oscillator, rather
* than a crystal.
*/
@ -94,7 +89,7 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
// When SLOW_CLK_CAL_CYCLES is set to 0, clock calibration will not be performed at startup.
if (SLOW_CLK_CAL_CYCLES > 0) {
cal_val = rtc_clk_cal(RTC_CAL_32K_XTAL, SLOW_CLK_CAL_CYCLES);
if (cal_val == 0 || cal_val < MIN_32K_XTAL_CAL_VAL) {
if (cal_val == 0) {
if (retry_32k_xtal-- > 0) {
continue;
}

7
components/esp_system/port/soc/esp32c3/clk.c
View File

@ -45,11 +45,6 @@
#define MHZ (1000000)
/* Lower threshold for a reasonably-looking calibration value for a 32k XTAL.
* The ideal value (assuming 32768 Hz frequency) is 1000000/32768*(2**19) = 16*10^6.
*/
#define MIN_32K_XTAL_CAL_VAL 15000000L
/* Indicates that this 32k oscillator gets input from external oscillator, rather
* than a crystal.
*/
@ -170,7 +165,7 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
// When SLOW_CLK_CAL_CYCLES is set to 0, clock calibration will not be performed at startup.
if (SLOW_CLK_CAL_CYCLES > 0) {
cal_val = rtc_clk_cal(RTC_CAL_32K_XTAL, SLOW_CLK_CAL_CYCLES);
if (cal_val == 0 || cal_val < MIN_32K_XTAL_CAL_VAL) {
if (cal_val == 0) {
if (retry_32k_xtal-- > 0) {
continue;
}

7
components/esp_system/port/soc/esp32s2/clk.c
View File

@ -51,11 +51,6 @@ static const char *TAG = "clk";
#define RTC_XTAL_CAL_RETRY 1
#endif
/* Lower threshold for a reasonably-looking calibration value for a 32k XTAL.
* The ideal value (assuming 32768 Hz frequency) is 1000000/32768*(2**19) = 16*10^6.
*/
#define MIN_32K_XTAL_CAL_VAL 15000000L
/* Indicates that this 32k oscillator gets input from external oscillator, rather
* than a crystal.
*/
@ -175,7 +170,7 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
// When SLOW_CLK_CAL_CYCLES is set to 0, clock calibration will not be performed at startup.
if (SLOW_CLK_CAL_CYCLES > 0) {
cal_val = rtc_clk_cal(RTC_CAL_32K_XTAL, SLOW_CLK_CAL_CYCLES);
if (cal_val == 0 || cal_val < MIN_32K_XTAL_CAL_VAL) {
if (cal_val == 0) {
if (retry_32k_xtal-- > 0) {
continue;
}

7
components/esp_system/port/soc/esp32s3/clk.c
View File

@ -51,11 +51,6 @@ static const char *TAG = "clk";
#define RTC_XTAL_CAL_RETRY 1
#endif
/* Lower threshold for a reasonably-looking calibration value for a 32k XTAL.
* The ideal value (assuming 32768 Hz frequency) is 1000000/32768*(2**19) = 16*10^6.
*/
#define MIN_32K_XTAL_CAL_VAL 15000000L
/* Indicates that this 32k oscillator gets input from external oscillator, rather
* than a crystal.
*/
@ -164,7 +159,7 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
// When SLOW_CLK_CAL_CYCLES is set to 0, clock calibration will not be performed at startup.
if (SLOW_CLK_CAL_CYCLES > 0) {
cal_val = rtc_clk_cal(RTC_CAL_32K_XTAL, SLOW_CLK_CAL_CYCLES);
if (cal_val == 0 || cal_val < MIN_32K_XTAL_CAL_VAL) {
if (cal_val == 0) {
if (retry_32k_xtal-- > 0) {
continue;
}