From b85e5627d3c022a7dac65309f90118587494ac04 Mon Sep 17 00:00:00 2001 From: jingli Date: Tue, 20 Sep 2022 20:01:17 +0800 Subject: [PATCH] esp_hw_support/clk_cali: remove redundant check for cali value --- components/esp_system/port/soc/esp32/clk.c | 7 +------ components/esp_system/port/soc/esp32c3/clk.c | 7 +------ components/esp_system/port/soc/esp32s2/clk.c | 7 +------ components/esp_system/port/soc/esp32s3/clk.c | 7 +------ 4 files changed, 4 insertions(+), 24 deletions(-) diff --git a/components/esp_system/port/soc/esp32/clk.c b/components/esp_system/port/soc/esp32/clk.c index ca55a5f4e2..123df10aed 100644 --- a/components/esp_system/port/soc/esp32/clk.c +++ b/components/esp_system/port/soc/esp32/clk.c @@ -46,11 +46,6 @@ static const char* TAG = "clk"; #define RTC_XTAL_CAL_RETRY 1 #endif -/* Lower threshold for a reasonably-looking calibration value for a 32k XTAL. - * The ideal value (assuming 32768 Hz frequency) is 1000000/32768*(2**19) = 16*10^6. - */ -#define MIN_32K_XTAL_CAL_VAL 15000000L - /* Indicates that this 32k oscillator gets input from external oscillator, rather * than a crystal. */ @@ -94,7 +89,7 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk) // When SLOW_CLK_CAL_CYCLES is set to 0, clock calibration will not be performed at startup. if (SLOW_CLK_CAL_CYCLES > 0) { cal_val = rtc_clk_cal(RTC_CAL_32K_XTAL, SLOW_CLK_CAL_CYCLES); - if (cal_val == 0 || cal_val < MIN_32K_XTAL_CAL_VAL) { + if (cal_val == 0) { if (retry_32k_xtal-- > 0) { continue; } diff --git a/components/esp_system/port/soc/esp32c3/clk.c b/components/esp_system/port/soc/esp32c3/clk.c index c6b5ed4ebd..25636a4f3f 100644 --- a/components/esp_system/port/soc/esp32c3/clk.c +++ b/components/esp_system/port/soc/esp32c3/clk.c @@ -45,11 +45,6 @@ #define MHZ (1000000) -/* Lower threshold for a reasonably-looking calibration value for a 32k XTAL. - * The ideal value (assuming 32768 Hz frequency) is 1000000/32768*(2**19) = 16*10^6. - */ -#define MIN_32K_XTAL_CAL_VAL 15000000L - /* Indicates that this 32k oscillator gets input from external oscillator, rather * than a crystal. */ @@ -170,7 +165,7 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk) // When SLOW_CLK_CAL_CYCLES is set to 0, clock calibration will not be performed at startup. if (SLOW_CLK_CAL_CYCLES > 0) { cal_val = rtc_clk_cal(RTC_CAL_32K_XTAL, SLOW_CLK_CAL_CYCLES); - if (cal_val == 0 || cal_val < MIN_32K_XTAL_CAL_VAL) { + if (cal_val == 0) { if (retry_32k_xtal-- > 0) { continue; } diff --git a/components/esp_system/port/soc/esp32s2/clk.c b/components/esp_system/port/soc/esp32s2/clk.c index d11c43233e..f9f481f50e 100644 --- a/components/esp_system/port/soc/esp32s2/clk.c +++ b/components/esp_system/port/soc/esp32s2/clk.c @@ -51,11 +51,6 @@ static const char *TAG = "clk"; #define RTC_XTAL_CAL_RETRY 1 #endif -/* Lower threshold for a reasonably-looking calibration value for a 32k XTAL. - * The ideal value (assuming 32768 Hz frequency) is 1000000/32768*(2**19) = 16*10^6. - */ -#define MIN_32K_XTAL_CAL_VAL 15000000L - /* Indicates that this 32k oscillator gets input from external oscillator, rather * than a crystal. */ @@ -175,7 +170,7 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk) // When SLOW_CLK_CAL_CYCLES is set to 0, clock calibration will not be performed at startup. if (SLOW_CLK_CAL_CYCLES > 0) { cal_val = rtc_clk_cal(RTC_CAL_32K_XTAL, SLOW_CLK_CAL_CYCLES); - if (cal_val == 0 || cal_val < MIN_32K_XTAL_CAL_VAL) { + if (cal_val == 0) { if (retry_32k_xtal-- > 0) { continue; } diff --git a/components/esp_system/port/soc/esp32s3/clk.c b/components/esp_system/port/soc/esp32s3/clk.c index f7f2aa7089..bc8f4e9b24 100644 --- a/components/esp_system/port/soc/esp32s3/clk.c +++ b/components/esp_system/port/soc/esp32s3/clk.c @@ -51,11 +51,6 @@ static const char *TAG = "clk"; #define RTC_XTAL_CAL_RETRY 1 #endif -/* Lower threshold for a reasonably-looking calibration value for a 32k XTAL. - * The ideal value (assuming 32768 Hz frequency) is 1000000/32768*(2**19) = 16*10^6. - */ -#define MIN_32K_XTAL_CAL_VAL 15000000L - /* Indicates that this 32k oscillator gets input from external oscillator, rather * than a crystal. */ @@ -164,7 +159,7 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk) // When SLOW_CLK_CAL_CYCLES is set to 0, clock calibration will not be performed at startup. if (SLOW_CLK_CAL_CYCLES > 0) { cal_val = rtc_clk_cal(RTC_CAL_32K_XTAL, SLOW_CLK_CAL_CYCLES); - if (cal_val == 0 || cal_val < MIN_32K_XTAL_CAL_VAL) { + if (cal_val == 0) { if (retry_32k_xtal-- > 0) { continue; }