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esp_hw_support/clk_cali: remove redundant check for cali value
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07d69b7cae
commit
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@ -46,11 +46,6 @@ static const char* TAG = "clk";
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#define RTC_XTAL_CAL_RETRY 1
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#define RTC_XTAL_CAL_RETRY 1
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#endif
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#endif
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/* Lower threshold for a reasonably-looking calibration value for a 32k XTAL.
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* The ideal value (assuming 32768 Hz frequency) is 1000000/32768*(2**19) = 16*10^6.
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*/
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#define MIN_32K_XTAL_CAL_VAL 15000000L
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/* Indicates that this 32k oscillator gets input from external oscillator, rather
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/* Indicates that this 32k oscillator gets input from external oscillator, rather
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* than a crystal.
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* than a crystal.
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*/
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*/
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@ -94,7 +89,7 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
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// When SLOW_CLK_CAL_CYCLES is set to 0, clock calibration will not be performed at startup.
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// When SLOW_CLK_CAL_CYCLES is set to 0, clock calibration will not be performed at startup.
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if (SLOW_CLK_CAL_CYCLES > 0) {
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if (SLOW_CLK_CAL_CYCLES > 0) {
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cal_val = rtc_clk_cal(RTC_CAL_32K_XTAL, SLOW_CLK_CAL_CYCLES);
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cal_val = rtc_clk_cal(RTC_CAL_32K_XTAL, SLOW_CLK_CAL_CYCLES);
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if (cal_val == 0 || cal_val < MIN_32K_XTAL_CAL_VAL) {
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if (cal_val == 0) {
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if (retry_32k_xtal-- > 0) {
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if (retry_32k_xtal-- > 0) {
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continue;
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continue;
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}
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}
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@ -45,11 +45,6 @@
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#define MHZ (1000000)
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#define MHZ (1000000)
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/* Lower threshold for a reasonably-looking calibration value for a 32k XTAL.
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* The ideal value (assuming 32768 Hz frequency) is 1000000/32768*(2**19) = 16*10^6.
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*/
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#define MIN_32K_XTAL_CAL_VAL 15000000L
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/* Indicates that this 32k oscillator gets input from external oscillator, rather
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/* Indicates that this 32k oscillator gets input from external oscillator, rather
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* than a crystal.
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* than a crystal.
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*/
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*/
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@ -170,7 +165,7 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
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// When SLOW_CLK_CAL_CYCLES is set to 0, clock calibration will not be performed at startup.
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// When SLOW_CLK_CAL_CYCLES is set to 0, clock calibration will not be performed at startup.
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if (SLOW_CLK_CAL_CYCLES > 0) {
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if (SLOW_CLK_CAL_CYCLES > 0) {
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cal_val = rtc_clk_cal(RTC_CAL_32K_XTAL, SLOW_CLK_CAL_CYCLES);
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cal_val = rtc_clk_cal(RTC_CAL_32K_XTAL, SLOW_CLK_CAL_CYCLES);
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if (cal_val == 0 || cal_val < MIN_32K_XTAL_CAL_VAL) {
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if (cal_val == 0) {
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if (retry_32k_xtal-- > 0) {
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if (retry_32k_xtal-- > 0) {
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continue;
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continue;
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}
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}
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@ -51,11 +51,6 @@ static const char *TAG = "clk";
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#define RTC_XTAL_CAL_RETRY 1
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#define RTC_XTAL_CAL_RETRY 1
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#endif
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#endif
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/* Lower threshold for a reasonably-looking calibration value for a 32k XTAL.
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* The ideal value (assuming 32768 Hz frequency) is 1000000/32768*(2**19) = 16*10^6.
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*/
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#define MIN_32K_XTAL_CAL_VAL 15000000L
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/* Indicates that this 32k oscillator gets input from external oscillator, rather
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/* Indicates that this 32k oscillator gets input from external oscillator, rather
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* than a crystal.
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* than a crystal.
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*/
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*/
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@ -175,7 +170,7 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
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// When SLOW_CLK_CAL_CYCLES is set to 0, clock calibration will not be performed at startup.
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// When SLOW_CLK_CAL_CYCLES is set to 0, clock calibration will not be performed at startup.
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if (SLOW_CLK_CAL_CYCLES > 0) {
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if (SLOW_CLK_CAL_CYCLES > 0) {
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cal_val = rtc_clk_cal(RTC_CAL_32K_XTAL, SLOW_CLK_CAL_CYCLES);
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cal_val = rtc_clk_cal(RTC_CAL_32K_XTAL, SLOW_CLK_CAL_CYCLES);
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if (cal_val == 0 || cal_val < MIN_32K_XTAL_CAL_VAL) {
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if (cal_val == 0) {
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if (retry_32k_xtal-- > 0) {
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if (retry_32k_xtal-- > 0) {
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continue;
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continue;
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}
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}
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@ -51,11 +51,6 @@ static const char *TAG = "clk";
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#define RTC_XTAL_CAL_RETRY 1
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#define RTC_XTAL_CAL_RETRY 1
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#endif
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#endif
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/* Lower threshold for a reasonably-looking calibration value for a 32k XTAL.
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* The ideal value (assuming 32768 Hz frequency) is 1000000/32768*(2**19) = 16*10^6.
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*/
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#define MIN_32K_XTAL_CAL_VAL 15000000L
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/* Indicates that this 32k oscillator gets input from external oscillator, rather
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/* Indicates that this 32k oscillator gets input from external oscillator, rather
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* than a crystal.
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* than a crystal.
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*/
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*/
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@ -164,7 +159,7 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
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// When SLOW_CLK_CAL_CYCLES is set to 0, clock calibration will not be performed at startup.
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// When SLOW_CLK_CAL_CYCLES is set to 0, clock calibration will not be performed at startup.
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if (SLOW_CLK_CAL_CYCLES > 0) {
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if (SLOW_CLK_CAL_CYCLES > 0) {
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cal_val = rtc_clk_cal(RTC_CAL_32K_XTAL, SLOW_CLK_CAL_CYCLES);
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cal_val = rtc_clk_cal(RTC_CAL_32K_XTAL, SLOW_CLK_CAL_CYCLES);
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if (cal_val == 0 || cal_val < MIN_32K_XTAL_CAL_VAL) {
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if (cal_val == 0) {
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if (retry_32k_xtal-- > 0) {
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if (retry_32k_xtal-- > 0) {
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continue;
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continue;
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}
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}
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