Merge branch 'feature/esp32c61_light_sleep_support_stage_deepsleep' into 'master'

feat(esp_hw_support): support esp32c61 deepsleep Closes PM-203 and IDF-9245 See merge request espressif/esp-idf!33301
2024-10-05 20:47:46 -04:00 · 2024-09-20 15:30:30 +08:00 · 2024-09-20 15:30:30 +08:00 · 9be8822b61
commit 9be8822b61
parent 903c11ff1a d9c15bb772
9 changed files with 37 additions and 14 deletions
--- a/components/app_update/test_apps/test_app_update/README.md
+++ b/components/app_update/test_apps/test_app_update/README.md
@ -1,2 +1,2 @@
-| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
-| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
+| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
+| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- |
--- a/components/esp_system/port/cpu_start.c
+++ b/components/esp_system/port/cpu_start.c
@ -751,7 +751,7 @@ void IRAM_ATTR call_start_cpu0(void)
 #endif
 #endif

-#if SOC_DEEP_SLEEP_SUPPORTED //TODO: IDF-9245
+#if SOC_DEEP_SLEEP_SUPPORTED
    // Need to unhold the IOs that were hold right before entering deep sleep, which are used as wakeup pins
    if (rst_reas[0] == RESET_REASON_CORE_DEEP_SLEEP) {
        esp_deep_sleep_wakeup_io_reset();
--- a/components/hal/esp32c61/modem_clock_hal.c
+++ b/components/hal/esp32c61/modem_clock_hal.c
@ -59,7 +59,7 @@ void IRAM_ATTR modem_clock_hal_set_clock_domain_icg_bitmap(modem_clock_hal_conte
    }
 }

-uint32_t modem_clock_hal_get_clock_domain_icg_bitmap(modem_clock_hal_context_t *hal, modem_clock_domain_t domain)
+uint32_t IRAM_ATTR modem_clock_hal_get_clock_domain_icg_bitmap(modem_clock_hal_context_t *hal, modem_clock_domain_t domain)
 {
    HAL_ASSERT(domain < MODEM_CLOCK_DOMAIN_MAX);
    uint32_t bitmap = 0;
--- a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
@ -107,6 +107,10 @@ config SOC_LP_TIMER_SUPPORTED
    bool
    default y

+config SOC_LP_AON_SUPPORTED
+    bool
+    default y
+
 config SOC_CLK_TREE_SUPPORTED
    bool
    default y
@ -131,6 +135,10 @@ config SOC_LIGHT_SLEEP_SUPPORTED
    bool
    default y

+config SOC_DEEP_SLEEP_SUPPORTED
+    bool
+    default y
+
 config SOC_PM_SUPPORTED
    bool
    default y
@ -295,6 +303,10 @@ config SOC_GPIO_OUT_RANGE_MAX
    int
    default 21

+config SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP
+    bool
+    default y
+
 config SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK
    int
    default 0
@ -783,6 +795,14 @@ config SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH
    int
    default 12

+config SOC_PM_SUPPORT_EXT1_WAKEUP
+    bool
+    default y
+
+config SOC_PM_SUPPORT_EXT1_WAKEUP_MODE_PER_PIN
+    bool
+    default y
+
 config SOC_PM_SUPPORT_CPU_PD
    bool
    default y
--- a/components/soc/esp32c61/include/soc/soc_caps.h
+++ b/components/soc/esp32c61/include/soc/soc_caps.h
@ -48,7 +48,7 @@
 #define SOC_APM_SUPPORTED               1 /*!< Support for APM peripheral */
 #define SOC_PMU_SUPPORTED               1
 #define SOC_LP_TIMER_SUPPORTED          1
-//  \#define SOC_LP_AON_SUPPORTED            1
+#define SOC_LP_AON_SUPPORTED            1
 //  \#define SOC_LP_PERIPHERALS_SUPPORTED    1
 #define SOC_CLK_TREE_SUPPORTED          1
 //  \#define SOC_ASSIST_DEBUG_SUPPORTED      1    //TODO: [ESP32C61] IDF-9269
@ -61,6 +61,7 @@
 //  \#define SOC_SDIO_SLAVE_SUPPORTED        0
 //  \#define SOC_PAU_SUPPORTED               0
 #define SOC_LIGHT_SLEEP_SUPPORTED       1
+#define SOC_DEEP_SLEEP_SUPPORTED        1
 #define SOC_PM_SUPPORTED                1
 #define SOC_ECDSA_SUPPORTED             1
 #define SOC_SPIRAM_SUPPORTED            1
@ -179,7 +180,7 @@
 #define SOC_GPIO_OUT_RANGE_MAX          21

 // GPIO0~6 on ESP32C61 can support chip deep sleep wakeup
-//  \#define SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP   (1)  //TODO: IDF-9245
+#define SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP   (1)
 #define SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK        (0ULL | BIT0 | BIT1 | BIT2 | BIT3 | BIT4 | BIT5 | BIT6)
 #define SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT      (7)

@ -414,8 +415,8 @@
 // #define SOC_PM_SUPPORT_WIFI_WAKEUP      (1)
 // #define SOC_PM_SUPPORT_BEACON_WAKEUP    (1)
 // #define SOC_PM_SUPPORT_BT_WAKEUP        (1)
-// #define SOC_PM_SUPPORT_EXT1_WAKEUP      (1)
-// #define SOC_PM_SUPPORT_EXT1_WAKEUP_MODE_PER_PIN   (1) /*!<Supports one bit per pin to configure the EXT1 trigger level */
+#define SOC_PM_SUPPORT_EXT1_WAKEUP      (1)
+#define SOC_PM_SUPPORT_EXT1_WAKEUP_MODE_PER_PIN   (1) /*!<Supports one bit per pin to configure the EXT1 trigger level */
 #define SOC_PM_SUPPORT_CPU_PD           (1)
 #define SOC_PM_SUPPORT_MODEM_PD         (1)
 #define SOC_PM_SUPPORT_XTAL32K_PD       (1)
@ -431,8 +432,6 @@
 /* macro redefine for pass esp_wifi headers md5sum check */
 #define MAC_SUPPORT_PMU_MODEM_STATE     SOC_PM_SUPPORT_PMU_MODEM_STATE

-// #define SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY   (1) /*!<Supports CRC only the stub code in RTC memory */
-
 #define SOC_PM_CPU_RETENTION_BY_SW          (1)
 #define SOC_PM_MODEM_RETENTION_BY_REGDMA    (0)
 #define SOC_EXT_MEM_CACHE_TAG_IN_CPU_DOMAIN (1)
--- a/examples/system/.build-test-rules.yml
+++ b/examples/system/.build-test-rules.yml
@ -32,9 +32,9 @@ examples/system/deep_sleep:

 examples/system/deep_sleep_wake_stub:
  disable:
-    - if: IDF_TARGET in ["esp32c2", "esp32p4", "esp32c61"]
+    - if: ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB != 1
      temporary: true
-      reason: target(s) is not supported yet  # TODO: [esp32c61] IDF-9245
+      reason: target(s) is not supported yet

 examples/system/efuse:
  enable:
--- a/examples/system/deep_sleep/README.md
+++ b/examples/system/deep_sleep/README.md
@ -1,5 +1,5 @@
-| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
-| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
+| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
+| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- |

 # Deep Sleep Example

--- a/examples/system/deep_sleep/main/Kconfig.projbuild
+++ b/examples/system/deep_sleep/main/Kconfig.projbuild
@ -41,6 +41,7 @@ menu "Example Configuration"
            default 2 if !IDF_TARGET_ESP32H2
            default 10 if IDF_TARGET_ESP32H2
            range 0 7 if IDF_TARGET_ESP32C6 || IDF_TARGET_ESP32C5
+            range 0 6 if IDF_TARGET_ESP32C61
            range 7 14 if IDF_TARGET_ESP32H2
            range 0 21 if IDF_TARGET_ESP32S2
            range 0 21 if IDF_TARGET_ESP32S3
@ -116,6 +117,7 @@ menu "Example Configuration"
            default 4 if !IDF_TARGET_ESP32H2
            default 11 if IDF_TARGET_ESP32H2
            range 0 7 if IDF_TARGET_ESP32C6 || IDF_TARGET_ESP32C5
+            range 0 6 if IDF_TARGET_ESP32C61
            range 7 14 if IDF_TARGET_ESP32H2
            range 0 21 if IDF_TARGET_ESP32S2
            range 0 21 if IDF_TARGET_ESP32S3
@ -270,6 +272,7 @@ menu "Example Configuration"
            int "Enable wakeup from GPIO"
            default 0
            range 0 7 if IDF_TARGET_ESP32C6 || IDF_TARGET_ESP32C5
+            range 0 6 if IDF_TARGET_ESP32C61
            range 0 15 if IDF_TARGET_ESP32P4
            range 0 5 if !IDF_TARGET_ESP32C6 && !IDF_TARGET_ESP32C5

--- a/examples/system/deep_sleep/pytest_deep_sleep.py
+++ b/examples/system/deep_sleep/pytest_deep_sleep.py
@ -20,6 +20,7 @@ CONFIGS = [
            pytest.mark.esp32c3,
            pytest.mark.esp32c5,
            pytest.mark.esp32c6,
+            pytest.mark.esp32c61,
            pytest.mark.esp32h2,
            pytest.mark.esp32p4,
            pytest.mark.esp32c2,