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https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
sdm: adopt clock tree
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parent
fd5bfb2cd4
commit
754aa7d128
@ -19,6 +19,7 @@
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#include "esp_log.h"
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#include "esp_check.h"
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#include "esp_pm.h"
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#include "clk_tree.h"
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#include "driver/gpio.h"
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#include "driver/sdm.h"
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#include "hal/gpio_hal.h"
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@ -209,46 +210,27 @@ esp_err_t sdm_new_channel(const sdm_config_t *config, sdm_channel_handle_t *ret_
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ESP_GOTO_ON_FALSE(group->clk_src == 0 || group->clk_src == config->clk_src, ESP_ERR_INVALID_ARG, err, TAG, "clock source conflict");
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uint32_t src_clk_hz = 0;
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switch (config->clk_src) {
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#if SOC_SDM_CLK_SUPPORT_APB
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case SDM_CLK_SRC_APB:
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src_clk_hz = esp_clk_apb_freq();
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ESP_GOTO_ON_ERROR(clk_tree_src_get_freq_hz((soc_module_clk_t)config->clk_src,
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CLK_TREE_SRC_FREQ_PRECISION_CACHED, &src_clk_hz), err, TAG, "get source clock frequency failed");
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#if CONFIG_PM_ENABLE
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sprintf(chan->pm_lock_name, "sdm_%d_%d", group->group_id, chan_id); // e.g. sdm_0_0
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ret = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, chan->pm_lock_name, &chan->pm_lock);
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ESP_RETURN_ON_ERROR(ret, TAG, "create APB_FREQ_MAX lock failed");
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#endif
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break;
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#endif // SOC_SDM_CLK_SUPPORT_APB
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esp_pm_lock_type_t pm_type = ESP_PM_NO_LIGHT_SLEEP;
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#if SOC_SDM_CLK_SUPPORT_XTAL
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case SDM_CLK_SRC_XTAL:
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src_clk_hz = esp_clk_xtal_freq();
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break;
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#endif // SOC_SDM_CLK_SUPPORT_XTAL
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#if SOC_SDM_CLK_SUPPORT_PLL_F80M
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case SDM_CLK_SRC_PLL_F80M:
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src_clk_hz = 80 * 1000 * 1000;
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#if CONFIG_PM_ENABLE
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sprintf(chan->pm_lock_name, "sdm_%d_%d", group->group_id, chan_id); // e.g. sdm_0_0
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ret = esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, chan->pm_lock_name, &chan->pm_lock);
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ESP_RETURN_ON_ERROR(ret, TAG, "create NO_LIGHT_SLEEP lock failed");
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#endif // CONFIG_PM_ENABLE
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break;
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#endif // SOC_SDM_CLK_SUPPORT_PLL_F80M
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#if SOC_SDM_CLK_SUPPORT_PLL_F48M
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case SDM_CLK_SRC_PLL_F48M:
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src_clk_hz = 48 * 1000 * 1000;
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#if CONFIG_PM_ENABLE
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sprintf(chan->pm_lock_name, "sdm_%d_%d", group->group_id, chan_id); // e.g. sdm_0_0
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ret = esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, chan->pm_lock_name, &chan->pm_lock);
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ESP_RETURN_ON_ERROR(ret, TAG, "create NO_LIGHT_SLEEP lock failed");
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#endif // CONFIG_PM_ENABLE
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break;
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#endif // SOC_SDM_CLK_SUPPORT_PLL_F48M
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default:
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ESP_GOTO_ON_FALSE(false, ESP_ERR_NOT_SUPPORTED, err, TAG, "clock source %d is not support", config->clk_src);
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break;
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if (config->clk_src == SDM_CLK_SRC_XTAL) {
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pm_type = -1;
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}
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#endif // SOC_SDM_CLK_SUPPORT_XTAL
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#if SOC_SDM_CLK_SUPPORT_APB
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if (config->clk_src == SDM_CLK_SRC_APB) {
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pm_type = ESP_PM_APB_FREQ_MAX;
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}
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#endif // SOC_SDM_CLK_SUPPORT_APB
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if (pm_type >= 0) {
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sprintf(chan->pm_lock_name, "sdm_%d_%d", group->group_id, chan_id); // e.g. sdm_0_0
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ret = esp_pm_lock_create(pm_type, 0, chan->pm_lock_name, &chan->pm_lock);
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ESP_RETURN_ON_ERROR(ret, TAG, "create %s lock failed", chan->pm_lock_name);
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}
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#endif // CONFIG_PM_ENABLE
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group->clk_src = config->clk_src;
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// SDM clock comes from IO MUX, but IO MUX clock might be shared with other submodules as well
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