ci: partially enable ut tests for esp32c2

Disabled test cases are tracked in:

 IDF-4465, IDF-5045, IDF-5057, IDF-5058, IDF-5059, IDF-5060, IDF-5061, IDF-5131

- test_fatfs: IDF-5136

- test_pm: IDF-5053

- test_cache_mmu: IDF-5138

- test_partitions: IDF-5137

- test_vfs: IDF-5139

- test_freertos: IDF-5140

- test_wpa_supplicant: IDF-5046

- test_mbedtls: IDF-5141

- test_pthread: IDF-5142

- test_protocomm: IDF-5143

- test_lightsleep: IDF-5053

- test_taskwdt: IDF-5055

- test_tcp_transport: IDF-5144

- test_app_update: IDF-5145

- test_timer: IDF-5052

- test_spi: IDF-5146

- test_rtc_clk: IDF-5060

- test_heap: IDF-5167

ci: fixed issues for tests of libgcc, ets_timer, newlib

test_pm: support on C2

components/app_update/test/test_switch_ota.c

@@ -32,9 +32,13 @@
 
 #include "driver/gpio.h"
 #include "esp_sleep.h"
+#include "test_utils.h"
 
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5131
 RTC_DATA_ATTR static int boot_count = 0;
+
 static const char *TAG = "ota_test";
 
 /* @brief Copies a current app to next partition using handle.
@@ -821,6 +825,7 @@ static void test_flow6(void)
 // 3 Stage: run OTA0    -> check it -> erase OTA_DATA for next tests    -> PASS
 TEST_CASE_MULTIPLE_STAGES("Switching between factory, OTA0 using esp_ota_write_with_offset", "[app_update][timeout=90][reset=DEEPSLEEP_RESET, DEEPSLEEP_RESET]", start_test, test_flow6, test_flow6);
 
+//IDF-5145
 TEST_CASE("Test bootloader_common_get_sha256_of_partition returns ESP_ERR_IMAGE_INVALID when image is ivalid", "[partitions]")
 {
     const esp_partition_t *cur_app = esp_ota_get_running_partition();
@@ -842,3 +847,4 @@ TEST_CASE("Test bootloader_common_get_sha256_of_partition returns ESP_ERR_IMAGE_
     TEST_ESP_ERR(ESP_ERR_IMAGE_INVALID, bootloader_common_get_sha256_of_partition(other_app->address, other_app->size, other_app->type, sha_256_other_app));
     TEST_ASSERT_EQUAL_MEMORY_MESSAGE(sha_256_cur_app, sha_256_other_app, sizeof(sha_256_cur_app), "must be the same");
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

components/bootloader_support/test/test_verify_image.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -37,6 +37,8 @@ TEST_CASE("Verify bootloader image in flash", "[bootloader_support]")
     TEST_ASSERT_EQUAL(data.image_len, bootloader_length);
 }
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5145
 TEST_CASE("Verify unit test app image", "[bootloader_support]")
 {
     esp_image_metadata_t data = { 0 };
@@ -51,6 +53,7 @@ TEST_CASE("Verify unit test app image", "[bootloader_support]")
     TEST_ASSERT_NOT_EQUAL(0, data.image_len);
     TEST_ASSERT_TRUE(data.image_len <= running->size);
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 void check_label_search (int num_test, const char *list, const char *t_label, bool result)
 {

components/driver/test/test_spi_bus_lock.c

@@ -283,11 +283,12 @@ static void test_bus_lock(bool test_flash)
 
 #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3, ESP32S3, ESP32C2)
 //no runners
+//IDF-5049
 TEST_CASE("spi bus lock, with flash","[spi][test_env=UT_T1_ESP_FLASH]")
 {
     test_bus_lock(true);
 }
-#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2)
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(...)
 
 
 TEST_CASE("spi bus lock","[spi]")

components/driver/test/test_spi_master.c

@@ -30,6 +30,7 @@
 #include "soc/soc_memory_layout.h"
 #include "driver/spi_common_internal.h"
 #include "esp_private/esp_clk.h"
+#include "test_utils.h"
 
 
 const static char TAG[] = "test_spi";
@@ -604,6 +605,8 @@ TEST_CASE("SPI Master no response when switch from host1 (SPI2) to host2 (SPI3)"
     TEST_ESP_OK(spi_bus_free(host));
 }
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5146
 DRAM_ATTR  static uint32_t data_dram[80] = {0};
 //force to place in code area.
 static const uint8_t data_drom[320 + 3] = {
@@ -717,6 +720,7 @@ TEST_CASE("SPI Master DMA test, TX and RX in different regions", "[spi]")
     free(data_iram);
 #endif
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 //this part tests 3 DMA issues in master mode, full-duplex in IDF2.1
 // 1. RX buffer not aligned (start and end)
@@ -1123,6 +1127,7 @@ TEST_CASE("SPI master hd dma TX without RX test", "[spi]")
 }
 #endif  //#if (TEST_SPI_PERIPH_NUM >= 2)
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32)    //TODO: IDF-3494
 #define FD_TEST_BUF_SIZE    32
 #define TEST_NUM            4
@@ -1298,6 +1303,7 @@ static void fd_slave(void)
 
 TEST_CASE_MULTIPLE_DEVICES("SPI Master: FD, DMA, Master Single Direction Test", "[spi_ms][test_env=Example_SPI_Multi_device]", fd_master, fd_slave);
 #endif  //#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32)    //TODO: IDF-3494
+#endif  //#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)    //TODO: IDF-3494
 
 //NOTE: Explained in IDF-1445 | MR !14996
 #if !(CONFIG_SPIRAM) || (CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL >= 16384)
@@ -1306,6 +1312,8 @@ TEST_CASE_MULTIPLE_DEVICES("SPI Master: FD, DMA, Master Single Direction Test",
  ********************************************************************************/
 //Disabled since the check in portENTER_CRITICAL in esp_intr_enable/disable increase the delay
 #ifndef CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5146
 
 #define RECORD_TIME_PREPARE() uint32_t __t1, __t2
 #define RECORD_TIME_START()   do {__t1 = esp_cpu_get_ccount();}while(0)
@@ -1446,5 +1454,7 @@ TEST_CASE("spi_speed", "[spi]")
     spi_device_release_bus(spi);
     master_free_device_bus(spi);
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+
 #endif // CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE
 #endif // !(CONFIG_SPIRAM) || (CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL >= 16384)

components/driver/test/test_spi_param.c

@@ -622,7 +622,7 @@ TEST_CASE("Slave receive correct data", "[spi]")
     }
 }
 
-#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3, ESP32C2)
 //These tests are ESP32 only due to lack of runners
 /********************************************************************************
  *      Test By Master & Slave (2 boards)
@@ -1175,6 +1175,6 @@ spitest_param_set_t mode_conf[] = {
 };
 TEST_SPI_MASTER_SLAVE(MODE, mode_conf, "")
 
-#endif // !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)
+#endif // !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3, ESP32C2)
 
 #endif // #if (TEST_SPI_PERIPH_NUM >= 2)

components/driver/test/test_spi_slave.c

@@ -261,6 +261,7 @@ TEST_CASE("test slave send unaligned","[spi]")
 
 #endif // #if (TEST_SPI_PERIPH_NUM >= 2)
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 #if (TEST_SPI_PERIPH_NUM == 1)
 //These tests are for chips which only have 1 SPI controller
 /********************************************************************************
@@ -384,3 +385,4 @@ static void unaligned_test_slave(void)
 TEST_CASE_MULTIPLE_DEVICES("SPI_Slave_Unaligned_Test", "[spi_ms][test_env=Example_SPI_Multi_device][timeout=120]", unaligned_test_master, unaligned_test_slave);
 
 #endif  //#if (TEST_SPI_PERIPH_NUM == 1)
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(...)

components/driver/test/test_spi_slave_hd.c

@@ -601,6 +601,7 @@ TEST_CASE("test spi slave hd segment mode, master too long", "[spi][spi_slv_hd]"
 
 #if (TEST_SPI_PERIPH_NUM == 1)
 #if SOC_SPI_SUPPORT_SLAVE_HD_VER2
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 //These tests are for chips which only have 1 SPI controller
 /********************************************************************************
  *      Test By Master & Slave (2 boards)
@@ -747,9 +748,7 @@ static void hd_slave(void)
     spi_slave_hd_deinit(TEST_SLAVE_HOST);
 }
 
-
 TEST_CASE_MULTIPLE_DEVICES("SPI Slave HD: segment mode, master sends too long", "[spi_ms][test_env=Example_SPI_Multi_device]", hd_master, hd_slave);
-
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(...)
 #endif  //#if SOC_SPI_SUPPORT_SLAVE_HD_VER2
-
 #endif  //#if (TEST_SPI_PERIPH_NUM == 1)

components/esp-tls/test/test_esp_tls.c

@@ -16,6 +16,10 @@
 #elif SOC_SHA_SUPPORT_DMA
 #include "sha/sha_dma.h"
 #endif
+#include "test_utils.h"
+
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5044
 
 const char *test_cert_pem =   "-----BEGIN CERTIFICATE-----\n"\
                               "MIICrDCCAZQCCQD88gCs5AFs/jANBgkqhkiG9w0BAQsFADAYMRYwFAYDVQQDDA1F\n"\
@@ -120,3 +124,5 @@ TEST_CASE("esp_tls_server session create delete", "[esp-tls][leaks=0]")
     esp_tls_server_session_delete(tls);
 }
 #endif
+
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

components/esp_common/test/test_attr.c

@@ -13,16 +13,7 @@
 #if CONFIG_IDF_TARGET_ESP32
 #include "spiram.h"
 #endif
-
+#include "test_utils.h"
-static __NOINIT_ATTR uint32_t s_noinit;
-static RTC_NOINIT_ATTR uint32_t s_rtc_noinit;
-static RTC_DATA_ATTR uint32_t s_rtc_data;
-static RTC_RODATA_ATTR uint32_t s_rtc_rodata;
-static RTC_FAST_ATTR uint32_t s_rtc_force_fast;
-static RTC_SLOW_ATTR uint32_t s_rtc_force_slow;
-#if CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY
-static EXT_RAM_NOINIT_ATTR uint32_t s_noinit_ext;
-#endif
 
 extern int _rtc_noinit_start;
 extern int _rtc_noinit_end;
@@ -40,6 +31,19 @@ extern int _ext_ram_bss_start;
 extern int _ext_ram_bss_end;
 
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5045
+//Variables for test: Attributes place variables into correct sections
+static __NOINIT_ATTR uint32_t s_noinit;
+static RTC_NOINIT_ATTR uint32_t s_rtc_noinit;
+static RTC_DATA_ATTR uint32_t s_rtc_data;
+static RTC_RODATA_ATTR uint32_t s_rtc_rodata;
+static RTC_FAST_ATTR uint32_t s_rtc_force_fast;
+static RTC_SLOW_ATTR uint32_t s_rtc_force_slow;
+#if CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY
+static EXT_RAM_NOINIT_ATTR uint32_t s_noinit_ext;
+#endif
+
 static bool data_in_segment(void *ptr, int *seg_start, int *seg_end)
 {
     return ((intptr_t)ptr < (intptr_t)seg_end) && \
@@ -75,6 +79,7 @@ TEST_CASE("Attributes place variables into correct sections", "[ld]")
 #endif
 }
 
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 #if CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY
 

components/esp_event/test/test_event.c

@@ -21,6 +21,9 @@
 
 #include "test_utils.h"
 
+
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-4035
 static const char* TAG = "test_event";
 
 #define TEST_CONFIG_ITEMS_TO_REGISTER        5
@@ -2018,3 +2021,4 @@ TEST_CASE("can post events from interrupt handler", "[event]")
 }
 
 #endif // CONFIG_ESP_EVENT_POST_FROM_ISR
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

components/esp_hw_support/test/test_intr_alloc.c

@@ -196,6 +196,9 @@ TEST_CASE("allocate 2 handlers for a same source and remove the later one", "[in
     esp_intr_free(handle1);
 }
 
+
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5061
 static void dummy(void *arg)
 {
 }
@@ -224,6 +227,8 @@ TEST_CASE("Can allocate IRAM int only with an IRAM handler", "[intr_alloc]")
     TEST_ESP_OK(err);
 }
 
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+
 #ifndef CONFIG_FREERTOS_UNICORE
 void isr_free_task(void *param)
 {

components/esp_hw_support/test/test_rtc_clk.c

@@ -349,6 +349,8 @@ TEST_CASE("Test starting 'External 32kHz XTAL' on the board without it.", "[rtc_
 
 #endif // !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5060
 TEST_CASE("Test rtc clk calibration compensation", "[rtc_clk]")
 {
     int64_t t1 = esp_rtc_get_time_us();
@@ -378,7 +380,6 @@ TEST_CASE("Test rtc clk calibration compensation", "[rtc_clk]")
 
 #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
 /* Disabled until deep sleep is brought up TODO ESP32-S3 IDF-2691 */
-
 static RTC_NOINIT_ATTR int64_t start = 0;
 
 static void trigger_deepsleep(void)
@@ -431,3 +432,4 @@ static void check_time_deepsleep_2(void)
 TEST_CASE_MULTIPLE_STAGES("Test rtc clk calibration compensation across deep sleep", "[rtc_clk][reset=DEEPSLEEP_RESET, DEEPSLEEP_RESET]", trigger_deepsleep, check_time_deepsleep_1, check_time_deepsleep_2);
 
 #endif // !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

components/esp_netif/test/test_esp_netif.c

@@ -75,6 +75,10 @@ TEST_CASE("esp_netif: create and delete multiple netifs", "[esp_netif][leaks=0]"
 
 }
 
+
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5047
+
 TEST_CASE("esp_netif: test dhcp client state transitions for wifi station", "[esp_netif]")
 {
     // init default wifi netif
@@ -298,6 +302,8 @@ TEST_CASE("esp_netif: get/set hostname", "[esp_netif]")
     esp_netif_destroy(esp_netif);
 }
 
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+
 TEST_CASE("esp_netif: convert ip address from string", "[esp_netif]")
 {
     const char *ipv4_src[] = {"127.168.1.1", "255.255.255.0", "305.500.721.801", "127.168.1..", "abc.def.***.ddd"};
@@ -322,6 +328,8 @@ TEST_CASE("esp_netif: convert ip address from string", "[esp_netif]")
     TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, esp_netif_str_to_ip6(ipv6_src[0], NULL));
 }
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5047
 TEST_CASE("esp_netif: create and destroy default wifi interfaces", "[esp_netif][leaks=0]")
 {
     // Helper constants to refer default STA and AP's params
@@ -356,6 +364,9 @@ TEST_CASE("esp_netif: create and destroy default wifi interfaces", "[esp_netif][
     esp_netif_destroy_default_wifi(sta);
 }
 
+
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+
 static esp_err_t dummy_transmit(void* hd, void *buf, size_t length)
 {
     return ESP_OK;

components/esp_phy/test/test_phy_rtc.c

@@ -7,13 +7,17 @@
 #include "esp_log.h"
 #include "nvs_flash.h"
 #include "test_utils.h"
-#include "esp_phy_init.h"
 #include <freertos/FreeRTOS.h>
 #include <freertos/task.h>
 #include <freertos/semphr.h>
 #include "soc/soc_caps.h"
 #include "esp_private/wifi.h"
 
+
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5046
+#include "esp_phy_init.h"
+
 #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3)
 
 //Function just extern, need not test
@@ -126,3 +130,5 @@ TEST_CASE("Test PHY/RTC functions called when cache is disabled", "[phy_rtc][cac
     vSemaphoreDelete(semphr_done);
 }
 #endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2)
+
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

components/esp_pm/test/CMakeLists.txt

@@ -1,2 +1,2 @@
 idf_component_register(SRC_DIRS .
-                       PRIV_REQUIRES unity esp_pm ulp driver esp_timer)
+                       PRIV_REQUIRES unity esp_pm ulp driver esp_timer test_utils)

components/esp_pm/test/test_pm.c

@@ -18,6 +18,7 @@
 #include "soc/rtc_periph.h"
 #include "esp_rom_sys.h"
 #include "esp_private/esp_clk.h"
+#include "test_utils.h"
 
 #include "sdkconfig.h"
 
@@ -38,6 +39,8 @@ TEST_CASE("Can dump power management lock stats", "[pm]")
 
 #ifdef CONFIG_PM_ENABLE
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5053
 static void switch_freq(int mhz)
 {
     int xtal_freq_mhz = esp_clk_xtal_freq() / MHZ;
@@ -47,6 +50,8 @@ static void switch_freq(int mhz)
     esp_pm_config_esp32s2_t pm_config = {
 #elif CONFIG_IDF_TARGET_ESP32S3
     esp_pm_config_esp32s3_t pm_config = {
+#elif CONFIG_IDF_TARGET_ESP32C2
+    esp_pm_config_esp32c2_t pm_config = {
 #elif CONFIG_IDF_TARGET_ESP32C3
     esp_pm_config_esp32c3_t pm_config = {
 #elif CONFIG_IDF_TARGET_ESP32H2
@@ -81,6 +86,7 @@ TEST_CASE("Can switch frequency using esp_pm_configure", "[pm]")
 
     switch_freq(orig_freq_mhz);
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
 
@@ -95,6 +101,8 @@ static void light_sleep_enable(void)
     esp_pm_config_esp32s2_t pm_config = {
 #elif CONFIG_IDF_TARGET_ESP32S3
     esp_pm_config_esp32s3_t pm_config = {
+#elif CONFIG_IDF_TARGET_ESP32C2
+    esp_pm_config_esp32c2_t pm_config = {
 #elif CONFIG_IDF_TARGET_ESP32C3
     esp_pm_config_esp32c3_t pm_config = {
 #elif CONFIG_IDF_TARGET_ESP32H2
@@ -117,6 +125,8 @@ static void light_sleep_disable(void)
     esp_pm_config_esp32s2_t pm_config = {
 #elif CONFIG_IDF_TARGET_ESP32S3
     esp_pm_config_esp32s3_t pm_config = {
+#elif CONFIG_IDF_TARGET_ESP32C2
+    esp_pm_config_esp32c2_t pm_config = {
 #elif CONFIG_IDF_TARGET_ESP32C3
     esp_pm_config_esp32c3_t pm_config = {
 #elif CONFIG_IDF_TARGET_ESP32H2
@@ -128,6 +138,8 @@ static void light_sleep_disable(void)
     ESP_ERROR_CHECK( esp_pm_configure(&pm_config) );
 }
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5053
 TEST_CASE("Automatic light occurs when tasks are suspended", "[pm]")
 {
     gptimer_handle_t gptimer = NULL;
@@ -178,6 +190,7 @@ TEST_CASE("Automatic light occurs when tasks are suspended", "[pm]")
     TEST_ESP_OK(gptimer_disable(gptimer));
     TEST_ESP_OK(gptimer_del_timer(gptimer));
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 #if CONFIG_ULP_COPROC_TYPE_FSM
 #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
@@ -255,6 +268,8 @@ TEST_CASE("Can wake up from automatic light sleep by GPIO", "[pm][ignore]")
 #endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
 #endif //CONFIG_ULP_COPROC_TYPE_FSM
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5053
 typedef struct {
     int delay_us;
     int result;
@@ -375,6 +390,7 @@ TEST_CASE("esp_timer produces correct delays with light sleep", "[pm]")
 
 #undef NUM_INTERVALS
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 static void timer_cb1(void *arg)
 {

components/esp_rom/test/test_libgcc.c

@@ -175,7 +175,7 @@ TEST_CASE("libgcc math functions", "[rom][libgcc]")
     TEST_ASSERT(__umoddi3(15, 2) == 1);
     extern unsigned __umodsi3(unsigned x, unsigned y);
     TEST_ASSERT(__umodsi3(15, 2) == 1);
-#if !CONFIG_IDF_TARGET_ESP32C3
+#if !(CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3)
     extern uint64_t __umulsidi3(unsigned x, unsigned y);
     TEST_ASSERT(__umulsidi3(0x10000000, 0x10000000) == 0x100000000000000ULL);
 #endif

components/esp_system/test/test_reset_reason.c

@@ -13,17 +13,6 @@
 
 #define CHECK_VALUE 0x89abcdef
 
-static __NOINIT_ATTR uint32_t s_noinit_val;
-static RTC_NOINIT_ATTR uint32_t s_rtc_noinit_val;
-static RTC_DATA_ATTR uint32_t s_rtc_data_val;
-static RTC_BSS_ATTR uint32_t s_rtc_bss_val;
-/* There is no practical difference between placing something into RTC_DATA and
- * RTC_RODATA. This only checks a usage pattern where the variable has a non-zero
- * initializer (should be initialized by the bootloader).
- */
-static RTC_RODATA_ATTR uint32_t s_rtc_rodata_val = CHECK_VALUE;
-static RTC_FAST_ATTR uint32_t s_rtc_force_fast_val;
-static RTC_SLOW_ATTR uint32_t s_rtc_force_slow_val;
 
 #if CONFIG_IDF_TARGET_ESP32
 #define DEEPSLEEP           "DEEPSLEEP_RESET"
@@ -61,6 +50,30 @@ static RTC_SLOW_ATTR uint32_t s_rtc_force_slow_val;
 
 #endif // CONFIG_IDF_TARGET_ESP32
 
+
+/* This test needs special test runners: rev1 silicon, and SPI flash with
+ * fast start-up time. Otherwise reset reason will be RTCWDT_RESET.
+ */
+TEST_CASE("reset reason ESP_RST_POWERON", "[reset][ignore]")
+{
+    TEST_ASSERT_EQUAL(ESP_RST_POWERON, esp_reset_reason());
+}
+
+
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5059
+static __NOINIT_ATTR uint32_t s_noinit_val;
+static RTC_NOINIT_ATTR uint32_t s_rtc_noinit_val;
+static RTC_DATA_ATTR uint32_t s_rtc_data_val;
+static RTC_BSS_ATTR uint32_t s_rtc_bss_val;
+/* There is no practical difference between placing something into RTC_DATA and
+ * RTC_RODATA. This only checks a usage pattern where the variable has a non-zero
+ * initializer (should be initialized by the bootloader).
+ */
+static RTC_RODATA_ATTR uint32_t s_rtc_rodata_val = CHECK_VALUE;
+static RTC_FAST_ATTR uint32_t s_rtc_force_fast_val;
+static RTC_SLOW_ATTR uint32_t s_rtc_force_slow_val;
+
 static void setup_values(void)
 {
     s_noinit_val = CHECK_VALUE;
@@ -73,14 +86,6 @@ static void setup_values(void)
     s_rtc_force_slow_val = CHECK_VALUE;
 }
 
-/* This test needs special test runners: rev1 silicon, and SPI flash with
- * fast start-up time. Otherwise reset reason will be RTCWDT_RESET.
- */
-TEST_CASE("reset reason ESP_RST_POWERON", "[reset][ignore]")
-{
-    TEST_ASSERT_EQUAL(ESP_RST_POWERON, esp_reset_reason());
-}
-
 #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
 static void do_deep_sleep(void)
 {
@@ -298,6 +303,8 @@ TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_BROWNOUT after brownout event",
         do_brownout,
         check_reset_reason_brownout);
 
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+
 
 #ifdef CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
 #ifndef CONFIG_FREERTOS_UNICORE

components/esp_system/test/test_sleep.c

@@ -55,8 +55,16 @@ static void do_deep_sleep_from_app_cpu(void)
         ;
     }
 }
+
+TEST_CASE("enter deep sleep on APP CPU and wake up using timer", "[deepsleep][reset=DEEPSLEEP_RESET]")
+{
+    esp_sleep_enable_timer_wakeup(2000000);
+    do_deep_sleep_from_app_cpu();
+}
 #endif
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5131
 TEST_CASE("wake up from deep sleep using timer", "[deepsleep][reset=DEEPSLEEP_RESET]")
 {
     esp_sleep_enable_timer_wakeup(2000000);
@@ -70,6 +78,7 @@ TEST_CASE("light sleep followed by deep sleep", "[deepsleep][reset=DEEPSLEEP_RES
     esp_deep_sleep_start();
 }
 
+//IDF-5053
 TEST_CASE("wake up from light sleep using timer", "[deepsleep]")
 {
     esp_sleep_enable_timer_wakeup(2000000);
@@ -81,6 +90,7 @@ TEST_CASE("wake up from light sleep using timer", "[deepsleep]")
                (tv_stop.tv_usec - tv_start.tv_usec) * 1e-3f;
     TEST_ASSERT_INT32_WITHIN(500, 2000, (int) dt);
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 //NOTE: Explained in IDF-1445 | MR !14996
 #if !(CONFIG_SPIRAM) || (CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL >= 16384)
@@ -218,14 +228,8 @@ TEST_CASE("light sleep and frequency switching", "[deepsleep]")
     }
 }
 
-#ifndef CONFIG_FREERTOS_UNICORE
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
-TEST_CASE("enter deep sleep on APP CPU and wake up using timer", "[deepsleep][reset=DEEPSLEEP_RESET]")
+//IDF-5131
-{
-    esp_sleep_enable_timer_wakeup(2000000);
-    do_deep_sleep_from_app_cpu();
-}
-#endif
-
 static void do_deep_sleep(void)
 {
     esp_sleep_enable_timer_wakeup(100000);
@@ -292,10 +296,13 @@ static void check_wake_stub(void)
 #endif
 }
 
+
 TEST_CASE_MULTIPLE_STAGES("can set sleep wake stub", "[deepsleep][reset=DEEPSLEEP_RESET]",
         prepare_wake_stub,
         check_wake_stub);
 
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+
 
 #if CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
 
@@ -363,6 +370,9 @@ TEST_CASE_MULTIPLE_STAGES("can set sleep wake stub from stack in RTC RAM", "[dee
 
 #if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
 
+
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5131
 TEST_CASE("wake up using ext0 (13 high)", "[deepsleep][ignore]")
 {
     ESP_ERROR_CHECK(rtc_gpio_init(GPIO_NUM_13));
@@ -417,6 +427,8 @@ TEST_CASE("wake up using ext1 when RTC_PERIPH is on (13 low)", "[deepsleep][igno
     esp_deep_sleep_start();
 }
 
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+
 __attribute__((unused)) static float get_time_ms(void)
 {
     gettimeofday(&tv_stop, NULL);
@@ -512,6 +524,8 @@ TEST_CASE("disable source trigger behavior", "[deepsleep]")
 
 #endif //SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5131
 static RTC_DATA_ATTR struct timeval start;
 static void trigger_deepsleep(void)
 {
@@ -571,3 +585,4 @@ TEST_CASE("wake up using GPIO (2 or 4 low)", "[deepsleep][ignore]")
     esp_deep_sleep_start();
 }
 #endif // SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

components/esp_system/test/test_task_wdt.c

@@ -8,6 +8,7 @@
 #include "unity.h"
 #include "esp_rom_sys.h"
 #include "esp_task_wdt.h"
+#include "test_utils.h"
 
 #define TASK_WDT_TIMEOUT_MS     1000
 
@@ -18,6 +19,8 @@ void esp_task_wdt_isr_user_handler(void)
     timeout_flag = true;
 }
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5055
 TEST_CASE("Task WDT task timeout", "[task_wdt]")
 {
     timeout_flag = false;
@@ -34,6 +37,7 @@ TEST_CASE("Task WDT task timeout", "[task_wdt]")
     TEST_ASSERT_EQUAL(ESP_OK, esp_task_wdt_delete(NULL));
     TEST_ASSERT_EQUAL(ESP_OK, esp_task_wdt_deinit());
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 TEST_CASE("Task WDT task feed", "[task_wdt]")
 {
@@ -54,6 +58,8 @@ TEST_CASE("Task WDT task feed", "[task_wdt]")
     TEST_ASSERT_EQUAL(ESP_OK, esp_task_wdt_deinit());
 }
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5055
 TEST_CASE("Task WDT user timeout", "[task_wdt]")
 {
     const char *user_name = "test_user";
@@ -72,6 +78,7 @@ TEST_CASE("Task WDT user timeout", "[task_wdt]")
     TEST_ASSERT_EQUAL(ESP_OK, esp_task_wdt_delete_user(user_handle));
     TEST_ASSERT_EQUAL(ESP_OK, esp_task_wdt_deinit());
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 TEST_CASE("Task WDT user feed", "[task_wdt]")
 {

components/esp_system/test_apps/rtc_8md256/main/test_rtc_8md256.c

@@ -15,6 +15,10 @@
 #include "freertos/FreeRTOS.h"
 #include "soc/soc_caps.h"
 
+
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5131
+
 static const char TAG[] = "rtc_8m";
 
 static void test_deepsleep(bool force_rtc_periph)
@@ -36,6 +40,7 @@ TEST_CASE("Can use 8MD256 as RTC clock source in deepsleep", "[pm]")
 {
     test_deepsleep(false);
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 static void test_lightsleep(bool force_rtc_periph)
 {

components/esp_system/test_apps/rtc_8md256/pytest_rtc_8md256.py

@@ -16,7 +16,11 @@ def deepsleep_test(dut: Dut, case_name: str) -> None:
         dut.expect(r'rst:.*\(%s\)' % reset_reason, timeout=10)
 
 
-@pytest.mark.supported_targets
+# IDF-5131
+@pytest.mark.esp32
+@pytest.mark.esp32s2
+@pytest.mark.esp32s3
+@pytest.mark.esp32c3
 @pytest.mark.generic
 def test_rtc_8md256_deepsleep(dut: Dut) -> None:
     deepsleep_test(dut, '"Can use 8MD256 as RTC clock source in deepsleep"')

components/esp_timer/test/test_esp_timer.c

@@ -381,6 +381,8 @@ TEST_CASE("esp_timer for very short intervals", "[esp_timer]")
 }
 
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5052
 TEST_CASE("esp_timer_get_time call takes less than 1us", "[esp_timer]")
 {
     int64_t begin = esp_timer_get_time();
@@ -392,6 +394,7 @@ TEST_CASE("esp_timer_get_time call takes less than 1us", "[esp_timer]")
     int ns_per_call = (int) ((end - begin) * 1000 / iter_count);
     TEST_PERFORMANCE_LESS_THAN(ESP_TIMER_GET_TIME_PER_CALL, "%dns", ns_per_call);
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 static int64_t IRAM_ATTR __attribute__((noinline)) get_clock_diff(void)
 {

components/esp_timer/test/test_ets_timer.c

@@ -18,6 +18,8 @@
 #include "esp32c3/rom/ets_sys.h"
 #elif CONFIG_IDF_TARGET_ESP32H2
 #include "esp32h2/rom/ets_sys.h"
+#elif CONFIG_IDF_TARGET_ESP32C2
+#include "esp32c2/rom/ets_sys.h"
 #endif
 
 static void test_correct_delay_timer_func(void* arg)

components/esp_wifi/test/test_wifi.c

@@ -32,8 +32,9 @@
 
 #define EVENT_HANDLER_FLAG_DO_NOT_AUTO_RECONNECT 0x00000001
 
-#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3, ESP32C2)
-/* TODO IDF-2618 */
+/* TODO IDF-2618, IDF-5046 */
+//IDF-5046
 static const char* TAG = "test_wifi";
 static uint32_t wifi_event_handler_flag;
 
@@ -352,4 +353,4 @@ static void test_wifi_connection_softap(void)
 
 TEST_CASE_MULTIPLE_DEVICES("test wifi retain connection for 60s", "[wifi][test_env=UT_T2_1][timeout=90]", test_wifi_connection_sta, test_wifi_connection_softap);
 
-#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(...)

components/esp_wifi/test/test_wifi_init.c

@@ -14,6 +14,8 @@
 #define EVENT_HANDLER_FLAG_DO_NOT_AUTO_RECONNECT 0x00000001
 #define EMPH_STR(s) "****** "s" ******"
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5046
 static const char* TAG = "test_wifi_init";
 static uint32_t wifi_event_handler_flag;
 static EventGroupHandle_t wifi_events;
@@ -276,3 +278,5 @@ TEST_CASE("Calling esp_wifi_deinit() without stop", "[wifi_init]")
     sema = NULL;
     unity_utils_task_delete(th);
 }
+
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

components/espcoredump/test/CMakeLists.txt

@@ -3,5 +3,5 @@ if(TESTS_ALL EQUAL 1)
 else()
     idf_component_register(SRC_DIRS "."
                         PRIV_INCLUDE_DIRS "."
-                        PRIV_REQUIRES cmock nvs_flash)
+                        PRIV_REQUIRES cmock nvs_flash test_utils)
 endif()

components/espcoredump/test/test_sections.c

@@ -6,6 +6,10 @@
 #include <string.h>
 #include "unity.h"
 #include "esp_attr.h"
+#include "test_utils.h"
+
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5050
 
 /* Global variables that should be part of the coredump */
 COREDUMP_IRAM_DATA_ATTR uint32_t var_iram = 0x42;
@@ -58,3 +62,5 @@ TEST_CASE("test variables presence in core dump sections", "[espcoredump]")
     TEST_ASSERT(section_size > 0);
     TEST_ASSERT(is_addr_in_region(&var_rtcfast, (uint8_t*) section_start, section_size));
 }
+
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

components/fatfs/test/test_fatfs_rawflash.c

@@ -24,6 +24,8 @@
 #include "esp_rom_sys.h"
 
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5136
 static void test_setup(size_t max_files)
 {
     extern const char fatfs_start[] asm("_binary_fatfs_img_start");
@@ -337,3 +339,10 @@ TEST_CASE("(raw) read speed test", "[fatfs][timeout=60]")
     free(buf);
     test_teardown();
 }
+#else //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+TEST_CASE("FATFS dummy test", "[spi_flash]")
+{
+    printf("This test does nothing, just to make the UT build fatfs-fast-seek passed.\n");
+    printf("When any case above is supported, remove this test case\n");
+}
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

components/fatfs/test/test_fatfs_spiflash.c

@@ -23,6 +23,8 @@
 #include "esp_partition.h"
 
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5136
 static wl_handle_t s_test_wl_handle;
 static void test_setup(void)
 {
@@ -200,6 +202,7 @@ TEST_CASE("(WL) can get partition info", "[fatfs][wear_levelling]")
     test_fatfs_info("/spiflash", "/spiflash/test.txt");
     test_teardown();
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 /*
  * In FatFs menuconfig, set CONFIG_FATFS_API_ENCODING to UTF-8 and set the
@@ -207,6 +210,9 @@ TEST_CASE("(WL) can get partition info", "[fatfs][wear_levelling]")
  * Ensure that the text editor is UTF-8 compatible when compiling these tests.
  */
 #if defined(CONFIG_FATFS_API_ENCODING_UTF_8) && (CONFIG_FATFS_CODEPAGE == 936)
+
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5136
 TEST_CASE("(WL) can read file with UTF-8 encoded strings", "[fatfs][wear_levelling]")
 {
     test_setup();
@@ -221,7 +227,8 @@ TEST_CASE("(WL) opendir, readdir, rewinddir, seekdir work as expected using UTF-
     test_fatfs_opendir_readdir_rewinddir_utf_8("/spiflash/目录");
     test_teardown();
 }
-#endif
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+#endif //defined(CONFIG_FATFS_API_ENCODING_UTF_8) && (CONFIG_FATFS_CODEPAGE == 936)
 
 #ifdef CONFIG_SPIRAM
 TEST_CASE("FATFS prefers SPI RAM for allocations", "[fatfs]")

components/freertos/test/integration/timers/test_timers.c

@@ -11,6 +11,7 @@
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
 #include "freertos/timers.h"
+#include "test_utils.h"
 
 static void timer_callback(TimerHandle_t timer)
 {
@@ -20,6 +21,8 @@ static void timer_callback(TimerHandle_t timer)
     printf("Callback timer %p count %p = %d\n", timer, count, *count);
 }
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5140
 TEST_CASE("Oneshot FreeRTOS timers", "[freertos]")
 {
     volatile int count = 0;
@@ -74,6 +77,7 @@ TEST_CASE("Recurring FreeRTOS timers", "[freertos]")
 
     TEST_ASSERT( xTimerDelete(recurring, 1) );
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 TEST_CASE("Static timer creation", "[freertos]")
 {

components/freertos/test/port/test_newlib_reent.c

@@ -17,10 +17,13 @@
 #include "freertos/semphr.h"
 #include "freertos/queue.h"
 #include "unity.h"
+#include "test_utils.h"
 
 volatile static int done;
 volatile static int error;
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5140
 static void tskTestRand(void *pvParameters)
 {
     int l;
@@ -57,3 +60,4 @@ TEST_CASE("Test for per-task non-reentrant tasks", "[freertos]")
     }
     TEST_ASSERT(error == 0);
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

components/hal/test/test_mpu.c

@@ -10,6 +10,8 @@
 // LL still not implemented
 
 #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3)
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5058
 
 volatile static int RTC_NOINIT_ATTR access = 0;
 
@@ -47,4 +49,5 @@ TEST_CASE_MULTIPLE_STAGES("Can set illegal access regions", "[soc][mpu]",
         trigger_illegal_access,
         check_access);
 
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 #endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3)

components/heap/test/test_diram.c

@@ -10,6 +10,8 @@
 
 #define ALLOC_SZ 1024
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5167
 static void *malloc_block_diram(uint32_t caps)
 {
     void *attempts[256] = { 0 }; // Allocate up to 256 ALLOC_SZ blocks to exhaust all non-D/IRAM memory temporarily
@@ -72,3 +74,4 @@ TEST_CASE("Allocate D/IRAM as IRAM", "[heap]")
 
     free(iram);
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

components/heap/test/test_malloc_caps.c

@@ -12,6 +12,9 @@
 #include <stdlib.h>
 #include <sys/param.h>
 
+
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5167
 #ifndef CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
 TEST_CASE("Capabilities allocator test", "[heap]")
 {
@@ -103,6 +106,7 @@ TEST_CASE("Capabilities allocator test", "[heap]")
     printf("Done.\n");
 }
 #endif
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 #ifdef CONFIG_ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY
 TEST_CASE("IRAM_8BIT capability test", "[heap]")
@@ -165,6 +169,8 @@ TEST_CASE("heap_caps metadata test", "[heap]")
     TEST_ASSERT(after.minimum_free_bytes < original.total_free_bytes);
 }
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5167
 /* Small function runs from IRAM to check that malloc/free/realloc
    all work OK when cache is disabled...
 */
@@ -189,6 +195,7 @@ TEST_CASE("heap_caps_xxx functions work with flash cache disabled", "[heap]")
 {
     TEST_ASSERT( iram_malloc_test() );
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 #ifdef CONFIG_HEAP_ABORT_WHEN_ALLOCATION_FAILS
 TEST_CASE("When enabled, allocation operation failure generates an abort", "[heap][reset=abort,SW_CPU_RESET]")

components/heap/test/test_realloc.c

@@ -23,6 +23,8 @@ TEST_CASE("realloc shrink buffer in place", "[heap]")
 
 #endif
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5167
 #ifndef CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
 TEST_CASE("realloc shrink buffer with EXEC CAPS", "[heap]")
 {
@@ -65,3 +67,4 @@ TEST_CASE("realloc move data to a new heap type", "[heap]")
     free(c);
 }
 #endif
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

components/lwip/test/test_lwip_apps.c

@@ -18,6 +18,8 @@
 #define ETH_PING_END_TIMEOUT_MS (ETH_PING_DURATION_MS * 2)
 #define TEST_ICMP_DESTINATION_DOMAIN_NAME "127.0.0.1"
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5047
 static void test_on_ping_success(esp_ping_handle_t hdl, void *args)
 {
     uint8_t ttl;
@@ -110,6 +112,7 @@ TEST_CASE("localhost ping test", "[lwip]")
 
     vEventGroupDelete(eth_event_group);
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 TEST_CASE("dhcp server init/deinit", "[lwip][leaks=0]")
 {

components/mbedtls/test/test_aes.c

@@ -16,6 +16,9 @@
 #include "freertos/task.h"
 #include "freertos/semphr.h"
 
+
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5141
 static const uint8_t key_256[] = {
     0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
     0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
@@ -298,6 +301,7 @@ TEST_CASE("mbedtls CFB-128 AES-256 test", "[aes]")
     free(chipertext);
     free(decryptedtext);
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 static void aes_ctr_stream_test(void)
 {
@@ -399,6 +403,8 @@ static void aes_ctr_stream_test(void)
     free(decryptedtext);
 }
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5141
 TEST_CASE("mbedtls CTR stream test", "[aes]")
 {
     aes_ctr_stream_test();
@@ -778,6 +784,7 @@ TEST_CASE("mbedtls OFB, chained DMA descriptors", "[aes]")
     free(chipertext);
     free(decryptedtext);
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 
 
@@ -839,11 +846,14 @@ void aes_ctr_alignment_test(uint32_t input_buf_caps, uint32_t output_buf_caps)
     free(decryptedtext);
 }
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5141
 TEST_CASE("mbedtls AES internal mem alignment tests", "[aes]")
 {
     uint32_t internal_dma_caps = MALLOC_CAP_DMA | MALLOC_CAP_8BIT | MALLOC_CAP_INTERNAL;
     aes_ctr_alignment_test(internal_dma_caps, internal_dma_caps);
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 
 #ifdef CONFIG_SPIRAM_USE_MALLOC

components/mbedtls/test/test_aes_perf.c

@@ -12,6 +12,8 @@
 #include "test_utils.h"
 #include "ccomp_timer.h"
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5141
 TEST_CASE("mbedtls AES performance", "[aes][timeout=60]")
 {
     const unsigned CALLS = 256;
@@ -68,3 +70,4 @@ TEST_CASE("mbedtls AES performance", "[aes][timeout=60]")
     TEST_PERFORMANCE_CCOMP_GREATER_THAN(AES_CBC_THROUGHPUT_MBSEC, "%.3fMB/sec", mb_sec);
 #endif
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

components/mbedtls/test/test_aes_sha_parallel.c

@@ -16,6 +16,9 @@
 #include "freertos/task.h"
 #include "freertos/semphr.h"
 
+
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5141
 static SemaphoreHandle_t done_sem;
 
 static const unsigned char *one_hundred_bs =  (unsigned char *)
@@ -130,3 +133,4 @@ TEST_CASE("mbedtls AES/SHA multithreading", "[mbedtls]")
 
     vSemaphoreDelete(done_sem);
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

components/mbedtls/test/test_ecp.c

@@ -31,6 +31,8 @@ which are undefined if the following flag is not defined */
    error hex value (mbedTLS uses -N for error codes) */
 #define TEST_ASSERT_MBEDTLS_OK(X) TEST_ASSERT_EQUAL_HEX32(0, -(X))
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5141
 TEST_CASE("mbedtls ECDH Generate Key", "[mbedtls]")
 {
     mbedtls_ecdh_context ctx;
@@ -84,6 +86,7 @@ TEST_CASE("mbedtls ECP mul w/ koblitz", "[mbedtls]")
     mbedtls_ctr_drbg_free(&ctxRandom);
     mbedtls_entropy_free(&ctxEntropy);
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 #if CONFIG_MBEDTLS_HARDWARE_ECC
 /*
@@ -154,6 +157,8 @@ const uint8_t ecc_p256_mul_res_y[] = {
     0xC7, 0xD4, 0x0C, 0x90, 0xA1, 0xC9, 0xD3, 0x3A
 };
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5141
 static int rng_wrapper(void *ctx, unsigned char *buf, size_t len)
 {
     esp_fill_random(buf, len);
@@ -253,4 +258,5 @@ TEST_CASE("mbedtls ECP point verify with SECP256R1", "[mbedtls]")
 {
     test_ecp_verify(MBEDTLS_ECP_DP_SECP256R1, ecc_p256_mul_res_x, ecc_p256_mul_res_y);
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 #endif /* CONFIG_MBEDTLS_HARDWARE_ECC */

components/mbedtls/test/test_esp_crt_bundle.c

@@ -210,6 +210,8 @@ esp_err_t endpoint_teardown(mbedtls_endpoint_t *endpoint)
     return ESP_OK;
 }
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5141
 esp_err_t client_setup(mbedtls_endpoint_t *client)
 {
     int ret;
@@ -344,9 +346,12 @@ TEST_CASE("custom certificate bundle", "[mbedtls]")
 
    vSemaphoreDelete(signal_sem);
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 #endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5141
 TEST_CASE("custom certificate bundle - weak hash", "[mbedtls]")
 {
     /* A weak signature hash on the trusted certificate should not stop
@@ -392,6 +397,7 @@ TEST_CASE("custom certificate bundle - wrong signature", "[mbedtls]")
 
     esp_crt_bundle_detach(NULL);
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 TEST_CASE("custom certificate bundle init API - bound checking", "[mbedtls]")
 {

components/mbedtls/test/test_mbedtls.c

@@ -21,7 +21,10 @@
 #include "unity.h"
 #include "sdkconfig.h"
 #include "test_apb_dport_access.h"
+#include "test_utils.h"
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5141
 TEST_CASE("mbedtls AES self-tests", "[aes]")
 {
     start_apb_access_loop();
@@ -42,3 +45,4 @@ TEST_CASE("mbedtls RSA self-tests", "[bignum]")
     TEST_ASSERT_FALSE_MESSAGE(mbedtls_rsa_self_test(1), "RSA self-tests should pass.");
     verify_apb_access_loop();
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

components/mbedtls/test/test_mbedtls_mpi.c

@@ -15,9 +15,12 @@
 #include "freertos/semphr.h"
 #include "unity.h"
 #include "sdkconfig.h"
+#include "test_utils.h"
 
 #define MBEDTLS_OK 0
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5141
 /* Debugging function to print an MPI number to stdout. Happens to
    print output that can be copy-pasted directly into a Python shell.
 */
@@ -274,3 +277,4 @@ TEST_CASE("test MPI modexp", "[bignum]")
 
     TEST_ASSERT_FALSE_MESSAGE(test_error, "mbedtls_mpi_exp_mod incorrect for some tests\n");
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

components/mbedtls/test/test_mbedtls_sha.c

@@ -21,6 +21,7 @@
 #include "sdkconfig.h"
 #include "test_apb_dport_access.h"
 #include "soc/soc_caps.h"
+#include "test_utils.h"
 
 TEST_CASE("mbedtls SHA self-tests", "[mbedtls]")
 {
@@ -42,10 +43,15 @@ static const uint8_t sha256_thousand_as[32] = {
     0x20, 0xcb, 0xc9, 0xf5, 0xa5, 0xd1, 0x34, 0x64, 0x5a, 0xdb, 0x5d, 0xb1, 0xb9, 0x73, 0x7e, 0xa3
 };
 
+
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5141
 static const uint8_t sha256_thousand_bs[32] = {
     0xf6, 0xf1, 0x18, 0xe1, 0x20, 0xe5, 0x2b, 0xe0, 0xbd, 0x0c, 0xfd, 0xf2, 0x79, 0x4c, 0xd1, 0x2c, 0x07, 0x68, 0x6c, 0xc8, 0x71, 0x23, 0x5a, 0xc2, 0xf1, 0x14, 0x59, 0x37, 0x8e, 0x6d, 0x23, 0x5b
 };
 
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+
 static const uint8_t sha512_thousand_bs[64] = {
     0xa6, 0x68, 0x68, 0xa3, 0x73, 0x53, 0x2a, 0x5c, 0xc3, 0x3f, 0xbf, 0x43, 0x4e, 0xba, 0x10, 0x86, 0xb3, 0x87, 0x09, 0xe9, 0x14, 0x3f, 0xbf, 0x37, 0x67, 0x8d, 0x43, 0xd9, 0x9b, 0x95, 0x08, 0xd5, 0x80, 0x2d, 0xbe, 0x9d, 0xe9, 0x1a, 0x54, 0xab, 0x9e, 0xbc, 0x8a, 0x08, 0xa0, 0x1a, 0x89, 0xd8, 0x72, 0x68, 0xdf, 0x52, 0x69, 0x7f, 0x1c, 0x70, 0xda, 0xe8, 0x3f, 0xe5, 0xae, 0x5a, 0xfc, 0x9d
 };
@@ -94,7 +100,11 @@ TEST_CASE("mbedtls SHA interleaving", "[mbedtls]")
     TEST_ASSERT_EQUAL_MEMORY_MESSAGE(sha1_thousand_as, sha1, 20, "SHA1 calculation");
 }
 
+#define SHA_TASK_STACK_SIZE (10*1024)
 static SemaphoreHandle_t done_sem;
+
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5141
 static void tskRunSHA1Test(void *pvParameters)
 {
     mbedtls_sha1_context sha1_ctx;
@@ -133,7 +143,6 @@ static void tskRunSHA256Test(void *pvParameters)
     vTaskDelete(NULL);
 }
 
-#define SHA_TASK_STACK_SIZE (10*1024)
 
 TEST_CASE("mbedtls SHA multithreading", "[mbedtls]")
 {
@@ -150,6 +159,7 @@ TEST_CASE("mbedtls SHA multithreading", "[mbedtls]")
     }
     vSemaphoreDelete(done_sem);
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 void tskRunSHASelftests(void *param)
 {
@@ -264,6 +274,8 @@ TEST_CASE("mbedtls SHA384 clone", "[mbedtls][")
 }
 
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5141
 TEST_CASE("mbedtls SHA256 clone", "[mbedtls]")
 {
     mbedtls_sha256_context ctx;
@@ -339,6 +351,7 @@ TEST_CASE("mbedtls SHA session passed between tasks", "[mbedtls]")
     TEST_ASSERT_EQUAL(0, param.ret);
     TEST_ASSERT_EQUAL_MEMORY_MESSAGE(sha256_thousand_as, param.result, 32, "SHA256 result from other task");
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 
 
@@ -386,6 +399,8 @@ const uint8_t test_vector_digest[] = {
     0x98, 0x5d, 0x36, 0xc0, 0xb7, 0xeb, 0x35, 0xe0,
 };
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5141
 TEST_CASE("mbedtls SHA, input in flash", "[mbedtls]")
 {
     mbedtls_sha256_context sha256_ctx;
@@ -400,6 +415,7 @@ TEST_CASE("mbedtls SHA, input in flash", "[mbedtls]")
 
     TEST_ASSERT_EQUAL_MEMORY_MESSAGE(test_vector_digest, sha256, 32, "SHA256 calculation");
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 /* Function are not implemented in SW */
 #if CONFIG_MBEDTLS_HARDWARE_SHA && SOC_SHA_SUPPORT_SHA512_T

components/mbedtls/test/test_rsa.c

@@ -24,6 +24,8 @@
 
 #define PRINT_DEBUG_INFO
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5141
 /* Taken from openssl s_client -connect api.gigafive.com:443 -showcerts
  */
 static const char *rsa4096_cert = "-----BEGIN CERTIFICATE-----\n"\
@@ -108,9 +110,11 @@ static const char *rsa2048_cert = "-----BEGIN CERTIFICATE-----\n"\
     "b8ravHNjkOR/ez4iyz0H7V84dJzjA1BOoa+Y7mHyhD8S\n"\
     "-----END CERTIFICATE-----\n";
 
+
 /* Some random input bytes to public key encrypt */
 static const uint8_t pki_input[4096/8] = {
     0, 1, 4, 6, 7, 9, 33, 103, 49, 11, 56, 211, 67, 92 };
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 /* Result of an RSA4096 operation using cert's public key
    (raw PKI, no padding/etc) */
@@ -323,10 +327,13 @@ _Static_assert(sizeof(pki_rsa2048_output) == 2048/8, "rsa2048 output is wrong si
 _Static_assert(sizeof(pki_rsa3072_output) == 3072/8, "rsa3072 output is wrong size");
 _Static_assert(sizeof(pki_rsa4096_output) == 4096/8, "rsa4096 output is wrong size");
 
-static void test_cert(const char *cert, const uint8_t *expected_output, size_t output_len);
 void mbedtls_mpi_printf(const char *name, const mbedtls_mpi *X);
 
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5141
+static void test_cert(const char *cert, const uint8_t *expected_output, size_t output_len);
+
 TEST_CASE("mbedtls RSA4096 cert", "[mbedtls]")
 {
 
@@ -394,6 +401,7 @@ static void test_cert(const char *cert, const uint8_t *expected_output, size_t o
 
     mbedtls_x509_crt_free(&crt);
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 #ifdef CONFIG_MBEDTLS_HARDWARE_MPI
 static void rsa_key_operations(int keysize, bool check_performance, bool generate_new_rsa);
@@ -533,6 +541,8 @@ static void rsa_key_operations(int keysize, bool check_performance, bool generat
 
 #endif // CONFIG_MBEDTLS_HARDWARE_MPI
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5141
 TEST_CASE("mbedtls RSA Generate Key", "[mbedtls][timeout=60]")
 {
 
@@ -570,3 +580,4 @@ TEST_CASE("mbedtls RSA Generate Key", "[mbedtls][timeout=60]")
 #endif //CONFIG_MBEDTLS_MPI_USE_INTERRUPT
 
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

components/mbedtls/test/test_sha.c

@@ -89,6 +89,8 @@ TEST_CASE("Test esp_sha()", "[hw_crypto]")
 #endif
 }
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5141
 TEST_CASE("Test esp_sha() function with long input", "[hw_crypto]")
 {
     const void* ptr;
@@ -135,3 +137,4 @@ TEST_CASE("Test esp_sha() function with long input", "[hw_crypto]")
     TEST_ASSERT_EQUAL_MEMORY_MESSAGE(sha512_espsha, sha512_mbedtls, sizeof(sha512_espsha), "SHA512 results should match");
 #endif
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

components/mbedtls/test/test_sha_perf.c

@@ -18,6 +18,8 @@
 #include "ccomp_timer.h"
 #include "test_mbedtls_utils.h"
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5141
 TEST_CASE("mbedtls SHA performance", "[aes]")
 {
     const unsigned CALLS = 256;
@@ -60,3 +62,4 @@ TEST_CASE("mbedtls SHA performance", "[aes]")
     TEST_PERFORMANCE_CCOMP_GREATER_THAN(SHA256_THROUGHPUT_MBSEC, "%.3fMB/sec", mb_sec);
 #endif
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

components/mdns/test/CMakeLists.txt

@@ -1,2 +1,8 @@
+idf_build_get_property(target IDF_TARGET)
+if(${target} STREQUAL "esp32c2")
+    # IDF-5046
+        return()
+endif()
+
 idf_component_register(SRC_DIRS "."
                     PRIV_REQUIRES cmock test_utils mdns)

components/newlib/test/test_newlib.c

@@ -126,17 +126,17 @@ static bool fn_in_rom(void *fn)
 
 TEST_CASE("check if ROM or Flash is used for functions", "[newlib]")
 {
-#if defined(CONFIG_NEWLIB_NANO_FORMAT)
+#if CONFIG_NEWLIB_NANO_FORMAT && (CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2)
     TEST_ASSERT(fn_in_rom(vfprintf));
 #else
     TEST_ASSERT_FALSE(fn_in_rom(vfprintf));
-#endif // CONFIG_NEWLIB_NANO_FORMAT
+#endif // CONFIG_NEWLIB_NANO_FORMAT && CONFIG_IDF_TARGETx
 
-#if defined(CONFIG_IDF_TARGET_ESP32) && defined(CONFIG_NEWLIB_NANO_FORMAT)
+#if defined(CONFIG_NEWLIB_NANO_FORMAT)
     TEST_ASSERT(fn_in_rom(sscanf));
 #else
     TEST_ASSERT_FALSE(fn_in_rom(sscanf));
-#endif // CONFIG_IDF_TARGET_ESP32 && CONFIG_NEWLIB_NANO_FORMAT
+#endif // CONFIG_NEWLIB_NANO_FORMAT
 
 #if defined(CONFIG_IDF_TARGET_ESP32) && !defined(CONFIG_SPIRAM)
     TEST_ASSERT(fn_in_rom(atoi));

components/newlib/test/test_time.c

@@ -531,9 +531,13 @@ TEST_CASE("test time functions wide 64 bits", "[newlib]")
 #endif // !_USE_LONG_TIME_T
 
 #if defined( CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER ) && defined( CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER )
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5057
 
 extern int64_t s_microseconds_offset;
 static const uint64_t s_start_timestamp  = 1606838354;
+
+
 static RTC_NOINIT_ATTR uint64_t s_saved_time;
 static RTC_NOINIT_ATTR uint64_t s_time_in_reboot;
 
@@ -623,7 +627,9 @@ static void check_time(void)
     TEST_ASSERT_LESS_OR_EQUAL(latency_before_run_ut, dt);
 }
 
+
 TEST_CASE_MULTIPLE_STAGES("Timestamp after abort is correct in case RTC & High-res timer have + big error", "[newlib][reset=abort,SW_CPU_RESET]", set_timestamp1, check_time);
 TEST_CASE_MULTIPLE_STAGES("Timestamp after restart is correct in case RTC & High-res timer have + big error", "[newlib][reset=SW_CPU_RESET]", set_timestamp2, check_time);
 TEST_CASE_MULTIPLE_STAGES("Timestamp after restart is correct in case RTC & High-res timer have - big error", "[newlib][reset=SW_CPU_RESET]", set_timestamp3, check_time);
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 #endif // CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER && CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER

components/perfmon/test/CMakeLists.txt

@@ -1,3 +1,7 @@
-idf_component_register(SRC_DIRS "."
+if(CONFIG_IDF_TARGET_ARCH_XTENSA)
+    list(APPEND src_dirs .)
+endif()
+
+idf_component_register(SRC_DIRS ${src_dirs}
                     PRIV_INCLUDE_DIRS "."
                     PRIV_REQUIRES cmock xtensa perfmon)

components/protocomm/test/CMakeLists.txt

@@ -1,4 +1,4 @@
 idf_component_register(SRC_DIRS "."
                     PRIV_INCLUDE_DIRS "."
                     PRIV_INCLUDE_DIRS "../proto-c/"
-                    PRIV_REQUIRES cmock mbedtls protocomm protobuf-c)
+                    PRIV_REQUIRES cmock mbedtls protocomm protobuf-c test_utils)

components/protocomm/test/test_protocomm.c

@@ -32,6 +32,7 @@ which are undefined if the following flag is not defined */
 #include <protocomm_security.h>
 #include <protocomm_security0.h>
 #include <protocomm_security1.h>
+#include "test_utils.h"
 
 #include "session.pb-c.h"
 
@@ -680,6 +681,8 @@ static void stop_test_service(void)
     test_pc = NULL;
 }
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5143
 static esp_err_t test_security1_no_encryption (void)
 {
     ESP_LOGI(TAG, "Starting Security 1 no encryption test");
@@ -887,7 +890,7 @@ static esp_err_t test_security1_wrong_pop (void)
     return ESP_OK;
 }
 
-__attribute__((unused)) static esp_err_t test_security1_insecure_client (void)
+static esp_err_t test_security1_insecure_client (void)
 {
     ESP_LOGI(TAG, "Starting Security 1 insecure client test");
 
@@ -939,7 +942,7 @@ __attribute__((unused)) static esp_err_t test_security1_insecure_client (void)
     return ESP_OK;
 }
 
-__attribute__((unused)) static esp_err_t test_security1_weak_session (void)
+static esp_err_t test_security1_weak_session (void)
 {
     ESP_LOGI(TAG, "Starting Security 1 weak session test");
 
@@ -1002,6 +1005,7 @@ __attribute__((unused)) static esp_err_t test_security1_weak_session (void)
     ESP_LOGI(TAG, "Protocomm test successful");
     return ESP_OK;
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 static esp_err_t test_protocomm (session_t *session)
 {
@@ -1051,6 +1055,8 @@ static esp_err_t test_protocomm (session_t *session)
     return ESP_OK;
 }
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5143
 static esp_err_t test_security1 (void)
 {
     ESP_LOGI(TAG, "Starting Sec1 test");
@@ -1081,6 +1087,7 @@ static esp_err_t test_security1 (void)
     free(session);
     return ESP_OK;
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 static esp_err_t test_security0 (void)
 {
@@ -1107,6 +1114,8 @@ static esp_err_t test_security0 (void)
     return ESP_OK;
 }
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5143
 TEST_CASE("leak test", "[PROTOCOMM]")
 {
 #ifdef CONFIG_HEAP_TRACING
@@ -1147,12 +1156,15 @@ TEST_CASE("leak test", "[PROTOCOMM]")
 
     TEST_ASSERT(pre_start_mem == post_stop_mem);
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 TEST_CASE("security 0 basic test", "[PROTOCOMM]")
 {
     TEST_ASSERT(test_security0() == ESP_OK);
 }
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5143
 TEST_CASE("security 1 basic test", "[PROTOCOMM]")
 {
     TEST_ASSERT(test_security1() == ESP_OK);
@@ -1182,3 +1194,4 @@ TEST_CASE("security 1 weak session test", "[PROTOCOMM]")
 {
     TEST_ASSERT(test_security1_weak_session() == ESP_OK);
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

components/pthread/test/test_pthread_cxx.cpp

@@ -6,11 +6,12 @@
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
 #include "unity.h"
+#include "test_utils.h"
 
 #if __GTHREADS && __GTHREADS_CXX0X
 
 #include "esp_log.h"
-const static char *TAG = "pthread_test";
+const static __attribute__((unused)) char *TAG = "pthread_test";
 
 static std::mutex           mtx;
 static std::shared_ptr<int> global_sp_mtx; // protected by mux
@@ -96,6 +97,8 @@ TEST_CASE("pthread C++", "[pthread]")
     global_sp_recur_mtx.reset();
 }
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5142
 static void task_test_sandbox()
 {
     std::stringstream ss;
@@ -135,5 +138,6 @@ TEST_CASE("pthread mix C/C++", "[pthread]")
         t1.join();
     }
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 #endif

components/pthread/test/test_pthread_local_storage.c

@@ -173,6 +173,10 @@ typedef struct {
     int last_idx; // index of last key where destructor was called
 } destr_test_state_t;
 
+
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5142
+
 static void s_test_repeat_destructor(void *vp_state);
 static void *s_test_repeat_destructor_thread(void *vp_state);
 
@@ -249,3 +253,4 @@ static void *s_test_repeat_destructor_thread(void *vp_state)
     }
     pthread_exit(NULL);
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

components/sdmmc/test/test_sd.c

@@ -31,8 +31,8 @@
 
 // Currently no runners for S3
 #define WITH_SD_TEST    (SOC_SDMMC_HOST_SUPPORTED && !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3))
-// Currently, no runners for S3
+// Currently, no runners for S3 and C2
-#define WITH_SDSPI_TEST (!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3))
+#define WITH_SDSPI_TEST (!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3, ESP32C2))
 // Can't test eMMC (slot 0) and PSRAM together
 #define WITH_EMMC_TEST  (SOC_SDMMC_HOST_SUPPORTED && !CONFIG_SPIRAM && !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3))
 

components/spi_flash/test/test_esp_flash.c

@@ -128,37 +128,49 @@ static uint8_t sector_buf[4096];
 
 typedef void (*flash_test_func_t)(const esp_partition_t *part);
 
-/* Use FLASH_TEST_CASE for SPI flash tests that only use the main SPI flash chip
+/* Use TEST_CASE_FLASH for SPI flash tests that only use the main SPI flash chip
 */
-#define FLASH_TEST_CASE(STR, FUNC_TO_RUN) \
+#define TEST_CASE_FLASH(STR, FUNC_TO_RUN) \
     TEST_CASE(STR, "[esp_flash]") {flash_test_func(FUNC_TO_RUN, 1 /* first index reserved for main flash */ );}
 
-#define FLASH_TEST_CASE_IGNORE(STR, FUNC_TO_RUN) \
+#define TEST_CASE_FLASH_IGNORE(STR, FUNC_TO_RUN) \
     TEST_CASE(STR, "[esp_flash][ignore]") {flash_test_func(FUNC_TO_RUN, 1 /* first index reserved for main flash */ );}
 
-/* Use FLASH_TEST_CASE_3 for tests which also run on external flash, which sits in the place of PSRAM
+/* Use TEST_CASE_MULTI_FLASH for tests which also run on external flash, which sits in the place of PSRAM
    (these tests are incompatible with PSRAM)
 
    These tests run for all the flash chip configs shown in config_list, below (internal and external).
  */
+
+
 #if defined(CONFIG_SPIRAM)
-#define FLASH_TEST_CASE_3(STR, FUNCT_TO_RUN)
+//SPI1 CS1 occupied by PSRAM
-#define FLASH_TEST_CASE_3_IGNORE(STR, FUNCT_TO_RUN)
+#define BYPASS_MULTIPLE_CHIP    1
-#else //CONFIG_SPIRAM
+#elif TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
-#if !CONFIG_IDF_TARGET_ESP32C3
+//IDF-5049
-#define FLASH_TEST_CASE_3(STR, FUNC_TO_RUN) \
+#define BYPASS_MULTIPLE_CHIP    1
-    TEST_CASE(STR", 3 chips", "[esp_flash_3][test_env=UT_T1_ESP_FLASH][timeout=35]") {flash_test_func(FUNC_TO_RUN, TEST_CONFIG_NUM);}
+#endif
 
-#define FLASH_TEST_CASE_3_IGNORE(STR, FUNC_TO_RUN) \
+#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3
-    TEST_CASE(STR", 3 chips", "[esp_flash_3][test_env=UT_T1_ESP_FLASH][ignore]") {flash_test_func(FUNC_TO_RUN, TEST_CONFIG_NUM);}
+//chips without PSRAM
-#else //CONFIG_IDF_TARGET_ESP32C3
+#define TEST_CHIP_NUM   2
-#define FLASH_TEST_CASE_3(STR, FUNC_TO_RUN) \
+#elif CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
-    TEST_CASE(STR", 2 chips", "[esp_flash_2][test_env=UT_T1_ESP_FLASH]") {flash_test_func(FUNC_TO_RUN, TEST_CONFIG_NUM);}
+#define TEST_CHIP_NUM   3
+#endif
 
-#define FLASH_TEST_CASE_3_IGNORE(STR, FUNC_TO_RUN) \
+#define _STRINGIFY(s)   #s
-    TEST_CASE(STR", 2 chips", "[esp_flash_2][test_env=UT_T1_ESP_FLASH][ignore]") {flash_test_func(FUNC_TO_RUN, TEST_CONFIG_NUM);}
+#define STRINGIFY(s)   _STRINGIFY(s)
-#endif // !CONFIG_IDF_TARGET_ESP32C3
+#define TEST_CHIP_NUM_STR   STRINGIFY(TEST_CHIP_NUM)
-#endif //CONFIG_SPIRAM
+
+#if BYPASS_MULTIPLE_CHIP
+#define TEST_CASE_MULTI_FLASH   TEST_CASE_MULTI_FLASH_IGNORE
+#else
+#define TEST_CASE_MULTI_FLASH(STR, FUNC_TO_RUN) \
+    TEST_CASE(STR", "TEST_CHIP_NUM_STR" chips", "[esp_flash_3][test_env=UT_T1_ESP_FLASH][timeout=35]") {flash_test_func(FUNC_TO_RUN, TEST_CONFIG_NUM);}
+#endif
+
+#define TEST_CASE_MULTI_FLASH_IGNORE(STR, FUNC_TO_RUN) \
+    TEST_CASE(STR", "TEST_CHIP_NUM_STR" chips", "[esp_flash_3][test_env=UT_T1_ESP_FLASH][ignore]") {flash_test_func(FUNC_TO_RUN, TEST_CONFIG_NUM);}
 
 
 //currently all the configs are the same with esp_flash_spi_device_config_t, no more information required
@@ -461,8 +473,8 @@ static void test_metadata(const esp_partition_t* part)
     printf("Flash ID %08x detected size %d bytes\n", id, size);
 }
 
-FLASH_TEST_CASE("SPI flash metadata functions", test_metadata);
+TEST_CASE_FLASH("SPI flash metadata functions", test_metadata);
-FLASH_TEST_CASE_3("SPI flash metadata functions", test_metadata);
+TEST_CASE_MULTI_FLASH("SPI flash metadata functions", test_metadata);
 
 static uint32_t erase_test_region(const esp_partition_t *part, int num_sectors)
 {
@@ -521,8 +533,8 @@ void test_simple_read_write(const esp_partition_t* part)
     }
 }
 
-FLASH_TEST_CASE("SPI flash simple read/write", test_simple_read_write);
+TEST_CASE_FLASH("SPI flash simple read/write", test_simple_read_write);
-FLASH_TEST_CASE_3("SPI flash simple read/write", test_simple_read_write);
+TEST_CASE_MULTI_FLASH("SPI flash simple read/write", test_simple_read_write);
 
 void test_unaligned_read_write(const esp_partition_t* part)
 {
@@ -542,8 +554,8 @@ void test_unaligned_read_write(const esp_partition_t* part)
     TEST_ASSERT(memcmp(buf, msg, strlen(msg) + 1) == 0);
 }
 
-FLASH_TEST_CASE("SPI flash unaligned read/write", test_unaligned_read_write);
+TEST_CASE_FLASH("SPI flash unaligned read/write", test_unaligned_read_write);
-FLASH_TEST_CASE_3("SPI flash unaligned read/write", test_unaligned_read_write);
+TEST_CASE_MULTI_FLASH("SPI flash unaligned read/write", test_unaligned_read_write);
 
 void test_single_read_write(const esp_partition_t* part)
 {
@@ -566,8 +578,8 @@ void test_single_read_write(const esp_partition_t* part)
     }
 }
 
-FLASH_TEST_CASE("SPI flash single byte reads/writes", test_single_read_write);
+TEST_CASE_FLASH("SPI flash single byte reads/writes", test_single_read_write);
-FLASH_TEST_CASE_3("SPI flash single byte reads/writes", test_single_read_write);
+TEST_CASE_MULTI_FLASH("SPI flash single byte reads/writes", test_single_read_write);
 
 
 /* this test is notable because it generates a lot of unaligned reads/writes,
@@ -596,8 +608,8 @@ void test_three_byte_read_write(const esp_partition_t* part)
     }
 }
 
-FLASH_TEST_CASE("SPI flash three byte reads/writes", test_three_byte_read_write);
+TEST_CASE_FLASH("SPI flash three byte reads/writes", test_three_byte_read_write);
-FLASH_TEST_CASE_3("SPI flash three byte reads/writes", test_three_byte_read_write);
+TEST_CASE_MULTI_FLASH("SPI flash three byte reads/writes", test_three_byte_read_write);
 
 void test_erase_large_region(const esp_partition_t *part)
 {
@@ -634,8 +646,8 @@ void test_erase_large_region(const esp_partition_t *part)
     TEST_ASSERT_EQUAL_HEX32(0xFFFFFFFF, readback);
 }
 
-FLASH_TEST_CASE("SPI flash erase large region", test_erase_large_region);
+TEST_CASE_FLASH("SPI flash erase large region", test_erase_large_region);
-FLASH_TEST_CASE_3("SPI flash erase large region", test_erase_large_region);
+TEST_CASE_MULTI_FLASH("SPI flash erase large region", test_erase_large_region);
 
 #if CONFIG_SPI_FLASH_AUTO_SUSPEND
 void esp_test_for_suspend(void)
@@ -707,8 +719,8 @@ static void test_write_protection(const esp_partition_t* part)
     }
 }
 
-FLASH_TEST_CASE("Test esp_flash can enable/disable write protetion", test_write_protection);
+TEST_CASE_FLASH("Test esp_flash can enable/disable write protetion", test_write_protection);
-FLASH_TEST_CASE_3("Test esp_flash can enable/disable write protetion", test_write_protection);
+TEST_CASE_MULTI_FLASH("Test esp_flash can enable/disable write protetion", test_write_protection);
 
 static const uint8_t large_const_buffer[16400] = {
     203, // first byte
@@ -799,8 +811,8 @@ IRAM_ATTR NOINLINE_ATTR static void test_toggle_qe(const esp_partition_t* part)
 // These tests show whether the QE is permanent or not for the chip tested.
 // To test the behaviour of a new SPI flash chip, enable force_check flag in generic driver
 // `spi_flash_common_set_io_mode` and then run this test.
-FLASH_TEST_CASE_IGNORE("Test esp_flash_write can toggle QE bit", test_toggle_qe);
+TEST_CASE_FLASH_IGNORE("Test esp_flash_write can toggle QE bit", test_toggle_qe);
-FLASH_TEST_CASE_3_IGNORE("Test esp_flash_write can toggle QE bit", test_toggle_qe);
+TEST_CASE_MULTI_FLASH_IGNORE("Test esp_flash_write can toggle QE bit", test_toggle_qe);
 #endif //CONFIG_ESPTOOLPY_OCT_FLASH
 
 // This table could be chip specific in the future.
@@ -911,6 +923,8 @@ TEST_CASE("SPI flash test reading with all speed/mode permutations", "[esp_flash
 }
 
 #ifndef CONFIG_SPIRAM
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5049
 TEST_CASE("SPI flash test reading with all speed/mode permutations, 3 chips", "[esp_flash_3][test_env=UT_T1_ESP_FLASH]")
 {
     for (int i = 0; i < TEST_CONFIG_NUM; i++) {
@@ -918,6 +932,7 @@ TEST_CASE("SPI flash test reading with all speed/mode permutations, 3 chips", "[
     }
 }
 #endif
+#endif
 
 
 static void test_write_large_const_buffer(const esp_partition_t* part)
@@ -925,8 +940,8 @@ static void test_write_large_const_buffer(const esp_partition_t* part)
     test_write_large_buffer(part, large_const_buffer, sizeof(large_const_buffer));
 }
 
-FLASH_TEST_CASE("Test esp_flash_write large const buffer", test_write_large_const_buffer);
+TEST_CASE_FLASH("Test esp_flash_write large const buffer", test_write_large_const_buffer);
-FLASH_TEST_CASE_3("Test esp_flash_write large const buffer", test_write_large_const_buffer);
+TEST_CASE_MULTI_FLASH("Test esp_flash_write large const buffer", test_write_large_const_buffer);
 
 static void test_write_large_ram_buffer(const esp_partition_t* part)
 {
@@ -938,8 +953,8 @@ static void test_write_large_ram_buffer(const esp_partition_t* part)
     free(source_buf);
 }
 
-FLASH_TEST_CASE("Test esp_flash_write large RAM buffer", test_write_large_ram_buffer);
+TEST_CASE_FLASH("Test esp_flash_write large RAM buffer", test_write_large_ram_buffer);
-FLASH_TEST_CASE_3("Test esp_flash_write large RAM buffer", test_write_large_ram_buffer);
+TEST_CASE_MULTI_FLASH("Test esp_flash_write large RAM buffer", test_write_large_ram_buffer);
 
 static void write_large_buffer(const esp_partition_t *part, const uint8_t *source, size_t length)
 {
@@ -985,8 +1000,6 @@ static void test_write_large_buffer(const esp_partition_t* part, const uint8_t *
     read_and_check(part, source, length);
 }
 
-#if !CONFIG_SPIRAM
-
 typedef struct {
     uint32_t us_start;
     size_t len;
@@ -1157,12 +1170,12 @@ static void test_flash_read_write_performance(const esp_partition_t *part)
     free(data_read);
 }
 
-
+#if !BYPASS_MULTIPLE_CHIP
-
+//To make performance data stable, needs to run on special runner
 TEST_CASE("Test esp_flash read/write performance", "[esp_flash][test_env=UT_T1_ESP_FLASH]") {flash_test_func(test_flash_read_write_performance, 1);}
+#endif
 
-#endif // !CONFIG_SPIRAM
+TEST_CASE_MULTI_FLASH("Test esp_flash read/write performance", test_flash_read_write_performance);
-FLASH_TEST_CASE_3("Test esp_flash read/write performance"", 3 chips", test_flash_read_write_performance);
 
 #ifdef CONFIG_SPIRAM_USE_MALLOC
 
@@ -1200,7 +1213,7 @@ static void test_flash_read_large_psram_buffer(const esp_partition_t *part)
     free(buf);
 }
 
-FLASH_TEST_CASE("esp_flash_read large PSRAM buffer", test_flash_read_large_psram_buffer);
+TEST_CASE_FLASH("esp_flash_read large PSRAM buffer", test_flash_read_large_psram_buffer);
 
 
 /* similar to above test, but perform it under memory pressure */
@@ -1229,7 +1242,7 @@ static void test_flash_read_large_psram_buffer_low_internal_mem(const esp_partit
     free(buf);
 }
 
-FLASH_TEST_CASE("esp_flash_read large PSRAM buffer low memory", test_flash_read_large_psram_buffer_low_internal_mem);
+TEST_CASE_FLASH("esp_flash_read large PSRAM buffer low memory", test_flash_read_large_psram_buffer_low_internal_mem);
 
 
 #endif

components/spi_flash/test/test_mmap.c

@@ -13,6 +13,9 @@
 
 #include "test_utils.h"
 
+
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5138
 static uint32_t buffer[1024];
 
 /* read-only region used for mmap tests, intialised in setup_mmap_tests() */
@@ -20,6 +23,7 @@ static uint32_t start;
 static uint32_t end;
 
 static spi_flash_mmap_handle_t handle1, handle2, handle3;
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 static esp_err_t spi_flash_read_maybe_encrypted(size_t src_addr, void *des_addr, size_t size)
 {
@@ -30,6 +34,8 @@ static esp_err_t spi_flash_read_maybe_encrypted(size_t src_addr, void *des_addr,
     }
 }
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5138
 static esp_err_t spi_flash_write_maybe_encrypted(size_t des_addr, const void *src_addr, size_t size)
 {
     if (!esp_flash_encryption_enabled()) {
@@ -356,6 +362,7 @@ TEST_CASE("flash_mmap can mmap after get enough free MMU pages", "[spi_flash][mm
 
     TEST_ASSERT_EQUAL_PTR(NULL, spi_flash_phys2cache(start, SPI_FLASH_MMAP_DATA));
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 TEST_CASE("phys2cache/cache2phys basic checks", "[spi_flash][mmap]")
 {
@@ -391,6 +398,8 @@ TEST_CASE("phys2cache/cache2phys basic checks", "[spi_flash][mmap]")
     TEST_ASSERT_EQUAL_HEX8_ARRAY(constant_data, buf, sizeof(constant_data));
 }
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5138
 TEST_CASE("mmap consistent with phys2cache/cache2phys", "[spi_flash][mmap]")
 {
     const void *ptr = NULL;
@@ -459,3 +468,4 @@ TEST_CASE("no stale data read post mmap and write partition", "[spi_flash][mmap]
     spi_flash_munmap(handle);
     TEST_ASSERT_EQUAL(0, memcmp(buf, read_data, sizeof(buf)));
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

components/spi_flash/test/test_partitions.c

@@ -1,16 +1,8 @@
-// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
+/*
-//
+ * SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD
-// Licensed under the Apache License, Version 2.0 (the "License");
+ *
-// you may not use this file except in compliance with the License.
+ * SPDX-License-Identifier: Apache-2.0
-// You may obtain a copy of the License at
+ */
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
 
 // Test for spi_flash_{read,write}.
 
@@ -69,6 +61,8 @@ TEST_CASE("Test erase partition", "[spi_flash][esp_flash]")
     }
 }
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5137
 static bool s_test_nonzero_sha_of_partition(const esp_partition_t *part, bool allow_invalid_image)
 {
     uint8_t sha256[32] = { 0 };
@@ -145,3 +139,4 @@ TEST_CASE("Test esp_partition_get_sha256() that it can handle a big partition",
 
     spi_flash_munmap(handle);
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

components/tcp_transport/test/test_transport_connect.c

@@ -6,6 +6,7 @@
 #include "esp_log.h"
 #include "lwip/sockets.h"
 #include "tcp_transport_fixtures.h"
+#include "test_utils.h"
 
 
 #define TEST_TRANSPORT_BIND_IFNAME() \
@@ -47,6 +48,8 @@ TEST_CASE("tcp_transport: connect timeout", "[tcp_transport]")
     esp_transport_list_destroy(transport_list);
 }
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5144
 TEST_CASE("ssl_transport: connect timeout", "[tcp_transport]")
 {
     // Init the transport under test
@@ -119,6 +122,7 @@ TEST_CASE("ssl_transport: Keep alive test", "[tcp_transport]")
     esp_transport_close(ssl);
     esp_transport_list_destroy(transport_list);
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 TEST_CASE("ws_transport: Keep alive test", "[tcp_transport]")
 {
@@ -149,6 +153,8 @@ TEST_CASE("ws_transport: Keep alive test", "[tcp_transport]")
     esp_transport_list_destroy(transport_list);
 }
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5144
 // Note: This functionality is tested and kept only for compatibility reasons with IDF <= 4.x
 //       It is strongly encouraged to use transport within lists only
 TEST_CASE("ssl_transport: Check that parameters (keepalive) are set independently on the list", "[tcp_transport]")
@@ -176,3 +182,4 @@ TEST_CASE("ssl_transport: Check that parameters (keepalive) are set independentl
     esp_transport_close(ssl);
     esp_transport_destroy(ssl);
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

components/ulp/test/CMakeLists.txt

@@ -3,6 +3,11 @@ if(IDF_TARGET STREQUAL "esp32s2" OR IDF_TARGET STREQUAL "esp32s3")
     return()
 endif()
 
+if(IDF_TARGET STREQUAL "esp32c2")
+    # IDF-5048
+    return()
+endif()
+
 if(CONFIG_ULP_COPROC_TYPE_FSM)
 
     set(src_dirs "ulp_fsm")

components/ulp/test/ulp_fsm/test_ulp.c

@@ -205,6 +205,8 @@ TEST_CASE("ULP FSM light-sleep wakeup test", "[ulp]")
     TEST_ASSERT(esp_sleep_get_wakeup_cause() == ESP_SLEEP_WAKEUP_ULP);
 }
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5131
 TEST_CASE("ULP FSM deep-sleep wakeup test", "[ulp][reset=SW_CPU_RESET][ignore]")
 {
     assert(CONFIG_ULP_COPROC_RESERVE_MEM >= 260 && "this test needs ULP_COPROC_RESERVE_MEM option set in menuconfig");
@@ -248,6 +250,8 @@ TEST_CASE("ULP FSM deep-sleep wakeup test", "[ulp][reset=SW_CPU_RESET][ignore]")
     UNITY_TEST_FAIL(__LINE__, "Should not get here!");
 }
 
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+
 TEST_CASE("ULP FSM can write and read peripheral registers", "[ulp]")
 {
     assert(CONFIG_ULP_COPROC_RESERVE_MEM >= 260 && "this test needs ULP_COPROC_RESERVE_MEM option set in menuconfig");
@@ -374,6 +378,8 @@ TEST_CASE("ULP FSM I_WR_REG instruction test", "[ulp]")
     }
 }
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5131
 TEST_CASE("ULP FSM controls RTC_IO", "[ulp][ignore]")
 {
     assert(CONFIG_ULP_COPROC_RESERVE_MEM >= 260 && "this test needs ULP_COPROC_RESERVE_MEM option set in menuconfig");
@@ -474,6 +480,8 @@ TEST_CASE("ULP FSM power consumption in deep sleep", "[ulp][ignore]")
     UNITY_TEST_FAIL(__LINE__, "Should not get here!");
 }
 
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+
 TEST_CASE("ULP FSM timer setting", "[ulp]")
 {
     assert(CONFIG_ULP_COPROC_RESERVE_MEM >= 32 && "this test needs ULP_COPROC_RESERVE_MEM option set in menuconfig");
@@ -539,6 +547,8 @@ TEST_CASE("ULP FSM timer setting", "[ulp]")
     }
 }
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5131
 TEST_CASE("ULP FSM can use temperature sensor (TSENS) in deep sleep", "[ulp][ignore]")
 {
     assert(CONFIG_ULP_COPROC_RESERVE_MEM >= 260 && "this test needs ULP_COPROC_RESERVE_MEM option set in menuconfig");
@@ -709,3 +719,5 @@ TEST_CASE("ULP FSM can use ADC in deep sleep", "[ulp][ignore]")
     esp_deep_sleep_start();
     UNITY_TEST_FAIL(__LINE__, "Should not get here!");
 }
+
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

components/ulp/test/ulp_riscv/test_ulp_riscv_main.c

@@ -201,6 +201,8 @@ TEST_CASE("ULP-RISC-V can stop itself and be resumed from the main CPU", "[ulp]"
     TEST_ASSERT(ulp_riscv_is_running());
 }
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5131
 /*
 * Keep this test case as the last test case in this suite as a CPU reset occurs.
 * Add new test cases above in order to ensure they run when all test cases are run together.
@@ -220,3 +222,5 @@ TEST_CASE("ULP-RISC-V is able to wakeup main CPU from deep sleep", "[ulp][reset=
     esp_deep_sleep_start();
     UNITY_TEST_FAIL(__LINE__, "Should not get here!");
 }
+
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

components/vfs/test/test_vfs_access.c

@@ -14,6 +14,7 @@
 #include "esp_vfs_dev.h"
 #include "esp_vfs_fat.h"
 #include "wear_levelling.h"
+#include "test_utils.h"
 
 static wl_handle_t test_wl_handle;
 
@@ -88,6 +89,8 @@ static inline void test_fatfs_delete_file(const char *name)
     TEST_ASSERT_EQUAL(ret, 0);
 }
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5139
 TEST_CASE("Can use access() for FATFS", "[vfs][fatfs][wear_levelling]")
 {
     const char *path = "/spiflash/access.txt";
@@ -127,3 +130,4 @@ TEST_CASE("Can use access() for FATFS", "[vfs][fatfs][wear_levelling]")
 
     test_spi_flash_teardown();
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

components/vfs/test/test_vfs_append.c

@@ -13,6 +13,7 @@
 #include "esp_vfs_fat.h"
 #include "esp_spiffs.h"
 #include "wear_levelling.h"
+#include "test_utils.h"
 
 #define TEST_PARTITION_LABEL "flash_test"
 
@@ -77,6 +78,8 @@ static void test_append(const char *path)
     TEST_ASSERT_NOT_EQUAL(-1, unlink(path));
 }
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5139
 TEST_CASE("open() with O_APPEND on FATFS works well", "[vfs][FATFS]")
 {
     wl_handle_t test_wl_handle;
@@ -91,6 +94,7 @@ TEST_CASE("open() with O_APPEND on FATFS works well", "[vfs][FATFS]")
 
     TEST_ESP_OK(esp_vfs_fat_spiflash_unmount_rw_wl("/spiflash", test_wl_handle));
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 TEST_CASE("open() with O_APPEND on SPIFFS works well", "[vfs][spiffs]")
 {

components/vfs/test/test_vfs_select.c

@@ -544,6 +544,8 @@ TEST_CASE("concurrent selects work", "[vfs]")
     close(dummy_socket_fd);
 }
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5139
 TEST_CASE("select() works with concurrent mount", "[vfs][fatfs]")
 {
     wl_handle_t test_wl_handle;
@@ -605,3 +607,4 @@ TEST_CASE("select() works with concurrent mount", "[vfs][fatfs]")
     deinit(uart_fd, socket_fd);
     close(dummy_socket_fd);
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

components/vfs/test/test_vfs_uart.c

@@ -19,6 +19,7 @@
 #include "soc/uart_struct.h"
 #include "esp_vfs_dev.h"
 #include "esp_vfs.h"
+#include "test_utils.h"
 #include "sdkconfig.h"
 
 static void fwrite_str_loopback(const char* str, size_t size)
@@ -207,6 +208,8 @@ TEST_CASE("fcntl supported in UART VFS", "[vfs]")
 }
 
 #ifdef CONFIG_VFS_SUPPORT_TERMIOS
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5139
 TEST_CASE("Can use termios for UART", "[vfs]")
 {
     uart_config_t uart_config = {
@@ -333,4 +336,5 @@ TEST_CASE("Can use termios for UART", "[vfs]")
     close(uart_fd);
     uart_driver_delete(UART_NUM_1);
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 #endif // CONFIG_VFS_SUPPORT_TERMIOS

components/wpa_supplicant/test/test_crypto.c

@@ -15,8 +15,12 @@
 #include "crypto/crypto.h"
 
 #include "mbedtls/ecp.h"
+#include "test_utils.h"
+
 typedef struct crypto_bignum crypto_bignum;
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5046
 TEST_CASE("Test crypto lib bignum apis", "[wpa_crypto]")
 {
     {
@@ -536,3 +540,4 @@ TEST_CASE("Test crypto lib ECC apis", "[wpa_crypto]")
     }
 
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

components/wpa_supplicant/test/test_offchannel.c

@@ -32,8 +32,8 @@
 #define TEST_LISTEN_CHANNEL     6
 
 /* No runners */
-#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3, ESP32C2)
-
+//IDF-5046
 static const char *TAG = "test_offchan";
 esp_netif_t *wifi_netif;
 static EventGroupHandle_t wifi_event;

components/wpa_supplicant/test/test_sae.c

@@ -18,7 +18,10 @@
 #include "crypto/crypto.h"
 #include "../src/common/sae.h"
 #include "utils/wpabuf.h"
+#include "test_utils.h"
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5046
 typedef struct crypto_bignum crypto_bignum;
 
 
@@ -43,9 +46,6 @@ void wpabuf_free2(struct wpabuf *buf)
     os_free(buf);
 }
 
-
-
-
 TEST_CASE("Test SAE functionality with ECC group", "[wpa3_sae]")
 {
     ESP_LOGI("SAE Test", "### Beginning SAE init and deinit ###");
@@ -261,5 +261,6 @@ TEST_CASE("Test SAE functionality with ECC group", "[wpa3_sae]")
     ESP_LOGI("SAE Test", "=========== Complete ============");
 
 }
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 
 #endif /* CONFIG_WPA3_SAE */

tools/ci/check_copyright_ignore.txt

@@ -1563,7 +1563,6 @@ components/spi_flash/test/test_flash_encryption.c
 components/spi_flash/test/test_mmap.c
 components/spi_flash/test/test_out_of_bounds_write.c
 components/spi_flash/test/test_partition_ext.c
-components/spi_flash/test/test_partitions.c
 components/spi_flash/test/test_spi_flash.c
 components/tcp_transport/include/esp_transport_ssl.h
 components/tcp_transport/include/esp_transport_tcp.h

tools/unit-test-app/components/test_utils/test/ccomp_timer_test_data.c

@@ -8,18 +8,13 @@
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
 #include "esp_private/esp_clk.h"
+#include "test_utils.h"
 
 #include "unity.h"
 
 #include "sdkconfig.h"
 
 
-/* No performance monitor in RISCV for now
- */
-#if !DISABLED_FOR_TARGETS(ESP32C3)
-
-static const char* TAG = "test_ccomp_timer";
-
 #if CONFIG_IDF_TARGET_ESP32
 #define CACHE_WAYS              2
 #define CACHE_LINE_SIZE         32
@@ -50,6 +45,14 @@ typedef struct {
     int64_t ccomp;
 } ccomp_test_time_t;
 
+/* No performance monitor in RISCV for now
+ */
+#if !DISABLED_FOR_TARGETS(ESP32C3)
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
+//IDF-5052
+
+static const char* TAG = "test_ccomp_timer";
+
 #if CONFIG_SPIRAM
 static uint8_t *flash_mem;
 #else
@@ -175,5 +178,5 @@ TEST_CASE("data cache hit rate sweep", "[test_utils][ccomp_timer]")
     free(flash_mem);
 #endif
 }
-
+#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
 #endif // !DISABLED_FOR_TARGETS(ESP32C3)