feat(esp_hw_support): support esp32p4 ext1 wakeup

This commit is contained in:
wuzhenghui 2024-03-21 20:21:14 +08:00
parent ccaae61fee
commit 65d4e79f80
No known key found for this signature in database
GPG Key ID: 3EFEDECDEBA39BB9
6 changed files with 75 additions and 52 deletions

View File

@ -22,7 +22,7 @@ extern "C" {
#define PMU_LP_GPIO_WAKEUP_EN BIT(9)
#define PMU_LP_UART_WAKEUP_EN BIT(10)
#define PMU_TOUCH_WAKEUP_EN BIT(11)
#define PMU_EXT_IO_WAKEUP_EN BIT(12)
#define PMU_EXT1_WAKEUP_EN BIT(12)
#define PMU_LP_TIMER_WAKEUP_EN BIT(13)
#define PMU_BOD_WAKEUP_EN BIT(14)
#define PMU_VDDBAT_UNDERVOLT_WAKEUP_EN BIT(15)

View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -19,56 +19,6 @@
extern "C" {
#endif
/**
* @brief Get ext1 wakeup source status
* @return The lower 8 bits of the returned value are the bitmap of
* the wakeup source status, bit 0~7 corresponds to LP_IO 0~7
*/
static inline uint32_t lp_sys_ll_ext1_get_wakeup_status(void)
{
// TODO: IDF-7529
return 0;
}
/**
* @brief Clear the ext1 wakeup source status
*/
static inline void lp_sys_ll_ext1_clear_wakeup_status(void)
{
// TODO: IDF-7529
}
/**
* @brief Set the wake-up LP_IO of the ext1 wake-up source
* @param mask wakeup LP_IO bitmap, bit 0~7 corresponds to LP_IO 0~7
* @param mode 0: Wake the chip when all selected GPIOs go low
* 1: Wake the chip when any of the selected GPIOs go high
*/
static inline void lp_sys_ll_ext1_set_wakeup_pins(uint32_t mask, int mode)
{
// TODO: IDF-7529
}
/**
* @brief Clear all ext1 wakup-source setting
*/
static inline void lp_sys_ll_ext1_clear_wakeup_pins(void)
{
// TODO: IDF-7529
}
/**
* @brief Get ext1 wakeup source setting
* @return The lower 8 bits of the returned value are the bitmap of
* the wakeup source status, bit 0~7 corresponds to LP_IO 0~7
*/
static inline uint32_t lp_sys_ll_ext1_get_wakeup_pins(void)
{
// TODO: IDF-7529
return 0;
}
/**
* @brief ROM obtains the wake-up type through LP_SYS_STORE9_REG[0].
* Set the flag to inform

View File

@ -649,6 +649,54 @@ FORCE_INLINE_ATTR void pmu_ll_set_dcdc_force_power_down(pmu_dev_t *hw, bool fpd)
hw->power.dcdc_switch.force_pd = fpd;
}
/**
* @brief Get ext1 wakeup source status
* @return The lower 8 bits of the returned value are the bitmap of
* the wakeup source status, bit 0~7 corresponds to LP_IO 0~7
*/
static inline uint32_t pmu_ll_ext1_get_wakeup_status(void)
{
return REG_GET_FIELD(PMU_EXT_WAKEUP_ST_REG, PMU_EXT_WAKEUP_STATUS);
}
/**
* @brief Clear the ext1 wakeup source status
*/
static inline void pmu_ll_ext1_clear_wakeup_status(void)
{
REG_SET_BIT(PMU_EXT_WAKEUP_CNTL_REG, PMU_EXT_WAKEUP_STATUS_CLR);
}
/**
* @brief Set the wake-up LP_IO of the ext1 wake-up source
* @param io_mask wakeup LP_IO bitmap, bit 0~7 corresponds to LP_IO 0~7
* @param level_mask 0: Wake the chip when all selected GPIOs go low
* 1: Wake the chip when any of the selected GPIOs go high
*/
static inline void pmu_ll_ext1_set_wakeup_pins(uint32_t io_mask, int level_mask)
{
REG_SET_FIELD(PMU_EXT_WAKEUP_SEL_REG, PMU_EXT_WAKEUP_SEL, io_mask);
REG_SET_FIELD(PMU_EXT_WAKEUP_LV_REG, PMU_EXT_WAKEUP_LV, level_mask);
}
/**
* @brief Clear all ext1 wakup-source setting
*/
static inline void pmu_ll_ext1_clear_wakeup_pins(void)
{
REG_SET_FIELD(PMU_EXT_WAKEUP_SEL_REG, PMU_EXT_WAKEUP_SEL, 0);
}
/**
* @brief Get ext1 wakeup source setting
* @return The lower 8 bits of the returned value are the bitmap of
* the wakeup source status, bit 0~7 corresponds to LP_IO 0~7
*/
static inline uint32_t pmu_ll_ext1_get_wakeup_pins(void)
{
return REG_GET_FIELD(PMU_EXT_WAKEUP_SEL_REG, PMU_EXT_WAKEUP_SEL);
}
#ifdef __cplusplus
}
#endif

View File

@ -24,6 +24,10 @@
#include "hal/lp_aon_ll.h"
#endif
#if SOC_PM_EXT1_WAKEUP_BY_PMU
#include "hal/pmu_ll.h"
#endif
#ifdef __cplusplus
extern "C" {
#endif
@ -65,6 +69,12 @@ typedef struct rtc_cntl_sleep_retent {
#define rtc_hal_ext1_set_wakeup_pins(io_mask, mode_mask) lp_aon_ll_ext1_set_wakeup_pins(io_mask, mode_mask)
#define rtc_hal_ext1_clear_wakeup_pins() lp_aon_ll_ext1_clear_wakeup_pins()
#define rtc_hal_ext1_get_wakeup_pins() lp_aon_ll_ext1_get_wakeup_pins()
#elif SOC_PM_EXT1_WAKEUP_BY_PMU
#define rtc_hal_ext1_get_wakeup_status() pmu_ll_ext1_get_wakeup_status()
#define rtc_hal_ext1_clear_wakeup_status() pmu_ll_ext1_clear_wakeup_status()
#define rtc_hal_ext1_set_wakeup_pins(io_mask, mode_mask) pmu_ll_ext1_set_wakeup_pins(io_mask, mode_mask)
#define rtc_hal_ext1_clear_wakeup_pins() pmu_ll_ext1_clear_wakeup_pins()
#define rtc_hal_ext1_get_wakeup_pins() pmu_ll_ext1_get_wakeup_pins()
#else
#define rtc_hal_ext1_get_wakeup_status() rtc_cntl_ll_ext1_get_wakeup_status()
#define rtc_hal_ext1_clear_wakeup_status() rtc_cntl_ll_ext1_clear_wakeup_status()

View File

@ -1371,6 +1371,18 @@ config SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH
int
default 12
config SOC_PM_SUPPORT_EXT1_WAKEUP
bool
default y
config SOC_PM_SUPPORT_EXT1_WAKEUP_MODE_PER_PIN
bool
default y
config SOC_PM_EXT1_WAKEUP_BY_PMU
bool
default y
config SOC_PM_SUPPORT_WIFI_WAKEUP
bool
default y

View File

@ -568,6 +568,9 @@
// TODO: IDF-5351 (Copy from esp32c3, need check)
/*-------------------------- Power Management CAPS ----------------------------*/
#define SOC_PM_SUPPORT_EXT1_WAKEUP (1)
#define SOC_PM_SUPPORT_EXT1_WAKEUP_MODE_PER_PIN (1) /*!<Supports one bit per pin to configue the EXT1 trigger level */
#define SOC_PM_EXT1_WAKEUP_BY_PMU (1)
#define SOC_PM_SUPPORT_WIFI_WAKEUP (1)
#define SOC_PM_SUPPORT_XTAL32K_PD (1)
#define SOC_PM_SUPPORT_RC32K_PD (1)