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feat(esp_hw_support): support esp32p4 deepsleep
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@ -235,7 +235,7 @@ TEST_CASE("RTCIO_output_hold_test", "[rtcio]")
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#endif //SOC_RTCIO_HOLD_SUPPORTED
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#endif //SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32P4) // TODO: IDF-7529
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#if SOC_DEEP_SLEEP_SUPPORTED
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// It is not necessary to test every rtcio pin, it will take too much ci testing time for deep sleep
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// Only tests on s_test_map[TEST_RTCIO_DEEP_SLEEP_PIN_INDEX] pin
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// (ESP32: IO25, ESP32S2, S3: IO6, C6: IO5, H2: IO12) these pads' default configuration is low level
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@ -284,4 +284,4 @@ static void rtcio_deep_sleep_hold_test_second_stage(void)
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TEST_CASE_MULTIPLE_STAGES("RTCIO_deep_sleep_output_hold_test", "[rtcio]",
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rtcio_deep_sleep_hold_test_first_stage,
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rtcio_deep_sleep_hold_test_second_stage)
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#endif // !TEMPORARY_DISABLED_FOR_TARGETS(ESP32P4)
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#endif // SOC_DEEP_SLEEP_SUPPORTED
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@ -10,6 +10,7 @@
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#include <sys/param.h>
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#include "esp_attr.h"
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#include "esp_rom_caps.h"
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#include "esp_memory_utils.h"
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#include "esp_sleep.h"
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#include "esp_private/esp_sleep_internal.h"
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@ -287,7 +288,7 @@ static void touch_wakeup_prepare(void);
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static void gpio_deep_sleep_wakeup_prepare(void);
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#endif
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#if SOC_RTC_FAST_MEM_SUPPORTED && !CONFIG_IDF_TARGET_ESP32P4 // TODO: IDF-7529
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#if ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB && SOC_DEEP_SLEEP_SUPPORTED
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#if SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY
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static RTC_FAST_ATTR esp_deep_sleep_wake_stub_fn_t wake_stub_fn_handler = NULL;
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@ -842,28 +843,26 @@ static esp_err_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t m
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esp_sleep_isolate_digital_gpio();
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#endif
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#if ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB
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#if SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY
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#if !CONFIG_IDF_TARGET_ESP32P4 // TODO: IDF-7529
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esp_set_deep_sleep_wake_stub_default_entry();
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#elif !CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP && SOC_RTC_FAST_MEM_SUPPORTED
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/* If not possible stack is in RTC FAST memory, use the ROM function to calculate the CRC and save ~140 bytes IRAM */
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set_rtc_memory_crc();
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#endif // SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY
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#endif
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// Enter Deep Sleep
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#if!ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB || SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY || !CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
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#if SOC_PMU_SUPPORTED
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result = call_rtc_sleep_start(reject_triggers, config.power.hp_sys.dig_power.mem_dslp, deep_sleep);
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#else
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result = call_rtc_sleep_start(reject_triggers, config.lslp_mem_inf_fpu, deep_sleep);
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#endif
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#else
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#if !CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
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/* If not possible stack is in RTC FAST memory, use the ROM function to calculate the CRC and save ~140 bytes IRAM */
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#if SOC_RTC_FAST_MEM_SUPPORTED
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set_rtc_memory_crc();
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#endif
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result = call_rtc_sleep_start(reject_triggers, config.lslp_mem_inf_fpu, deep_sleep);
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#else
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/* Otherwise, need to call the dedicated soc function for this */
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result = rtc_deep_sleep_start(s_config.wakeup_triggers, reject_triggers);
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#endif
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#endif // SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY
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} else {
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/* Cache Suspend 1: will wait cache idle in cache suspend */
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suspend_cache();
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@ -992,12 +991,12 @@ static esp_err_t IRAM_ATTR deep_sleep_start(bool allow_sleep_rejection)
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// record current RTC time
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s_config.rtc_ticks_at_sleep_start = rtc_time_get();
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#if SOC_RTC_FAST_MEM_SUPPORTED
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#if ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB
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// Configure wake stub
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if (esp_get_deep_sleep_wake_stub() == NULL) {
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esp_set_deep_sleep_wake_stub(esp_wake_deep_sleep);
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}
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#endif // SOC_RTC_FAST_MEM_SUPPORTED
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#endif // ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB
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// Decide which power domains can be powered down
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uint32_t pd_flags = get_power_down_flags();
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@ -1014,6 +1013,9 @@ static esp_err_t IRAM_ATTR deep_sleep_start(bool allow_sleep_rejection)
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#if SOC_PM_SUPPORT_HP_AON_PD
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force_pd_flags |= PMU_SLEEP_PD_HP_AON;
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#endif
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#if SOC_PM_SUPPORT_CNNT_PD
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force_pd_flags |= PMU_SLEEP_PD_CNNT;
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#endif
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#else
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uint32_t force_pd_flags = RTC_SLEEP_PD_DIG | RTC_SLEEP_PD_VDDSDIO | RTC_SLEEP_PD_INT_8M | RTC_SLEEP_PD_XTAL;
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#endif
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@ -195,8 +195,7 @@ static inline void rtc_suppress_rom_log(void)
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* you need to write to this register in the same format.
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* Namely, the upper 16 bits and lower should be the same.
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*/
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// REG_SET_BIT(LP_SYS_LP_STORE4_REG, RTC_DISABLE_ROM_LOG);
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abort();
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REG_SET_BIT(LP_SYSTEM_REG_LP_STORE4_REG, RTC_DISABLE_ROM_LOG);
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}
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/**
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@ -703,7 +703,7 @@ void IRAM_ATTR call_start_cpu0(void)
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#endif
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#endif
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#if SOC_DEEP_SLEEP_SUPPORTED //TODO: IDF-7529, IDF-8638, IDF-9245
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#if SOC_DEEP_SLEEP_SUPPORTED //TODO: IDF-8638, IDF-9245
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// Need to unhold the IOs that were hold right before entering deep sleep, which are used as wakeup pins
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if (rst_reas[0] == RESET_REASON_CORE_DEEP_SLEEP) {
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esp_deep_sleep_wakeup_io_reset();
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@ -31,7 +31,6 @@ static esp_reset_reason_t get_reset_reason(soc_reset_reason_t rtc_reset_reason,
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return ESP_RST_SW;
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case RESET_REASON_CORE_PMU_PWR_DOWN:
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/* Check when doing sleep bringup TODO IDF-7529 */
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return ESP_RST_DEEPSLEEP;
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case RESET_REASON_CPU_MWDT:
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@ -141,8 +141,7 @@ static void setup_values(void)
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#endif
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}
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32P4) // TODO IDF-7529
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#if SOC_DEEP_SLEEP_SUPPORTED
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static void do_deep_sleep(void)
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{
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setup_values();
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@ -169,7 +168,7 @@ TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_DEEPSLEEP", "[reset_reason][rese
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do_deep_sleep,
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check_reset_reason_deep_sleep);
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#endif //!TEMPORARY_DISABLED_FOR_TARGETS(...)
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#endif // SOC_DEEP_SLEEP_SUPPORTED
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static void do_exception(void)
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{
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@ -31,8 +31,7 @@
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#include "nvs_flash.h"
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#include "nvs.h"
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32P4) // TODO IDF-7529
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#if SOC_DEEP_SLEEP_SUPPORTED
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#if SOC_PMU_SUPPORTED
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#include "esp_private/esp_pmu.h"
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#else
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@ -288,7 +287,7 @@ TEST_CASE_MULTIPLE_STAGES("enter deep sleep after abort", "[deepsleep][reset=abo
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check_abort_reset_and_sleep,
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check_sleep_reset);
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#if SOC_RTC_FAST_MEM_SUPPORTED
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#if SOC_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB
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static RTC_DATA_ATTR uint32_t s_wake_stub_var;
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static RTC_IRAM_ATTR void wake_stub(void)
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@ -317,7 +316,6 @@ static void check_wake_stub(void)
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TEST_CASE_MULTIPLE_STAGES("can set sleep wake stub", "[deepsleep][reset=DEEPSLEEP_RESET]",
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prepare_wake_stub,
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check_wake_stub);
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#endif // SOC_RTC_FAST_MEM_SUPPORTED
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#if CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
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@ -382,6 +380,7 @@ TEST_CASE_MULTIPLE_STAGES("can set sleep wake stub from stack in RTC RAM", "[dee
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check_wake_stub);
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#endif // CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
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#endif // SOC_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB
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#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
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@ -404,7 +403,7 @@ __attribute__((unused)) static uint32_t get_cause(void)
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return wakeup_cause;
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}
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C6, ESP32H2)
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3) && SOC_PM_SUPPORT_EXT0_WAKEUP
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// Fails on S2 IDF-2903
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// This test case verifies deactivation of trigger for wake up sources
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@ -575,4 +574,4 @@ static void check_time_deepsleep(void)
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TEST_CASE_MULTIPLE_STAGES("check a time after wakeup from deep sleep", "[deepsleep][reset=DEEPSLEEP_RESET]", trigger_deepsleep, check_time_deepsleep);
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#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32P4)
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#endif // SOC_DEEP_SLEEP_SUPPORTED
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@ -1,6 +1,5 @@
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# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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# SPDX-License-Identifier: CC0-1.0
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import logging
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import time
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@ -21,6 +20,7 @@ CONFIGS = [
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pytest.mark.esp32c3,
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pytest.mark.esp32c6,
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pytest.mark.esp32h2,
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pytest.mark.esp32p4,
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pytest.mark.esp32c2,
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],
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),
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