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fix(hal): updated naming style for power up and down api for mpi peripheral
This commit updated APIs' naming style to ensure consistency throughout all other peripherals.
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@ -61,12 +61,12 @@ static inline size_t mpi_ll_calculate_hardware_words(size_t words)
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return (words + 0xF) & ~0xF;
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}
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static inline void mpi_ll_clear_power_control_bit(void)
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static inline void mpi_ll_power_up(void)
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{
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DPORT_REG_CLR_BIT(DPORT_RSA_PD_CTRL_REG, DPORT_RSA_PD);
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}
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static inline void mpi_ll_set_power_control_bit(void)
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static inline void mpi_ll_power_down(void)
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{
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DPORT_REG_SET_BIT(DPORT_RSA_PD_CTRL_REG, DPORT_RSA_PD);
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}
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@ -55,12 +55,12 @@ static inline size_t mpi_ll_calculate_hardware_words(size_t words)
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return words;
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}
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static inline void mpi_ll_clear_power_control_bit(void)
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static inline void mpi_ll_power_up(void)
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{
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REG_CLR_BIT(SYSTEM_RSA_PD_CTRL_REG, SYSTEM_RSA_MEM_PD);
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}
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static inline void mpi_ll_set_power_control_bit(void)
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static inline void mpi_ll_power_down(void)
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{
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REG_SET_BIT(SYSTEM_RSA_PD_CTRL_REG, SYSTEM_RSA_MEM_PD);
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}
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@ -49,14 +49,14 @@ static inline size_t mpi_ll_calculate_hardware_words(size_t words)
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return words;
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}
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static inline void mpi_ll_clear_power_control_bit(void)
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static inline void mpi_ll_power_up(void)
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{
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/* Power up the MPI peripheral (default is power-down state) */
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REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_PD);
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REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_FORCE_PD);
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}
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static inline void mpi_ll_set_power_control_bit(void)
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static inline void mpi_ll_power_down(void)
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{
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/* Power down the MPI peripheral */
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REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_FORCE_PU);
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@ -47,14 +47,14 @@ static inline size_t mpi_ll_calculate_hardware_words(size_t words)
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return words;
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}
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static inline void mpi_ll_clear_power_control_bit(void)
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static inline void mpi_ll_power_up(void)
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{
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/* Power up the MPI peripheral */
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REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_PD);
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REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_FORCE_PD);
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}
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static inline void mpi_ll_set_power_control_bit(void)
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static inline void mpi_ll_power_down(void)
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{
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/* Power down the MPI peripheral */
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REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_FORCE_PU);
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@ -48,14 +48,14 @@ static inline size_t mpi_ll_calculate_hardware_words(size_t words)
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return words;
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}
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static inline void mpi_ll_clear_power_control_bit(void)
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static inline void mpi_ll_power_up(void)
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{
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/* Power up the MPI peripheral */
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REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_PD);
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REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_FORCE_PD);
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}
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static inline void mpi_ll_set_power_control_bit(void)
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static inline void mpi_ll_power_down(void)
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{
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/* Power down the MPI peripheral */
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REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_FORCE_PU);
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@ -56,11 +56,11 @@ static inline size_t mpi_ll_calculate_hardware_words(size_t words)
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}
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// No need to initialize Power Control Registers in case of ESP32-P4
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static inline void mpi_ll_clear_power_control_bit(void)
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static inline void mpi_ll_power_up(void)
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{
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}
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static inline void mpi_ll_set_power_control_bit(void)
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static inline void mpi_ll_power_down(void)
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{
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}
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@ -58,12 +58,12 @@ static inline size_t mpi_ll_calculate_hardware_words(size_t words)
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return words;
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}
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static inline void mpi_ll_clear_power_control_bit(void)
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static inline void mpi_ll_power_up(void)
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{
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REG_CLR_BIT(DPORT_RSA_PD_CTRL_REG, DPORT_RSA_MEM_PD);
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}
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static inline void mpi_ll_set_power_control_bit(void)
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static inline void mpi_ll_power_down(void)
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{
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REG_SET_BIT(DPORT_RSA_PD_CTRL_REG, DPORT_RSA_PD);
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}
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@ -55,12 +55,12 @@ static inline size_t mpi_ll_calculate_hardware_words(size_t words)
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return words;
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}
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static inline void mpi_ll_clear_power_control_bit(void)
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static inline void mpi_ll_power_up(void)
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{
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REG_CLR_BIT(SYSTEM_RSA_PD_CTRL_REG, SYSTEM_RSA_MEM_PD);
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}
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static inline void mpi_ll_set_power_control_bit(void)
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static inline void mpi_ll_power_down(void)
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{
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REG_SET_BIT(SYSTEM_RSA_PD_CTRL_REG, SYSTEM_RSA_MEM_PD);
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}
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@ -15,7 +15,7 @@ size_t mpi_hal_calc_hardware_words(size_t words)
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void mpi_hal_enable_hardware_hw_op(void)
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{
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mpi_ll_clear_power_control_bit();
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mpi_ll_power_up();
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while (mpi_ll_check_memory_init_complete()) {
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}
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// Note: from enabling RSA clock to here takes about 1.3us
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@ -27,7 +27,7 @@ void mpi_hal_enable_hardware_hw_op(void)
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void mpi_hal_disable_hardware_hw_op(void)
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{
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mpi_ll_set_power_control_bit();
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mpi_ll_power_down();
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}
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void mpi_hal_interrupt_enable(bool enable)
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