From 469942225bbc31127407af64ceaf868970f5b13e Mon Sep 17 00:00:00 2001 From: "nilesh.kale" Date: Mon, 24 Jun 2024 12:29:58 +0530 Subject: [PATCH] fix(hal): updated naming style for power up and down api for mpi peripheral This commit updated APIs' naming style to ensure consistency throughout all other peripherals. --- components/hal/esp32/include/hal/mpi_ll.h | 4 ++-- components/hal/esp32c3/include/hal/mpi_ll.h | 4 ++-- components/hal/esp32c5/include/hal/mpi_ll.h | 4 ++-- components/hal/esp32c6/include/hal/mpi_ll.h | 4 ++-- components/hal/esp32h2/include/hal/mpi_ll.h | 4 ++-- components/hal/esp32p4/include/hal/mpi_ll.h | 4 ++-- components/hal/esp32s2/include/hal/mpi_ll.h | 4 ++-- components/hal/esp32s3/include/hal/mpi_ll.h | 4 ++-- components/hal/mpi_hal.c | 4 ++-- 9 files changed, 18 insertions(+), 18 deletions(-) diff --git a/components/hal/esp32/include/hal/mpi_ll.h b/components/hal/esp32/include/hal/mpi_ll.h index c5762d9e36..a6b9bdfb6c 100644 --- a/components/hal/esp32/include/hal/mpi_ll.h +++ b/components/hal/esp32/include/hal/mpi_ll.h @@ -61,12 +61,12 @@ static inline size_t mpi_ll_calculate_hardware_words(size_t words) return (words + 0xF) & ~0xF; } -static inline void mpi_ll_clear_power_control_bit(void) +static inline void mpi_ll_power_up(void) { DPORT_REG_CLR_BIT(DPORT_RSA_PD_CTRL_REG, DPORT_RSA_PD); } -static inline void mpi_ll_set_power_control_bit(void) +static inline void mpi_ll_power_down(void) { DPORT_REG_SET_BIT(DPORT_RSA_PD_CTRL_REG, DPORT_RSA_PD); } diff --git a/components/hal/esp32c3/include/hal/mpi_ll.h b/components/hal/esp32c3/include/hal/mpi_ll.h index 9c5f005d25..9b47ac30b7 100644 --- a/components/hal/esp32c3/include/hal/mpi_ll.h +++ b/components/hal/esp32c3/include/hal/mpi_ll.h @@ -55,12 +55,12 @@ static inline size_t mpi_ll_calculate_hardware_words(size_t words) return words; } -static inline void mpi_ll_clear_power_control_bit(void) +static inline void mpi_ll_power_up(void) { REG_CLR_BIT(SYSTEM_RSA_PD_CTRL_REG, SYSTEM_RSA_MEM_PD); } -static inline void mpi_ll_set_power_control_bit(void) +static inline void mpi_ll_power_down(void) { REG_SET_BIT(SYSTEM_RSA_PD_CTRL_REG, SYSTEM_RSA_MEM_PD); } diff --git a/components/hal/esp32c5/include/hal/mpi_ll.h b/components/hal/esp32c5/include/hal/mpi_ll.h index 6bd9fc771c..c04ed6e6f5 100644 --- a/components/hal/esp32c5/include/hal/mpi_ll.h +++ b/components/hal/esp32c5/include/hal/mpi_ll.h @@ -49,14 +49,14 @@ static inline size_t mpi_ll_calculate_hardware_words(size_t words) return words; } -static inline void mpi_ll_clear_power_control_bit(void) +static inline void mpi_ll_power_up(void) { /* Power up the MPI peripheral (default is power-down state) */ REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_PD); REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_FORCE_PD); } -static inline void mpi_ll_set_power_control_bit(void) +static inline void mpi_ll_power_down(void) { /* Power down the MPI peripheral */ REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_FORCE_PU); diff --git a/components/hal/esp32c6/include/hal/mpi_ll.h b/components/hal/esp32c6/include/hal/mpi_ll.h index a45616564c..84bf411dfa 100644 --- a/components/hal/esp32c6/include/hal/mpi_ll.h +++ b/components/hal/esp32c6/include/hal/mpi_ll.h @@ -47,14 +47,14 @@ static inline size_t mpi_ll_calculate_hardware_words(size_t words) return words; } -static inline void mpi_ll_clear_power_control_bit(void) +static inline void mpi_ll_power_up(void) { /* Power up the MPI peripheral */ REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_PD); REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_FORCE_PD); } -static inline void mpi_ll_set_power_control_bit(void) +static inline void mpi_ll_power_down(void) { /* Power down the MPI peripheral */ REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_FORCE_PU); diff --git a/components/hal/esp32h2/include/hal/mpi_ll.h b/components/hal/esp32h2/include/hal/mpi_ll.h index 869cfe34c8..b970e8051c 100644 --- a/components/hal/esp32h2/include/hal/mpi_ll.h +++ b/components/hal/esp32h2/include/hal/mpi_ll.h @@ -48,14 +48,14 @@ static inline size_t mpi_ll_calculate_hardware_words(size_t words) return words; } -static inline void mpi_ll_clear_power_control_bit(void) +static inline void mpi_ll_power_up(void) { /* Power up the MPI peripheral */ REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_PD); REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_FORCE_PD); } -static inline void mpi_ll_set_power_control_bit(void) +static inline void mpi_ll_power_down(void) { /* Power down the MPI peripheral */ REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_FORCE_PU); diff --git a/components/hal/esp32p4/include/hal/mpi_ll.h b/components/hal/esp32p4/include/hal/mpi_ll.h index 769049c07a..24f3de53a8 100644 --- a/components/hal/esp32p4/include/hal/mpi_ll.h +++ b/components/hal/esp32p4/include/hal/mpi_ll.h @@ -56,11 +56,11 @@ static inline size_t mpi_ll_calculate_hardware_words(size_t words) } // No need to initialize Power Control Registers in case of ESP32-P4 -static inline void mpi_ll_clear_power_control_bit(void) +static inline void mpi_ll_power_up(void) { } -static inline void mpi_ll_set_power_control_bit(void) +static inline void mpi_ll_power_down(void) { } diff --git a/components/hal/esp32s2/include/hal/mpi_ll.h b/components/hal/esp32s2/include/hal/mpi_ll.h index d6314a10a8..6f5b2803c3 100644 --- a/components/hal/esp32s2/include/hal/mpi_ll.h +++ b/components/hal/esp32s2/include/hal/mpi_ll.h @@ -58,12 +58,12 @@ static inline size_t mpi_ll_calculate_hardware_words(size_t words) return words; } -static inline void mpi_ll_clear_power_control_bit(void) +static inline void mpi_ll_power_up(void) { REG_CLR_BIT(DPORT_RSA_PD_CTRL_REG, DPORT_RSA_MEM_PD); } -static inline void mpi_ll_set_power_control_bit(void) +static inline void mpi_ll_power_down(void) { REG_SET_BIT(DPORT_RSA_PD_CTRL_REG, DPORT_RSA_PD); } diff --git a/components/hal/esp32s3/include/hal/mpi_ll.h b/components/hal/esp32s3/include/hal/mpi_ll.h index 021cb1bdd0..2c265222c0 100644 --- a/components/hal/esp32s3/include/hal/mpi_ll.h +++ b/components/hal/esp32s3/include/hal/mpi_ll.h @@ -55,12 +55,12 @@ static inline size_t mpi_ll_calculate_hardware_words(size_t words) return words; } -static inline void mpi_ll_clear_power_control_bit(void) +static inline void mpi_ll_power_up(void) { REG_CLR_BIT(SYSTEM_RSA_PD_CTRL_REG, SYSTEM_RSA_MEM_PD); } -static inline void mpi_ll_set_power_control_bit(void) +static inline void mpi_ll_power_down(void) { REG_SET_BIT(SYSTEM_RSA_PD_CTRL_REG, SYSTEM_RSA_MEM_PD); } diff --git a/components/hal/mpi_hal.c b/components/hal/mpi_hal.c index 22935268fb..8302ae847a 100644 --- a/components/hal/mpi_hal.c +++ b/components/hal/mpi_hal.c @@ -15,7 +15,7 @@ size_t mpi_hal_calc_hardware_words(size_t words) void mpi_hal_enable_hardware_hw_op(void) { - mpi_ll_clear_power_control_bit(); + mpi_ll_power_up(); while (mpi_ll_check_memory_init_complete()) { } // Note: from enabling RSA clock to here takes about 1.3us @@ -27,7 +27,7 @@ void mpi_hal_enable_hardware_hw_op(void) void mpi_hal_disable_hardware_hw_op(void) { - mpi_ll_set_power_control_bit(); + mpi_ll_power_down(); } void mpi_hal_interrupt_enable(bool enable)