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Merge branch 'bugfix/wdt_periph_enable' into 'master'

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watchdogs: make sure timer group peripherals are enabled

See merge request !1623
This commit is contained in:
Jiang Jiang Jian 2017-12-01 22:06:43 +08:00
commit 22489d7021
4 changed files with 7 additions and 4 deletions
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3
components/esp32/Kconfig
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@ -521,7 +521,8 @@ config INT_WDT
config INT_WDT_TIMEOUT_MS
int "Interrupt watchdog timeout (ms)"
depends on INT_WDT
default 300
default 300 if !SPIRAM_SUPPORT
default 800 if SPIRAM_SUPPORT
range 10 10000
help
The timeout of the watchdog, in miliseconds. Make this higher than the FreeRTOS tick rate.

3
components/esp32/int_wdt.c
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@ -29,7 +29,7 @@
#include "soc/timer_group_struct.h"
#include "soc/timer_group_reg.h"
#include "driver/timer.h"
#include "driver/periph_ctrl.h"
#include "esp_int_wdt.h"
#if CONFIG_INT_WDT
@ -71,6 +71,7 @@ static void IRAM_ATTR tick_hook(void) {
void esp_int_wdt_init() {
periph_module_enable(PERIPH_TIMG1_MODULE);
TIMERG1.wdt_wprotect=TIMG_WDT_WKEY_VALUE;
TIMERG1.wdt_config0.sys_reset_length=7; //3.2uS
TIMERG1.wdt_config0.cpu_reset_length=7; //3.2uS

3
components/esp32/task_wdt.c
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@ -33,7 +33,7 @@
#include "soc/timer_group_reg.h"
#include "esp_log.h"
#include "driver/timer.h"
#include "driver/periph_ctrl.h"
#include "esp_task_wdt.h"
//Assertion macro where, if 'cond' is false, will exit the critical section and return 'ret'
@ -183,6 +183,7 @@ esp_err_t esp_task_wdt_init(uint32_t timeout, bool panic)
ESP_ERROR_CHECK(esp_intr_alloc(ETS_TG0_WDT_LEVEL_INTR_SOURCE, 0, task_wdt_isr, NULL, &twdt_config->intr_handle))
//Configure hardware timer
periph_module_enable(PERIPH_TIMG0_MODULE);
TIMERG0.wdt_wprotect=TIMG_WDT_WKEY_VALUE; //Disable write protection
TIMERG0.wdt_config0.sys_reset_length=7; //3.2uS
TIMERG0.wdt_config0.cpu_reset_length=7; //3.2uS

2
components/esp32/test/test_int_wdt.c
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@ -13,7 +13,7 @@
TEST_CASE("Int wdt test", "[esp32][ignore]")
TEST_CASE("Int wdt test", "[esp32][reset=Interrupt wdt timeout on CPU0,SW_CPU_RESET]")
{
portENTER_CRITICAL_NESTED();
while(1);