alex/esp-idf
alex/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2024-10-05 20:47:46 -04:00
Code Issues Actions 2 Packages Projects Releases Wiki Activity

Fixed ESP32 BLE can't resolve the peer address when enable white list

Browse Source
This commit is contained in:
xiewenxiang 2021-07-13 22:13:20 +08:00
parent 617da9f403
commit 192aa18c31
5 changed files with 17 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
components/bt/host/bluedroid/common/include/common/bt_target.h
View File

@ -21,6 +21,7 @@
#define BT_TARGET_H
#include <bt_common.h>
#include "soc/soc_caps.h"
#ifndef BUILDCFG
#define BUILDCFG
@ -257,6 +258,11 @@
#define BLE_ESTABLISH_LINK_CONNECTION_TIMEOUT UC_BT_BLE_ESTAB_LINK_CONN_TOUT
#endif
#if (SOC_BLE_UPDATE_OWN_RPA)
#define BLE_UPDATE_BLE_ADDR_TYPE_RPA TRUE
#else
#define BLE_UPDATE_BLE_ADDR_TYPE_RPA FALSE
#endif
//------------------Added from bdroid_buildcfg.h---------------------
#ifndef L2CAP_EXTFEA_SUPPORTED_MASK
#define L2CAP_EXTFEA_SUPPORTED_MASK (L2CAP_EXTFEA_ENH_RETRANS | L2CAP_EXTFEA_STREAM_MODE | L2CAP_EXTFEA_NO_CRC | L2CAP_EXTFEA_FIXED_CHNLS)

2
components/bt/host/bluedroid/stack/btm/btm_ble_gap.c
View File

@ -1015,7 +1015,9 @@ uint32_t BTM_BleUpdateOwnType(uint8_t *own_bda_type, tBTM_START_ADV_CMPL_CBACK *
}
} else if(*own_bda_type == BLE_ADDR_PUBLIC_ID || *own_bda_type == BLE_ADDR_RANDOM_ID) {
if((btm_cb.ble_ctr_cb.addr_mgnt_cb.exist_addr_bit & BTM_BLE_GAP_ADDR_BIT_RESOLVABLE) == BTM_BLE_GAP_ADDR_BIT_RESOLVABLE) {
#if (BLE_UPDATE_BLE_ADDR_TYPE_RPA)
*own_bda_type = BLE_ADDR_RANDOM;
#endif
btm_cb.ble_ctr_cb.addr_mgnt_cb.own_addr_type = BLE_ADDR_RANDOM;
memcpy(btm_cb.ble_ctr_cb.addr_mgnt_cb.private_addr, btm_cb.ble_ctr_cb.addr_mgnt_cb.resolvale_addr, BD_ADDR_LEN);
btsnd_hcic_ble_set_random_addr(btm_cb.ble_ctr_cb.addr_mgnt_cb.resolvale_addr);

3
components/soc/esp32/include/soc/soc_caps.h
View File

@ -275,3 +275,6 @@
# define CAN_BRP_DIV_SUPPORTED SOC_TWAI_BRP_DIV_SUPPORTED
# define CAN_BRP_DIV_THRESH SOC_TWAI_BRP_DIV_THRESH
#endif
/*------------------------------ BLE --------------------------------------------*/
#define SOC_BLE_UPDATE_OWN_RPA (0)

3
components/soc/esp32c3/include/soc/soc_caps.h
View File

@ -266,3 +266,6 @@
#define SOC_PM_SUPPORT_WIFI_PD (1)
#define SOC_PM_SUPPORT_BT_PD (1)
/*------------------------------ BLE --------------------------------------------*/
#define SOC_BLE_UPDATE_OWN_RPA (1)

3
components/soc/esp32s3/include/soc/soc_caps.h
View File

@ -182,3 +182,6 @@
#define SOC_SPI_MEM_SUPPORT_SW_SUSPEND (1)
/*-------------------------- COEXISTENCE HARDWARE PTI CAPS -------------------------------*/
#define SOC_COEX_HW_PTI (1)
/*------------------------------ BLE --------------------------------------------*/
#define SOC_BLE_UPDATE_OWN_RPA (1)