2022-07-01 03:43:04 -04:00
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/*
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* SPDX-FileCopyrightText: 2018-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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2018-06-13 00:52:44 -04:00
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#include "soc/gpio_periph.h"
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2022-09-16 08:25:44 -04:00
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#include "esp_attr.h"
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2018-06-13 00:52:44 -04:00
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2022-07-01 03:43:04 -04:00
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const uint32_t GPIO_PIN_MUX_REG[] = {
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2018-06-13 00:52:44 -04:00
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IO_MUX_GPIO0_REG,
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IO_MUX_GPIO1_REG,
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IO_MUX_GPIO2_REG,
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IO_MUX_GPIO3_REG,
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IO_MUX_GPIO4_REG,
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IO_MUX_GPIO5_REG,
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IO_MUX_GPIO6_REG,
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IO_MUX_GPIO7_REG,
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IO_MUX_GPIO8_REG,
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IO_MUX_GPIO9_REG,
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IO_MUX_GPIO10_REG,
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IO_MUX_GPIO11_REG,
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IO_MUX_GPIO12_REG,
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IO_MUX_GPIO13_REG,
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IO_MUX_GPIO14_REG,
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IO_MUX_GPIO15_REG,
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IO_MUX_GPIO16_REG,
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IO_MUX_GPIO17_REG,
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IO_MUX_GPIO18_REG,
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IO_MUX_GPIO19_REG,
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2021-04-21 17:01:14 -04:00
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IO_MUX_GPIO20_REG, // This corresponding pin is only available on ESP32-PICO-V3 chip package
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2018-06-13 00:52:44 -04:00
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IO_MUX_GPIO21_REG,
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IO_MUX_GPIO22_REG,
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IO_MUX_GPIO23_REG,
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0,
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IO_MUX_GPIO25_REG,
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IO_MUX_GPIO26_REG,
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IO_MUX_GPIO27_REG,
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0,
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0,
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0,
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0,
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IO_MUX_GPIO32_REG,
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IO_MUX_GPIO33_REG,
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IO_MUX_GPIO34_REG,
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IO_MUX_GPIO35_REG,
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IO_MUX_GPIO36_REG,
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IO_MUX_GPIO37_REG,
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IO_MUX_GPIO38_REG,
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IO_MUX_GPIO39_REG,
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};
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2019-07-15 02:44:15 -04:00
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2022-09-16 08:25:44 -04:00
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DRAM_ATTR const uint8_t GPIO_PIN_MUX_REG_OFFSET[] = {
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0x44,
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0x88,
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0x40,
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0x84,
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0x48,
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0x6c,
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0x60,
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0x64,
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0x68,
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0x54,
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0x58,
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0x5c,
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0x34,
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0x38,
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0x30,
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0x3c,
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0x4c,
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0x50,
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0x70,
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0x74,
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0x78,
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0x7c,
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0x80,
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0x8c,
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0xFF, // 24
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0x24,
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0x28,
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0x2c,
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0xFF, // 28
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0xFF, // 29
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0xFF, // 30
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0xFF, // 31
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0x1c,
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0x20,
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0x14,
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0x18,
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0x04,
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0x08,
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0x0c,
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0x10,
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};
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2022-07-01 03:43:04 -04:00
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_Static_assert(sizeof(GPIO_PIN_MUX_REG) == SOC_GPIO_PIN_COUNT * sizeof(uint32_t), "Invalid size of GPIO_PIN_MUX_REG");
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const uint32_t GPIO_HOLD_MASK[] = {
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0,
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BIT(1),
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0,
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BIT(0),
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0,
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BIT(8),
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BIT(2),
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BIT(3),
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BIT(4),
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BIT(5),
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BIT(6),
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BIT(7),
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0,
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0,
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0,
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0,
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BIT(9),
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BIT(10),
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BIT(11),
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BIT(12),
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0,
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BIT(14),
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BIT(15),
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BIT(16),
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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};
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2022-07-01 03:43:04 -04:00
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_Static_assert(sizeof(GPIO_HOLD_MASK) == SOC_GPIO_PIN_COUNT * sizeof(uint32_t), "Invalid size of GPIO_HOLD_MASK");
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