2021-10-19 22:34:40 -04:00
|
|
|
/*
|
2023-06-09 16:21:37 -04:00
|
|
|
* SPDX-FileCopyrightText: 2017-2023 Espressif Systems (Shanghai) CO LTD
|
2021-10-19 22:34:40 -04:00
|
|
|
*
|
|
|
|
* SPDX-License-Identifier: Apache-2.0
|
|
|
|
*/
|
2020-02-06 01:00:18 -05:00
|
|
|
|
2022-07-21 07:05:21 -04:00
|
|
|
#include <sys/param.h>
|
|
|
|
#include "sdkconfig.h"
|
2020-02-06 01:00:18 -05:00
|
|
|
#include "esp_timer_impl.h"
|
|
|
|
#include "esp_err.h"
|
|
|
|
#include "esp_timer.h"
|
|
|
|
#include "esp_attr.h"
|
|
|
|
#include "esp_intr_alloc.h"
|
|
|
|
#include "esp_log.h"
|
2021-04-02 00:41:21 -04:00
|
|
|
#include "esp_compiler.h"
|
2020-02-06 01:00:18 -05:00
|
|
|
#include "soc/periph_defs.h"
|
2021-04-02 00:41:21 -04:00
|
|
|
#include "soc/soc_caps.h"
|
2022-03-25 06:41:25 -04:00
|
|
|
#include "esp_private/esp_clk.h"
|
2022-07-21 07:05:21 -04:00
|
|
|
#include "esp_private/systimer.h"
|
|
|
|
#include "esp_private/periph_ctrl.h"
|
2020-02-06 01:00:18 -05:00
|
|
|
#include "freertos/FreeRTOS.h"
|
2020-03-26 02:02:22 -04:00
|
|
|
#include "hal/systimer_ll.h"
|
|
|
|
#include "hal/systimer_types.h"
|
|
|
|
#include "hal/systimer_hal.h"
|
2020-02-06 01:00:18 -05:00
|
|
|
|
|
|
|
/**
|
|
|
|
* @file esp_timer_systimer.c
|
2020-03-26 02:02:22 -04:00
|
|
|
* @brief Implementation of esp_timer using systimer.
|
2020-02-06 01:00:18 -05:00
|
|
|
*
|
2020-03-26 02:02:22 -04:00
|
|
|
* This timer is a 64-bit up-counting timer, with a programmable compare value (called 'alarm' hereafter).
|
|
|
|
* When the timer reaches compare value, interrupt is raised.
|
|
|
|
* The timer can be configured to produce an edge interrupt.
|
|
|
|
*
|
|
|
|
* @note systimer counter0 and alarm2 are adopted to implemented esp_timer
|
2020-02-06 01:00:18 -05:00
|
|
|
*/
|
|
|
|
|
2020-03-26 02:02:22 -04:00
|
|
|
static const char *TAG = "esp_timer_systimer";
|
2020-02-06 01:00:18 -05:00
|
|
|
|
2023-01-05 05:30:27 -05:00
|
|
|
#define NOT_USED 0xBAD00FAD
|
|
|
|
|
2020-02-06 01:00:18 -05:00
|
|
|
/* Interrupt handle returned by the interrupt allocator */
|
2023-01-05 05:30:27 -05:00
|
|
|
#ifdef CONFIG_ESP_TIMER_ISR_AFFINITY_NO_AFFINITY
|
|
|
|
#define ISR_HANDLERS (portNUM_PROCESSORS)
|
|
|
|
#else
|
|
|
|
#define ISR_HANDLERS (1)
|
|
|
|
#endif
|
|
|
|
static intr_handle_t s_timer_interrupt_handle[ISR_HANDLERS] = { NULL };
|
2020-02-06 01:00:18 -05:00
|
|
|
|
|
|
|
/* Function from the upper layer to be called when the interrupt happens.
|
|
|
|
* Registered in esp_timer_impl_init.
|
|
|
|
*/
|
2020-08-18 04:15:53 -04:00
|
|
|
static intr_handler_t s_alarm_handler = NULL;
|
2020-02-06 01:00:18 -05:00
|
|
|
|
2021-04-02 00:41:21 -04:00
|
|
|
/* Systimer HAL layer object */
|
|
|
|
static systimer_hal_context_t systimer_hal;
|
|
|
|
|
2020-02-06 01:00:18 -05:00
|
|
|
/* Spinlock used to protect access to the hardware registers. */
|
2022-07-19 03:35:32 -04:00
|
|
|
static portMUX_TYPE s_time_update_lock = portMUX_INITIALIZER_UNLOCKED;
|
2020-02-06 01:00:18 -05:00
|
|
|
|
2023-06-09 16:21:37 -04:00
|
|
|
/* Alarm values to generate interrupt on match */
|
|
|
|
static uint64_t timestamp_id[2] = { UINT64_MAX, UINT64_MAX };
|
|
|
|
|
2020-02-06 01:00:18 -05:00
|
|
|
void esp_timer_impl_lock(void)
|
|
|
|
{
|
|
|
|
portENTER_CRITICAL(&s_time_update_lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
void esp_timer_impl_unlock(void)
|
|
|
|
{
|
|
|
|
portEXIT_CRITICAL(&s_time_update_lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
uint64_t IRAM_ATTR esp_timer_impl_get_counter_reg(void)
|
|
|
|
{
|
2023-01-10 02:13:19 -05:00
|
|
|
return systimer_hal_get_counter_value(&systimer_hal, SYSTIMER_COUNTER_ESPTIMER);
|
2020-02-06 01:00:18 -05:00
|
|
|
}
|
|
|
|
|
2020-03-31 06:44:37 -04:00
|
|
|
int64_t IRAM_ATTR esp_timer_impl_get_time(void)
|
2020-02-06 01:00:18 -05:00
|
|
|
{
|
2022-07-21 07:05:21 -04:00
|
|
|
// we hope the execution time of this function won't > 1us
|
|
|
|
// thus, to save one function call, we didn't use the existing `systimer_hal_get_time`
|
2023-01-10 02:13:19 -05:00
|
|
|
return systimer_hal.ticks_to_us(systimer_hal_get_counter_value(&systimer_hal, SYSTIMER_COUNTER_ESPTIMER));
|
2020-02-06 01:00:18 -05:00
|
|
|
}
|
|
|
|
|
2020-08-18 04:15:53 -04:00
|
|
|
int64_t esp_timer_get_time(void) __attribute__((alias("esp_timer_impl_get_time")));
|
|
|
|
|
2020-02-10 08:45:09 -05:00
|
|
|
void IRAM_ATTR esp_timer_impl_set_alarm_id(uint64_t timestamp, unsigned alarm_id)
|
2020-02-06 01:00:18 -05:00
|
|
|
{
|
2023-06-09 16:21:37 -04:00
|
|
|
assert(alarm_id < sizeof(timestamp_id) / sizeof(timestamp_id[0]));
|
2020-02-06 01:00:18 -05:00
|
|
|
portENTER_CRITICAL_SAFE(&s_time_update_lock);
|
2020-02-10 08:45:09 -05:00
|
|
|
timestamp_id[alarm_id] = timestamp;
|
|
|
|
timestamp = MIN(timestamp_id[0], timestamp_id[1]);
|
2023-01-10 02:13:19 -05:00
|
|
|
systimer_hal_set_alarm_target(&systimer_hal, SYSTIMER_ALARM_ESPTIMER, timestamp);
|
2020-02-06 01:00:18 -05:00
|
|
|
portEXIT_CRITICAL_SAFE(&s_time_update_lock);
|
|
|
|
}
|
|
|
|
|
2020-02-10 08:45:09 -05:00
|
|
|
void IRAM_ATTR esp_timer_impl_set_alarm(uint64_t timestamp)
|
|
|
|
{
|
|
|
|
esp_timer_impl_set_alarm_id(timestamp, 0);
|
|
|
|
}
|
|
|
|
|
2023-06-09 16:21:37 -04:00
|
|
|
#ifdef CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD
|
|
|
|
static void IRAM_ATTR try_to_set_next_alarm(void) {
|
|
|
|
portENTER_CRITICAL_ISR(&s_time_update_lock);
|
|
|
|
unsigned now_alarm_idx; // ISR is called due to this current alarm
|
|
|
|
unsigned next_alarm_idx; // The following alarm after now_alarm_idx
|
|
|
|
if (timestamp_id[0] < timestamp_id[1]) {
|
|
|
|
now_alarm_idx = 0;
|
|
|
|
next_alarm_idx = 1;
|
|
|
|
} else {
|
|
|
|
now_alarm_idx = 1;
|
|
|
|
next_alarm_idx = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (timestamp_id[next_alarm_idx] != UINT64_MAX) {
|
|
|
|
// The following alarm is valid and can be used.
|
|
|
|
// Remove the current alarm from consideration.
|
|
|
|
esp_timer_impl_set_alarm_id(UINT64_MAX, now_alarm_idx);
|
|
|
|
} else {
|
|
|
|
// There is no the following alarm.
|
|
|
|
// Remove the current alarm from consideration as well.
|
|
|
|
timestamp_id[now_alarm_idx] = UINT64_MAX;
|
|
|
|
}
|
|
|
|
portEXIT_CRITICAL_ISR(&s_time_update_lock);
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
#define try_to_set_next_alarm()
|
|
|
|
#endif
|
|
|
|
|
2020-02-06 01:00:18 -05:00
|
|
|
static void IRAM_ATTR timer_alarm_isr(void *arg)
|
|
|
|
{
|
2023-01-05 05:30:27 -05:00
|
|
|
#if ISR_HANDLERS == 1
|
2020-02-06 01:00:18 -05:00
|
|
|
// clear the interrupt
|
2023-01-10 02:13:19 -05:00
|
|
|
systimer_ll_clear_alarm_int(systimer_hal.dev, SYSTIMER_ALARM_ESPTIMER);
|
2023-06-09 16:21:37 -04:00
|
|
|
|
|
|
|
try_to_set_next_alarm();
|
2020-02-06 01:00:18 -05:00
|
|
|
/* Call the upper layer handler */
|
|
|
|
(*s_alarm_handler)(arg);
|
2023-01-05 05:30:27 -05:00
|
|
|
#else
|
|
|
|
static volatile uint32_t processed_by = NOT_USED;
|
|
|
|
static volatile bool pending_alarm = false;
|
|
|
|
/* CRITICAL section ensures the read/clear is atomic between cores */
|
|
|
|
portENTER_CRITICAL_ISR(&s_time_update_lock);
|
|
|
|
if (systimer_ll_is_alarm_int_fired(systimer_hal.dev, SYSTIMER_ALARM_ESPTIMER)) {
|
|
|
|
// Clear interrupt status
|
|
|
|
systimer_ll_clear_alarm_int(systimer_hal.dev, SYSTIMER_ALARM_ESPTIMER);
|
|
|
|
// Is the other core already processing a previous alarm?
|
|
|
|
if (processed_by == NOT_USED) {
|
|
|
|
// Current core is not processing an alarm yet
|
|
|
|
processed_by = xPortGetCoreID();
|
|
|
|
do {
|
|
|
|
pending_alarm = false;
|
|
|
|
// Clear interrupt status
|
|
|
|
systimer_ll_clear_alarm_int(systimer_hal.dev, SYSTIMER_ALARM_ESPTIMER);
|
|
|
|
portEXIT_CRITICAL_ISR(&s_time_update_lock);
|
|
|
|
|
2023-06-09 16:21:37 -04:00
|
|
|
try_to_set_next_alarm();
|
2023-01-05 05:30:27 -05:00
|
|
|
(*s_alarm_handler)(arg);
|
|
|
|
|
|
|
|
portENTER_CRITICAL_ISR(&s_time_update_lock);
|
|
|
|
// Another alarm could have occurred while were handling the previous alarm.
|
|
|
|
// Check if we need to call the s_alarm_handler again:
|
|
|
|
// 1) if the alarm has already been fired, it helps to handle it immediately without an additional ISR call.
|
|
|
|
// 2) handle pending alarm that was cleared by the other core in time when this core worked with the current alarm.
|
|
|
|
} while (systimer_ll_is_alarm_int_fired(systimer_hal.dev, SYSTIMER_ALARM_ESPTIMER) || pending_alarm);
|
|
|
|
processed_by = NOT_USED;
|
|
|
|
} else {
|
|
|
|
// Current core arrived at ISR but the other core is still handling a previous alarm.
|
|
|
|
// Once we already cleared the ISR status we need to let the other core know that it was.
|
|
|
|
// Set the flag to handle the current alarm by the other core later.
|
|
|
|
pending_alarm = true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
portEXIT_CRITICAL_ISR(&s_time_update_lock);
|
|
|
|
#endif // ISR_HANDLERS != 1
|
2020-02-06 01:00:18 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
void IRAM_ATTR esp_timer_impl_update_apb_freq(uint32_t apb_ticks_per_us)
|
|
|
|
{
|
2022-07-21 07:05:21 -04:00
|
|
|
#if !SOC_SYSTIMER_FIXED_DIVIDER
|
2021-04-02 00:41:21 -04:00
|
|
|
systimer_hal_on_apb_freq_update(&systimer_hal, apb_ticks_per_us);
|
|
|
|
#endif
|
2020-02-06 01:00:18 -05:00
|
|
|
}
|
|
|
|
|
2022-06-14 02:49:26 -04:00
|
|
|
void esp_timer_impl_set(uint64_t new_us)
|
2020-02-06 01:00:18 -05:00
|
|
|
{
|
|
|
|
portENTER_CRITICAL_SAFE(&s_time_update_lock);
|
2022-07-01 13:58:23 -04:00
|
|
|
systimer_counter_value_t new_count = {
|
2022-07-21 07:05:21 -04:00
|
|
|
.val = systimer_hal.us_to_ticks(new_us),
|
2022-07-01 13:58:23 -04:00
|
|
|
};
|
2023-01-10 02:13:19 -05:00
|
|
|
systimer_ll_set_counter_value(systimer_hal.dev, SYSTIMER_COUNTER_ESPTIMER, new_count.val);
|
|
|
|
systimer_ll_apply_counter_value(systimer_hal.dev, SYSTIMER_COUNTER_ESPTIMER);
|
2022-06-14 02:49:26 -04:00
|
|
|
portEXIT_CRITICAL_SAFE(&s_time_update_lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
void esp_timer_impl_advance(int64_t time_diff_us)
|
|
|
|
{
|
|
|
|
portENTER_CRITICAL_SAFE(&s_time_update_lock);
|
2023-01-10 02:13:19 -05:00
|
|
|
systimer_hal_counter_value_advance(&systimer_hal, SYSTIMER_COUNTER_ESPTIMER, time_diff_us);
|
2020-02-06 01:00:18 -05:00
|
|
|
portEXIT_CRITICAL_SAFE(&s_time_update_lock);
|
|
|
|
}
|
|
|
|
|
2021-07-19 21:31:25 -04:00
|
|
|
esp_err_t esp_timer_impl_early_init(void)
|
|
|
|
{
|
2022-07-21 07:05:21 -04:00
|
|
|
periph_module_enable(PERIPH_SYSTIMER_MODULE);
|
|
|
|
systimer_hal_tick_rate_ops_t ops = {
|
|
|
|
.ticks_to_us = systimer_ticks_to_us,
|
|
|
|
.us_to_ticks = systimer_us_to_ticks,
|
|
|
|
};
|
2021-07-19 21:31:25 -04:00
|
|
|
systimer_hal_init(&systimer_hal);
|
2022-07-21 07:05:21 -04:00
|
|
|
systimer_hal_set_tick_rate_ops(&systimer_hal, &ops);
|
2021-07-19 21:31:25 -04:00
|
|
|
|
2022-07-21 07:05:21 -04:00
|
|
|
#if !SOC_SYSTIMER_FIXED_DIVIDER
|
2022-03-25 06:41:25 -04:00
|
|
|
assert(esp_clk_xtal_freq() == (40 * 1000000) &&
|
2022-07-21 07:05:21 -04:00
|
|
|
"update the step for xtal to support other XTAL:APB frequency ratios");
|
2021-07-19 21:31:25 -04:00
|
|
|
systimer_hal_set_steps_per_tick(&systimer_hal, 0, 2); // for xtal
|
|
|
|
systimer_hal_set_steps_per_tick(&systimer_hal, 1, 1); // for pll
|
|
|
|
#endif
|
|
|
|
|
2023-01-10 02:13:19 -05:00
|
|
|
systimer_hal_enable_counter(&systimer_hal, SYSTIMER_COUNTER_ESPTIMER);
|
|
|
|
systimer_hal_select_alarm_mode(&systimer_hal, SYSTIMER_ALARM_ESPTIMER, SYSTIMER_ALARM_MODE_ONESHOT);
|
|
|
|
systimer_hal_connect_alarm_counter(&systimer_hal, SYSTIMER_ALARM_ESPTIMER, SYSTIMER_COUNTER_ESPTIMER);
|
2021-07-19 21:31:25 -04:00
|
|
|
|
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
2020-02-06 01:00:18 -05:00
|
|
|
esp_err_t esp_timer_impl_init(intr_handler_t alarm_handler)
|
|
|
|
{
|
2023-01-05 05:30:27 -05:00
|
|
|
if (s_timer_interrupt_handle[(ISR_HANDLERS == 1) ? 0 : xPortGetCoreID()] != NULL) {
|
|
|
|
ESP_EARLY_LOGE(TAG, "timer ISR is already initialized");
|
|
|
|
return ESP_ERR_INVALID_STATE;
|
|
|
|
}
|
2020-02-06 01:00:18 -05:00
|
|
|
|
2023-01-05 05:30:27 -05:00
|
|
|
int isr_flags = ESP_INTR_FLAG_INTRDISABLED
|
|
|
|
| ((1 << CONFIG_ESP_TIMER_INTERRUPT_LEVEL) & ESP_INTR_FLAG_LEVELMASK)
|
|
|
|
#if !SOC_SYSTIMER_INT_LEVEL
|
|
|
|
| ESP_INTR_FLAG_EDGE
|
|
|
|
#endif
|
|
|
|
| ESP_INTR_FLAG_IRAM;
|
|
|
|
|
|
|
|
esp_err_t err = esp_intr_alloc(ETS_SYSTIMER_TARGET2_EDGE_INTR_SOURCE, isr_flags,
|
|
|
|
&timer_alarm_isr, NULL,
|
|
|
|
&s_timer_interrupt_handle[(ISR_HANDLERS == 1) ? 0 : xPortGetCoreID()]);
|
2020-02-06 01:00:18 -05:00
|
|
|
if (err != ESP_OK) {
|
2021-08-04 08:33:44 -04:00
|
|
|
ESP_EARLY_LOGE(TAG, "esp_intr_alloc failed (0x%x)", err);
|
2023-01-05 05:30:27 -05:00
|
|
|
return err;
|
2020-02-06 01:00:18 -05:00
|
|
|
}
|
2020-03-26 02:02:22 -04:00
|
|
|
|
2023-01-05 05:30:27 -05:00
|
|
|
if (s_alarm_handler == NULL) {
|
|
|
|
s_alarm_handler = alarm_handler;
|
|
|
|
/* TODO: if SYSTIMER is used for anything else, access to SYSTIMER_INT_ENA_REG has to be
|
|
|
|
* protected by a shared spinlock. Since this code runs as part of early startup, this
|
|
|
|
* is practically not an issue.
|
|
|
|
*/
|
|
|
|
systimer_hal_enable_alarm_int(&systimer_hal, SYSTIMER_ALARM_ESPTIMER);
|
|
|
|
}
|
2020-03-26 02:02:22 -04:00
|
|
|
|
2023-01-05 05:30:27 -05:00
|
|
|
err = esp_intr_enable(s_timer_interrupt_handle[(ISR_HANDLERS == 1) ? 0 : xPortGetCoreID()]);
|
2020-03-26 02:02:22 -04:00
|
|
|
if (err != ESP_OK) {
|
2023-01-05 05:30:27 -05:00
|
|
|
ESP_EARLY_LOGE(TAG, "Can not enable ISR (0x%0x)", err);
|
2020-03-26 02:02:22 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
return err;
|
2020-02-06 01:00:18 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
void esp_timer_impl_deinit(void)
|
|
|
|
{
|
2023-01-10 02:13:19 -05:00
|
|
|
systimer_ll_enable_alarm(systimer_hal.dev, SYSTIMER_ALARM_ESPTIMER, false);
|
2020-03-26 02:02:22 -04:00
|
|
|
/* TODO: may need a spinlock, see the note related to SYSTIMER_INT_ENA_REG in systimer_hal_init */
|
2023-01-10 02:13:19 -05:00
|
|
|
systimer_ll_enable_alarm_int(systimer_hal.dev, SYSTIMER_ALARM_ESPTIMER, false);
|
2023-01-05 05:30:27 -05:00
|
|
|
for (unsigned i = 0; i < ISR_HANDLERS; i++) {
|
|
|
|
if (s_timer_interrupt_handle[i] != NULL) {
|
|
|
|
esp_intr_disable(s_timer_interrupt_handle[i]);
|
|
|
|
esp_intr_free(s_timer_interrupt_handle[i]);
|
|
|
|
s_timer_interrupt_handle[i] = NULL;
|
|
|
|
}
|
|
|
|
}
|
2020-03-26 02:02:22 -04:00
|
|
|
s_alarm_handler = NULL;
|
2020-02-06 01:00:18 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
uint64_t IRAM_ATTR esp_timer_impl_get_min_period_us(void)
|
|
|
|
{
|
|
|
|
return 50;
|
|
|
|
}
|
|
|
|
|
|
|
|
uint64_t esp_timer_impl_get_alarm_reg(void)
|
|
|
|
{
|
|
|
|
portENTER_CRITICAL_SAFE(&s_time_update_lock);
|
2023-01-10 02:13:19 -05:00
|
|
|
uint64_t val = systimer_hal_get_alarm_value(&systimer_hal, SYSTIMER_ALARM_ESPTIMER);
|
2020-02-06 01:00:18 -05:00
|
|
|
portEXIT_CRITICAL_SAFE(&s_time_update_lock);
|
2020-03-26 02:02:22 -04:00
|
|
|
return val;
|
2020-02-06 01:00:18 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
void esp_timer_private_update_apb_freq(uint32_t apb_ticks_per_us) __attribute__((alias("esp_timer_impl_update_apb_freq")));
|
2022-06-14 02:49:26 -04:00
|
|
|
void esp_timer_private_set(uint64_t new_us) __attribute__((alias("esp_timer_impl_set")));
|
|
|
|
void esp_timer_private_advance(int64_t time_diff_us) __attribute__((alias("esp_timer_impl_advance")));
|
2020-02-06 01:00:18 -05:00
|
|
|
void esp_timer_private_lock(void) __attribute__((alias("esp_timer_impl_lock")));
|
|
|
|
void esp_timer_private_unlock(void) __attribute__((alias("esp_timer_impl_unlock")));
|