2020-06-22 23:53:58 -04:00
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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <stdint.h>
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#include <time.h>
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#include <sys/time.h>
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#include <sys/lock.h>
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2020-06-22 23:53:58 -04:00
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#include "esp_system.h"
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#include "soc/rtc.h"
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#include "esp_rom_sys.h"
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2020-08-11 05:49:48 -04:00
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#include "esp_private/system_internal.h"
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2020-06-22 23:53:58 -04:00
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#include "esp_time_impl.h"
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#include "sdkconfig.h"
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#if CONFIG_IDF_TARGET_ESP32
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#include "esp32/rom/rtc.h"
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#include "esp32/clk.h"
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#include "esp32/rtc.h"
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#elif CONFIG_IDF_TARGET_ESP32S2
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#include "esp32s2/rom/rtc.h"
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#include "esp32s2/clk.h"
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#include "esp32s2/rtc.h"
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2020-07-29 01:13:51 -04:00
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#elif CONFIG_IDF_TARGET_ESP32S3
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#include "esp32s3/rom/rtc.h"
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#include "esp32s3/clk.h"
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#include "esp32s3/rtc.h"
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#endif
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#if defined( CONFIG_ESP32_TIME_SYSCALL_USE_RTC ) \
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|| defined( CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1 ) \
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|| defined( CONFIG_ESP32S2_TIME_SYSCALL_USE_RTC ) \
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|| defined( CONFIG_ESP32S2_TIME_SYSCALL_USE_RTC_FRC1 ) \
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|| defined( CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC ) \
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|| defined( CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC_FRC1 )
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#define WITH_RTC 1
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#endif
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#if defined( CONFIG_ESP32_TIME_SYSCALL_USE_FRC1 ) \
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|| defined( CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1 ) \
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|| defined( CONFIG_ESP32S2_TIME_SYSCALL_USE_FRC1 ) \
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|| defined( CONFIG_ESP32S2_TIME_SYSCALL_USE_RTC_FRC1 )
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#define WITH_FRC 1
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#endif
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// Offset between FRC timer and the RTC.
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// Initialized after reset or light sleep.
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#if defined(WITH_RTC) && defined(WITH_FRC)
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uint64_t s_microseconds_offset;
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#endif
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#ifndef WITH_RTC
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static uint64_t s_boot_time; // when RTC is used to persist time, two RTC_STORE registers are used to store boot time instead
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#endif
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static _lock_t s_boot_time_lock;
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#if defined( WITH_FRC ) || defined( WITH_RTC )
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uint64_t esp_time_impl_get_time_since_boot(void)
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{
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uint64_t microseconds = 0;
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#ifdef WITH_FRC
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#ifdef WITH_RTC
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microseconds = s_microseconds_offset + esp_system_get_time();
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#else
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microseconds = esp_system_get_time();
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#endif // WITH_RTC
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#elif defined(WITH_RTC)
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microseconds = esp_rtc_get_time_us();
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#endif // WITH_FRC
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return microseconds;
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}
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uint64_t esp_time_impl_get_time(void)
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{
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uint64_t microseconds = 0;
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#if defined( WITH_FRC )
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microseconds = esp_system_get_time();
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#elif defined( WITH_RTC )
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microseconds = esp_rtc_get_time_us();
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#endif // WITH_FRC
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return microseconds;
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}
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#endif // defined( WITH_FRC ) || defined( WITH_RTC )
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void esp_time_impl_set_boot_time(uint64_t time_us)
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{
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_lock_acquire(&s_boot_time_lock);
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#ifdef WITH_RTC
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REG_WRITE(RTC_BOOT_TIME_LOW_REG, (uint32_t) (time_us & 0xffffffff));
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REG_WRITE(RTC_BOOT_TIME_HIGH_REG, (uint32_t) (time_us >> 32));
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#else
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s_boot_time = time_us;
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#endif
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_lock_release(&s_boot_time_lock);
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}
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uint64_t esp_clk_rtc_time(void)
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{
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#ifdef WITH_RTC
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return esp_rtc_get_time_us();
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#else
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return 0;
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#endif
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}
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uint64_t esp_time_impl_get_boot_time(void)
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{
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uint64_t result;
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_lock_acquire(&s_boot_time_lock);
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#ifdef WITH_RTC
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result = ((uint64_t) REG_READ(RTC_BOOT_TIME_LOW_REG)) + (((uint64_t) REG_READ(RTC_BOOT_TIME_HIGH_REG)) << 32);
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#else
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result = s_boot_time;
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#endif
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_lock_release(&s_boot_time_lock);
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return result;
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}
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uint32_t esp_clk_slowclk_cal_get(void)
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{
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return REG_READ(RTC_SLOW_CLK_CAL_REG);
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}
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2020-06-23 04:07:09 -04:00
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uint64_t esp_rtc_get_time_us(void)
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{
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const uint64_t ticks = rtc_time_get();
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const uint32_t cal = esp_clk_slowclk_cal_get();
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/* RTC counter result is up to 2^48, calibration factor is up to 2^24,
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* for a 32kHz clock. We need to calculate (assuming no overflow):
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* (ticks * cal) >> RTC_CLK_CAL_FRACT
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*
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* An overflow in the (ticks * cal) multiplication would cause time to
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* wrap around after approximately 13 days, which is probably not enough
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* for some applications.
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* Therefore multiplication is split into two terms, for the lower 32-bit
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* and the upper 16-bit parts of "ticks", i.e.:
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* ((ticks_low + 2^32 * ticks_high) * cal) >> RTC_CLK_CAL_FRACT
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*/
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const uint64_t ticks_low = ticks & UINT32_MAX;
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const uint64_t ticks_high = ticks >> 32;
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return ((ticks_low * cal) >> RTC_CLK_CAL_FRACT) +
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((ticks_high * cal) << (32 - RTC_CLK_CAL_FRACT));
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}
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void esp_clk_slowclk_cal_set(uint32_t new_cal)
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{
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#if defined(WITH_RTC)
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/* To force monotonic time values even when clock calibration value changes,
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* we adjust boot time, given current time and the new calibration value:
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* T = boot_time_old + cur_cal * ticks / 2^19
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* T = boot_time_adj + new_cal * ticks / 2^19
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* which results in:
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* boot_time_adj = boot_time_old + ticks * (cur_cal - new_cal) / 2^19
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*/
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const int64_t ticks = (int64_t) rtc_time_get();
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const uint32_t cur_cal = REG_READ(RTC_SLOW_CLK_CAL_REG);
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int32_t cal_diff = (int32_t) (cur_cal - new_cal);
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int64_t boot_time_diff = ticks * cal_diff / (1LL << RTC_CLK_CAL_FRACT);
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uint64_t boot_time_adj = esp_time_impl_get_boot_time() + boot_time_diff;
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esp_time_impl_set_boot_time(boot_time_adj);
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#endif // WITH_RTC
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REG_WRITE(RTC_SLOW_CLK_CAL_REG, new_cal);
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}
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void esp_set_time_from_rtc(void)
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{
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#if defined( WITH_FRC ) && defined( WITH_RTC )
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// initialize time from RTC clock
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s_microseconds_offset = esp_rtc_get_time_us() - esp_system_get_time();
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#endif // WITH_FRC && WITH_RTC
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}
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void esp_sync_counters_rtc_and_frc(void)
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{
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#if defined( WITH_FRC ) && defined( WITH_RTC )
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struct timeval tv;
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gettimeofday(&tv, NULL);
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settimeofday(&tv, NULL);
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int64_t s_microseconds_offset_cur = esp_rtc_get_time_us() - esp_system_get_time();
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esp_time_impl_set_boot_time(esp_time_impl_get_boot_time() + ((int64_t)s_microseconds_offset - s_microseconds_offset_cur));
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#endif
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}
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void esp_time_impl_init(void)
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{
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esp_set_time_from_rtc();
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}
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