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# field_name , | efuse_block , | bit_start , | bit_count , |comment #
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# | (EFUSE_BLK0 | (0..255) | (1-256) | #
# | EFUSE_BLK1 | | | #
# | ...) | | | #
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##########################################################################
# !!!!!!!!!!! #
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# After editing this file , run the command manually "idf.py efuse-common-table"
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# this will generate new source files , next rebuild all the sources.
# !!!!!!!!!!! #
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# This file was generated by regtools.py based on the efuses.yaml file with the version: 888a61f6f500d9c7ee0aa32016b0bee7
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WR_DIS , EFUSE_BLK0 , 0 , 32 , [] Disable programming of individual eFuses
WR_DIS.RD_DIS , EFUSE_BLK0 , 0 , 1 , [] wr_dis of RD_DIS
WR_DIS.DIS_ICACHE , EFUSE_BLK0 , 2 , 1 , [] wr_dis of DIS_ICACHE
WR_DIS.DIS_DCACHE , EFUSE_BLK0 , 2 , 1 , [] wr_dis of DIS_DCACHE
WR_DIS.DIS_DOWNLOAD_ICACHE , EFUSE_BLK0 , 2 , 1 , [] wr_dis of DIS_DOWNLOAD_ICACHE
WR_DIS.DIS_DOWNLOAD_DCACHE , EFUSE_BLK0 , 2 , 1 , [] wr_dis of DIS_DOWNLOAD_DCACHE
WR_DIS.DIS_FORCE_DOWNLOAD , EFUSE_BLK0 , 2 , 1 , [] wr_dis of DIS_FORCE_DOWNLOAD
WR_DIS.DIS_USB , EFUSE_BLK0 , 2 , 1 , [] wr_dis of DIS_USB
WR_DIS.DIS_TWAI , EFUSE_BLK0 , 2 , 1 , [WR_DIS.DIS_CAN] wr_dis of DIS_TWAI
WR_DIS.DIS_BOOT_REMAP , EFUSE_BLK0 , 2 , 1 , [] wr_dis of DIS_BOOT_REMAP
WR_DIS.SOFT_DIS_JTAG , EFUSE_BLK0 , 2 , 1 , [] wr_dis of SOFT_DIS_JTAG
WR_DIS.HARD_DIS_JTAG , EFUSE_BLK0 , 2 , 1 , [] wr_dis of HARD_DIS_JTAG
WR_DIS.DIS_DOWNLOAD_MANUAL_ENCRYPT , EFUSE_BLK0 , 2 , 1 , [] wr_dis of DIS_DOWNLOAD_MANUAL_ENCRYPT
WR_DIS.VDD_SPI_XPD , EFUSE_BLK0 , 3 , 1 , [] wr_dis of VDD_SPI_XPD
WR_DIS.VDD_SPI_TIEH , EFUSE_BLK0 , 3 , 1 , [] wr_dis of VDD_SPI_TIEH
WR_DIS.VDD_SPI_FORCE , EFUSE_BLK0 , 3 , 1 , [] wr_dis of VDD_SPI_FORCE
WR_DIS.WDT_DELAY_SEL , EFUSE_BLK0 , 3 , 1 , [] wr_dis of WDT_DELAY_SEL
WR_DIS.SPI_BOOT_CRYPT_CNT , EFUSE_BLK0 , 4 , 1 , [] wr_dis of SPI_BOOT_CRYPT_CNT
WR_DIS.SECURE_BOOT_KEY_REVOKE0 , EFUSE_BLK0 , 5 , 1 , [] wr_dis of SECURE_BOOT_KEY_REVOKE0
WR_DIS.SECURE_BOOT_KEY_REVOKE1 , EFUSE_BLK0 , 6 , 1 , [] wr_dis of SECURE_BOOT_KEY_REVOKE1
WR_DIS.SECURE_BOOT_KEY_REVOKE2 , EFUSE_BLK0 , 7 , 1 , [] wr_dis of SECURE_BOOT_KEY_REVOKE2
WR_DIS.KEY_PURPOSE_0 , EFUSE_BLK0 , 8 , 1 , [WR_DIS.KEY0_PURPOSE] wr_dis of KEY_PURPOSE_0
WR_DIS.KEY_PURPOSE_1 , EFUSE_BLK0 , 9 , 1 , [WR_DIS.KEY1_PURPOSE] wr_dis of KEY_PURPOSE_1
WR_DIS.KEY_PURPOSE_2 , EFUSE_BLK0 , 10 , 1 , [WR_DIS.KEY2_PURPOSE] wr_dis of KEY_PURPOSE_2
WR_DIS.KEY_PURPOSE_3 , EFUSE_BLK0 , 11 , 1 , [WR_DIS.KEY3_PURPOSE] wr_dis of KEY_PURPOSE_3
WR_DIS.KEY_PURPOSE_4 , EFUSE_BLK0 , 12 , 1 , [WR_DIS.KEY4_PURPOSE] wr_dis of KEY_PURPOSE_4
WR_DIS.KEY_PURPOSE_5 , EFUSE_BLK0 , 13 , 1 , [WR_DIS.KEY5_PURPOSE] wr_dis of KEY_PURPOSE_5
WR_DIS.SECURE_BOOT_EN , EFUSE_BLK0 , 15 , 1 , [] wr_dis of SECURE_BOOT_EN
WR_DIS.SECURE_BOOT_AGGRESSIVE_REVOKE , EFUSE_BLK0 , 16 , 1 , [] wr_dis of SECURE_BOOT_AGGRESSIVE_REVOKE
WR_DIS.FLASH_TPUW , EFUSE_BLK0 , 18 , 1 , [] wr_dis of FLASH_TPUW
WR_DIS.DIS_DOWNLOAD_MODE , EFUSE_BLK0 , 18 , 1 , [] wr_dis of DIS_DOWNLOAD_MODE
WR_DIS.DIS_LEGACY_SPI_BOOT , EFUSE_BLK0 , 18 , 1 , [] wr_dis of DIS_LEGACY_SPI_BOOT
WR_DIS.UART_PRINT_CHANNEL , EFUSE_BLK0 , 18 , 1 , [] wr_dis of UART_PRINT_CHANNEL
WR_DIS.DIS_USB_DOWNLOAD_MODE , EFUSE_BLK0 , 18 , 1 , [] wr_dis of DIS_USB_DOWNLOAD_MODE
WR_DIS.ENABLE_SECURITY_DOWNLOAD , EFUSE_BLK0 , 18 , 1 , [] wr_dis of ENABLE_SECURITY_DOWNLOAD
WR_DIS.UART_PRINT_CONTROL , EFUSE_BLK0 , 18 , 1 , [] wr_dis of UART_PRINT_CONTROL
WR_DIS.PIN_POWER_SELECTION , EFUSE_BLK0 , 18 , 1 , [] wr_dis of PIN_POWER_SELECTION
WR_DIS.FLASH_TYPE , EFUSE_BLK0 , 18 , 1 , [] wr_dis of FLASH_TYPE
WR_DIS.FORCE_SEND_RESUME , EFUSE_BLK0 , 18 , 1 , [] wr_dis of FORCE_SEND_RESUME
WR_DIS.SECURE_VERSION , EFUSE_BLK0 , 18 , 1 , [] wr_dis of SECURE_VERSION
WR_DIS.BLK1 , EFUSE_BLK0 , 20 , 1 , [] wr_dis of BLOCK1
WR_DIS.MAC , EFUSE_BLK0 , 20 , 1 , [WR_DIS.MAC_FACTORY] wr_dis of MAC
WR_DIS.SPI_PAD_CONFIG_CLK , EFUSE_BLK0 , 20 , 1 , [] wr_dis of SPI_PAD_CONFIG_CLK
WR_DIS.SPI_PAD_CONFIG_Q , EFUSE_BLK0 , 20 , 1 , [] wr_dis of SPI_PAD_CONFIG_Q
WR_DIS.SPI_PAD_CONFIG_D , EFUSE_BLK0 , 20 , 1 , [] wr_dis of SPI_PAD_CONFIG_D
WR_DIS.SPI_PAD_CONFIG_CS , EFUSE_BLK0 , 20 , 1 , [] wr_dis of SPI_PAD_CONFIG_CS
WR_DIS.SPI_PAD_CONFIG_HD , EFUSE_BLK0 , 20 , 1 , [] wr_dis of SPI_PAD_CONFIG_HD
WR_DIS.SPI_PAD_CONFIG_WP , EFUSE_BLK0 , 20 , 1 , [] wr_dis of SPI_PAD_CONFIG_WP
WR_DIS.SPI_PAD_CONFIG_DQS , EFUSE_BLK0 , 20 , 1 , [] wr_dis of SPI_PAD_CONFIG_DQS
WR_DIS.SPI_PAD_CONFIG_D4 , EFUSE_BLK0 , 20 , 1 , [] wr_dis of SPI_PAD_CONFIG_D4
WR_DIS.SPI_PAD_CONFIG_D5 , EFUSE_BLK0 , 20 , 1 , [] wr_dis of SPI_PAD_CONFIG_D5
WR_DIS.SPI_PAD_CONFIG_D6 , EFUSE_BLK0 , 20 , 1 , [] wr_dis of SPI_PAD_CONFIG_D6
WR_DIS.SPI_PAD_CONFIG_D7 , EFUSE_BLK0 , 20 , 1 , [] wr_dis of SPI_PAD_CONFIG_D7
WR_DIS.WAFER_VERSION_MAJOR , EFUSE_BLK0 , 20 , 1 , [] wr_dis of WAFER_VERSION_MAJOR
WR_DIS.WAFER_VERSION_MINOR_HI , EFUSE_BLK0 , 20 , 1 , [] wr_dis of WAFER_VERSION_MINOR_HI
WR_DIS.FLASH_VERSION , EFUSE_BLK0 , 20 , 1 , [] wr_dis of FLASH_VERSION
WR_DIS.BLK_VERSION_MAJOR , EFUSE_BLK0 , 20 , 1 , [] wr_dis of BLK_VERSION_MAJOR
WR_DIS.PSRAM_VERSION , EFUSE_BLK0 , 20 , 1 , [] wr_dis of PSRAM_VERSION
WR_DIS.PKG_VERSION , EFUSE_BLK0 , 20 , 1 , [] wr_dis of PKG_VERSION
WR_DIS.WAFER_VERSION_MINOR_LO , EFUSE_BLK0 , 20 , 1 , [] wr_dis of WAFER_VERSION_MINOR_LO
WR_DIS.SYS_DATA_PART1 , EFUSE_BLK0 , 21 , 1 , [] wr_dis of BLOCK2
WR_DIS.OPTIONAL_UNIQUE_ID , EFUSE_BLK0 , 21 , 1 , [] wr_dis of OPTIONAL_UNIQUE_ID
WR_DIS.ADC_CALIB , EFUSE_BLK0 , 21 , 1 , [] wr_dis of ADC_CALIB
WR_DIS.BLK_VERSION_MINOR , EFUSE_BLK0 , 21 , 1 , [] wr_dis of BLK_VERSION_MINOR
WR_DIS.TEMP_CALIB , EFUSE_BLK0 , 21 , 1 , [] wr_dis of TEMP_CALIB
WR_DIS.RTCCALIB_V1IDX_A10H , EFUSE_BLK0 , 21 , 1 , [] wr_dis of RTCCALIB_V1IDX_A10H
WR_DIS.RTCCALIB_V1IDX_A11H , EFUSE_BLK0 , 21 , 1 , [] wr_dis of RTCCALIB_V1IDX_A11H
WR_DIS.RTCCALIB_V1IDX_A12H , EFUSE_BLK0 , 21 , 1 , [] wr_dis of RTCCALIB_V1IDX_A12H
WR_DIS.RTCCALIB_V1IDX_A13H , EFUSE_BLK0 , 21 , 1 , [] wr_dis of RTCCALIB_V1IDX_A13H
WR_DIS.RTCCALIB_V1IDX_A20H , EFUSE_BLK0 , 21 , 1 , [] wr_dis of RTCCALIB_V1IDX_A20H
WR_DIS.RTCCALIB_V1IDX_A21H , EFUSE_BLK0 , 21 , 1 , [] wr_dis of RTCCALIB_V1IDX_A21H
WR_DIS.RTCCALIB_V1IDX_A22H , EFUSE_BLK0 , 21 , 1 , [] wr_dis of RTCCALIB_V1IDX_A22H
WR_DIS.RTCCALIB_V1IDX_A23H , EFUSE_BLK0 , 21 , 1 , [] wr_dis of RTCCALIB_V1IDX_A23H
WR_DIS.RTCCALIB_V1IDX_A10L , EFUSE_BLK0 , 21 , 1 , [] wr_dis of RTCCALIB_V1IDX_A10L
WR_DIS.RTCCALIB_V1IDX_A11L , EFUSE_BLK0 , 21 , 1 , [] wr_dis of RTCCALIB_V1IDX_A11L
WR_DIS.RTCCALIB_V1IDX_A12L , EFUSE_BLK0 , 21 , 1 , [] wr_dis of RTCCALIB_V1IDX_A12L
WR_DIS.RTCCALIB_V1IDX_A13L , EFUSE_BLK0 , 21 , 1 , [] wr_dis of RTCCALIB_V1IDX_A13L
WR_DIS.RTCCALIB_V1IDX_A20L , EFUSE_BLK0 , 21 , 1 , [] wr_dis of RTCCALIB_V1IDX_A20L
WR_DIS.RTCCALIB_V1IDX_A21L , EFUSE_BLK0 , 21 , 1 , [] wr_dis of RTCCALIB_V1IDX_A21L
WR_DIS.RTCCALIB_V1IDX_A22L , EFUSE_BLK0 , 21 , 1 , [] wr_dis of RTCCALIB_V1IDX_A22L
WR_DIS.RTCCALIB_V1IDX_A23L , EFUSE_BLK0 , 21 , 1 , [] wr_dis of RTCCALIB_V1IDX_A23L
WR_DIS.BLOCK_USR_DATA , EFUSE_BLK0 , 22 , 1 , [WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA
WR_DIS.CUSTOM_MAC , EFUSE_BLK0 , 22 , 1 , [WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM] wr_dis of CUSTOM_MAC
WR_DIS.BLOCK_KEY0 , EFUSE_BLK0 , 23 , 1 , [WR_DIS.KEY0] wr_dis of BLOCK_KEY0
WR_DIS.BLOCK_KEY1 , EFUSE_BLK0 , 24 , 1 , [WR_DIS.KEY1] wr_dis of BLOCK_KEY1
WR_DIS.BLOCK_KEY2 , EFUSE_BLK0 , 25 , 1 , [WR_DIS.KEY2] wr_dis of BLOCK_KEY2
WR_DIS.BLOCK_KEY3 , EFUSE_BLK0 , 26 , 1 , [WR_DIS.KEY3] wr_dis of BLOCK_KEY3
WR_DIS.BLOCK_KEY4 , EFUSE_BLK0 , 27 , 1 , [WR_DIS.KEY4] wr_dis of BLOCK_KEY4
WR_DIS.BLOCK_KEY5 , EFUSE_BLK0 , 28 , 1 , [WR_DIS.KEY5] wr_dis of BLOCK_KEY5
WR_DIS.BLOCK_SYS_DATA2 , EFUSE_BLK0 , 29 , 1 , [WR_DIS.SYS_DATA_PART2] wr_dis of BLOCK_SYS_DATA2
WR_DIS.USB_EXCHG_PINS , EFUSE_BLK0 , 30 , 1 , [] wr_dis of USB_EXCHG_PINS
WR_DIS.USB_EXT_PHY_ENABLE , EFUSE_BLK0 , 30 , 1 , [WR_DIS.EXT_PHY_ENABLE] wr_dis of USB_EXT_PHY_ENABLE
WR_DIS.USB_FORCE_NOPERSIST , EFUSE_BLK0 , 30 , 1 , [] wr_dis of USB_FORCE_NOPERSIST
WR_DIS.BLOCK0_VERSION , EFUSE_BLK0 , 30 , 1 , [] wr_dis of BLOCK0_VERSION
RD_DIS , EFUSE_BLK0 , 32 , 7 , [] Disable reading from BlOCK4-10
RD_DIS.BLOCK_KEY0 , EFUSE_BLK0 , 32 , 1 , [RD_DIS.KEY0] rd_dis of BLOCK_KEY0
RD_DIS.BLOCK_KEY1 , EFUSE_BLK0 , 33 , 1 , [RD_DIS.KEY1] rd_dis of BLOCK_KEY1
RD_DIS.BLOCK_KEY2 , EFUSE_BLK0 , 34 , 1 , [RD_DIS.KEY2] rd_dis of BLOCK_KEY2
RD_DIS.BLOCK_KEY3 , EFUSE_BLK0 , 35 , 1 , [RD_DIS.KEY3] rd_dis of BLOCK_KEY3
RD_DIS.BLOCK_KEY4 , EFUSE_BLK0 , 36 , 1 , [RD_DIS.KEY4] rd_dis of BLOCK_KEY4
RD_DIS.BLOCK_KEY5 , EFUSE_BLK0 , 37 , 1 , [RD_DIS.KEY5] rd_dis of BLOCK_KEY5
RD_DIS.BLOCK_SYS_DATA2 , EFUSE_BLK0 , 38 , 1 , [RD_DIS.SYS_DATA_PART2] rd_dis of BLOCK_SYS_DATA2
DIS_ICACHE , EFUSE_BLK0 , 40 , 1 , [] Set this bit to disable Icache
DIS_DCACHE , EFUSE_BLK0 , 41 , 1 , [] Set this bit to disable Dcache
DIS_DOWNLOAD_ICACHE , EFUSE_BLK0 , 42 , 1 , [] Disables Icache when SoC is in Download mode
DIS_DOWNLOAD_DCACHE , EFUSE_BLK0 , 43 , 1 , [] Disables Dcache when SoC is in Download mode
DIS_FORCE_DOWNLOAD , EFUSE_BLK0 , 44 , 1 , [] Set this bit to disable the function that forces chip into download mode
DIS_USB , EFUSE_BLK0 , 45 , 1 , [] Set this bit to disable USB OTG function
DIS_TWAI , EFUSE_BLK0 , 46 , 1 , [DIS_CAN] Set this bit to disable the TWAI Controller function
DIS_BOOT_REMAP , EFUSE_BLK0 , 47 , 1 , [] Disables capability to Remap RAM to ROM address space
SOFT_DIS_JTAG , EFUSE_BLK0 , 49 , 1 , [] Software disables JTAG. When software disabled; JTAG can be activated temporarily by HMAC peripheral
HARD_DIS_JTAG , EFUSE_BLK0 , 50 , 1 , [] Hardware disables JTAG permanently
DIS_DOWNLOAD_MANUAL_ENCRYPT , EFUSE_BLK0 , 51 , 1 , [] Disables flash encryption when in download boot modes
USB_EXCHG_PINS , EFUSE_BLK0 , 56 , 1 , [] Set this bit to exchange USB D+ and D- pins
USB_EXT_PHY_ENABLE , EFUSE_BLK0 , 57 , 1 , [EXT_PHY_ENABLE] Set this bit to enable external USB PHY
USB_FORCE_NOPERSIST , EFUSE_BLK0 , 58 , 1 , [] If set; forces USB BVALID to 1
BLOCK0_VERSION , EFUSE_BLK0 , 59 , 2 , [] BLOCK0 efuse version
VDD_SPI_XPD , EFUSE_BLK0 , 68 , 1 , [] If VDD_SPI_FORCE is 1; this value determines if the VDD_SPI regulator is powered on
VDD_SPI_TIEH , EFUSE_BLK0 , 69 , 1 , [] If VDD_SPI_FORCE is 1; determines VDD_SPI voltage {0: "VDD_SPI connects to 1.8 V LDO"; 1: "VDD_SPI connects to VDD3P3_RTC_IO"}
VDD_SPI_FORCE , EFUSE_BLK0 , 70 , 1 , [] Set this bit to use XPD_VDD_PSI_REG and VDD_SPI_TIEH to configure VDD_SPI LDO
WDT_DELAY_SEL , EFUSE_BLK0 , 80 , 2 , [] RTC watchdog timeout threshold; in unit of slow clock cycle {0: "40000"; 1: "80000"; 2: "160000"; 3: "320000"}
SPI_BOOT_CRYPT_CNT , EFUSE_BLK0 , 82 , 3 , [] Enables flash encryption when 1 or 3 bits are set and disabled otherwise {0: "Disable"; 1: "Enable"; 3: "Disable"; 7: "Enable"}
SECURE_BOOT_KEY_REVOKE0 , EFUSE_BLK0 , 85 , 1 , [] Revoke 1st secure boot key
SECURE_BOOT_KEY_REVOKE1 , EFUSE_BLK0 , 86 , 1 , [] Revoke 2nd secure boot key
SECURE_BOOT_KEY_REVOKE2 , EFUSE_BLK0 , 87 , 1 , [] Revoke 3rd secure boot key
KEY_PURPOSE_0 , EFUSE_BLK0 , 88 , 4 , [KEY0_PURPOSE] Purpose of KEY0
KEY_PURPOSE_1 , EFUSE_BLK0 , 92 , 4 , [KEY1_PURPOSE] Purpose of KEY1
KEY_PURPOSE_2 , EFUSE_BLK0 , 96 , 4 , [KEY2_PURPOSE] Purpose of KEY2
KEY_PURPOSE_3 , EFUSE_BLK0 , 100 , 4 , [KEY3_PURPOSE] Purpose of KEY3
KEY_PURPOSE_4 , EFUSE_BLK0 , 104 , 4 , [KEY4_PURPOSE] Purpose of KEY4
KEY_PURPOSE_5 , EFUSE_BLK0 , 108 , 4 , [KEY5_PURPOSE] Purpose of KEY5
SECURE_BOOT_EN , EFUSE_BLK0 , 116 , 1 , [] Set this bit to enable secure boot
SECURE_BOOT_AGGRESSIVE_REVOKE , EFUSE_BLK0 , 117 , 1 , [] Set this bit to enable aggressive secure boot key revocation mode
FLASH_TPUW , EFUSE_BLK0 , 124 , 4 , [] Configures flash startup delay after SoC power-up; in unit of (ms/2). When the value is 15; delay is 7.5 ms
DIS_DOWNLOAD_MODE , EFUSE_BLK0 , 128 , 1 , [] Set this bit to disable all download boot modes
DIS_LEGACY_SPI_BOOT , EFUSE_BLK0 , 129 , 1 , [] Set this bit to disable Legacy SPI boot mode
UART_PRINT_CHANNEL , EFUSE_BLK0 , 130 , 1 , [] Selects the default UART for printing boot messages {0: "UART0"; 1: "UART1"}
DIS_USB_DOWNLOAD_MODE , EFUSE_BLK0 , 132 , 1 , [] Set this bit to disable use of USB OTG in UART download boot mode
ENABLE_SECURITY_DOWNLOAD , EFUSE_BLK0 , 133 , 1 , [] Set this bit to enable secure UART download mode (read/write flash only)
UART_PRINT_CONTROL , EFUSE_BLK0 , 134 , 2 , [] Set the default UART boot message output mode {0: "Enable"; 1: "Enable when GPIO46 is low at reset"; 2: "Enable when GPIO46 is high at reset"; 3: "Disable"}
PIN_POWER_SELECTION , EFUSE_BLK0 , 136 , 1 , [] Set default power supply for GPIO33-GPIO37; set when SPI flash is initialized {0: "VDD3P3_CPU"; 1: "VDD_SPI"}
FLASH_TYPE , EFUSE_BLK0 , 137 , 1 , [] SPI flash type {0: "4 data lines"; 1: "8 data lines"}
FORCE_SEND_RESUME , EFUSE_BLK0 , 138 , 1 , [] If set; forces ROM code to send an SPI flash resume command during SPI boot
SECURE_VERSION , EFUSE_BLK0 , 139 , 16 , [] Secure version (used by ESP-IDF anti-rollback feature)
DISABLE_WAFER_VERSION_MAJOR , EFUSE_BLK0 , 160 , 1 , [] Disables check of wafer version major
DISABLE_BLK_VERSION_MAJOR , EFUSE_BLK0 , 161 , 1 , [] Disables check of blk version major
MAC , EFUSE_BLK1 , 40 , 8 , [MAC_FACTORY] MAC address
, EFUSE_BLK1 , 32 , 8 , [MAC_FACTORY] MAC address
, EFUSE_BLK1 , 24 , 8 , [MAC_FACTORY] MAC address
, EFUSE_BLK1 , 16 , 8 , [MAC_FACTORY] MAC address
, EFUSE_BLK1 , 8 , 8 , [MAC_FACTORY] MAC address
, EFUSE_BLK1 , 0 , 8 , [MAC_FACTORY] MAC address
SPI_PAD_CONFIG_CLK , EFUSE_BLK1 , 48 , 6 , [] SPI_PAD_configure CLK
SPI_PAD_CONFIG_Q , EFUSE_BLK1 , 54 , 6 , [] SPI_PAD_configure Q(D1)
SPI_PAD_CONFIG_D , EFUSE_BLK1 , 60 , 6 , [] SPI_PAD_configure D(D0)
SPI_PAD_CONFIG_CS , EFUSE_BLK1 , 66 , 6 , [] SPI_PAD_configure CS
SPI_PAD_CONFIG_HD , EFUSE_BLK1 , 72 , 6 , [] SPI_PAD_configure HD(D3)
SPI_PAD_CONFIG_WP , EFUSE_BLK1 , 78 , 6 , [] SPI_PAD_configure WP(D2)
SPI_PAD_CONFIG_DQS , EFUSE_BLK1 , 84 , 6 , [] SPI_PAD_configure DQS
SPI_PAD_CONFIG_D4 , EFUSE_BLK1 , 90 , 6 , [] SPI_PAD_configure D4
SPI_PAD_CONFIG_D5 , EFUSE_BLK1 , 96 , 6 , [] SPI_PAD_configure D5
SPI_PAD_CONFIG_D6 , EFUSE_BLK1 , 102 , 6 , [] SPI_PAD_configure D6
SPI_PAD_CONFIG_D7 , EFUSE_BLK1 , 108 , 6 , [] SPI_PAD_configure D7
WAFER_VERSION_MAJOR , EFUSE_BLK1 , 114 , 2 , [] WAFER_VERSION_MAJOR
WAFER_VERSION_MINOR_HI , EFUSE_BLK1 , 116 , 1 , [] WAFER_VERSION_MINOR most significant bit
FLASH_VERSION , EFUSE_BLK1 , 117 , 4 , [] Flash version
BLK_VERSION_MAJOR , EFUSE_BLK1 , 121 , 2 , [] BLK_VERSION_MAJOR
PSRAM_VERSION , EFUSE_BLK1 , 124 , 4 , [] PSRAM version
PKG_VERSION , EFUSE_BLK1 , 128 , 4 , [] Package version
WAFER_VERSION_MINOR_LO , EFUSE_BLK1 , 132 , 3 , [] WAFER_VERSION_MINOR least significant bits
OPTIONAL_UNIQUE_ID , EFUSE_BLK2 , 0 , 128 , [] Optional unique 128-bit ID
ADC_CALIB , EFUSE_BLK2 , 128 , 4 , [] 4 bit of ADC calibration
BLK_VERSION_MINOR , EFUSE_BLK2 , 132 , 3 , [] BLK_VERSION_MINOR of BLOCK2 {0: "No calib"; 1: "ADC calib V1"; 2: "ADC calib V2"}
TEMP_CALIB , EFUSE_BLK2 , 135 , 9 , [] Temperature calibration data
RTCCALIB_V1IDX_A10H , EFUSE_BLK2 , 144 , 8 , []
RTCCALIB_V1IDX_A11H , EFUSE_BLK2 , 152 , 8 , []
RTCCALIB_V1IDX_A12H , EFUSE_BLK2 , 160 , 8 , []
RTCCALIB_V1IDX_A13H , EFUSE_BLK2 , 168 , 8 , []
RTCCALIB_V1IDX_A20H , EFUSE_BLK2 , 176 , 8 , []
RTCCALIB_V1IDX_A21H , EFUSE_BLK2 , 184 , 8 , []
RTCCALIB_V1IDX_A22H , EFUSE_BLK2 , 192 , 8 , []
RTCCALIB_V1IDX_A23H , EFUSE_BLK2 , 200 , 8 , []
RTCCALIB_V1IDX_A10L , EFUSE_BLK2 , 208 , 6 , []
RTCCALIB_V1IDX_A11L , EFUSE_BLK2 , 214 , 6 , []
RTCCALIB_V1IDX_A12L , EFUSE_BLK2 , 220 , 6 , []
RTCCALIB_V1IDX_A13L , EFUSE_BLK2 , 226 , 6 , []
RTCCALIB_V1IDX_A20L , EFUSE_BLK2 , 232 , 6 , []
RTCCALIB_V1IDX_A21L , EFUSE_BLK2 , 238 , 6 , []
RTCCALIB_V1IDX_A22L , EFUSE_BLK2 , 244 , 6 , []
RTCCALIB_V1IDX_A23L , EFUSE_BLK2 , 250 , 6 , []
USER_DATA , EFUSE_BLK3 , 0 , 256 , [BLOCK_USR_DATA] User data
USER_DATA.MAC_CUSTOM , EFUSE_BLK3 , 200 , 48 , [MAC_CUSTOM CUSTOM_MAC] Custom MAC
KEY0 , EFUSE_BLK4 , 0 , 256 , [BLOCK_KEY0] Key0 or user data
KEY1 , EFUSE_BLK5 , 0 , 256 , [BLOCK_KEY1] Key1 or user data
KEY2 , EFUSE_BLK6 , 0 , 256 , [BLOCK_KEY2] Key2 or user data
KEY3 , EFUSE_BLK7 , 0 , 256 , [BLOCK_KEY3] Key3 or user data
KEY4 , EFUSE_BLK8 , 0 , 256 , [BLOCK_KEY4] Key4 or user data
KEY5 , EFUSE_BLK9 , 0 , 256 , [BLOCK_KEY5] Key5 or user data
SYS_DATA_PART2 , EFUSE_BLK10 , 0 , 256 , [BLOCK_SYS_DATA2] System data part 2 (reserved)