2021-10-04 16:01:50 -04:00
|
|
|
/*
|
|
|
|
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
|
|
|
|
*
|
|
|
|
* SPDX-License-Identifier: Apache-2.0
|
|
|
|
*/
|
2021-03-10 20:48:30 -05:00
|
|
|
|
2019-10-29 23:19:22 -04:00
|
|
|
#include "esp_system.h"
|
|
|
|
#include "esp_private/system_internal.h"
|
|
|
|
#include "esp_heap_caps.h"
|
|
|
|
#include "freertos/FreeRTOS.h"
|
|
|
|
#include "freertos/task.h"
|
2021-12-13 23:38:15 -05:00
|
|
|
#include "esp_cpu.h"
|
2020-03-10 11:46:10 -04:00
|
|
|
#include "soc/rtc.h"
|
|
|
|
#include "soc/rtc_cntl_reg.h"
|
2020-06-08 12:32:35 -04:00
|
|
|
#include "esp_private/panic_internal.h"
|
2020-07-13 09:33:23 -04:00
|
|
|
#include "esp_rom_uart.h"
|
2021-09-06 04:22:40 -04:00
|
|
|
#if CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
|
2020-07-13 09:33:23 -04:00
|
|
|
#if CONFIG_IDF_TARGET_ESP32S2
|
2020-03-10 11:46:10 -04:00
|
|
|
#include "esp32s2/memprot.h"
|
2021-11-06 05:24:45 -04:00
|
|
|
#elif CONFIG_IDF_TARGET_ESP8684
|
|
|
|
#include "esp8684/memprot.h"
|
2021-09-06 04:22:40 -04:00
|
|
|
#else
|
|
|
|
#include "esp_memprot.h"
|
|
|
|
#endif
|
2020-03-10 11:46:10 -04:00
|
|
|
#endif
|
|
|
|
|
2020-12-30 08:24:31 -05:00
|
|
|
#define SHUTDOWN_HANDLERS_NO 5
|
|
|
|
|
2019-10-29 23:19:22 -04:00
|
|
|
static shutdown_handler_t shutdown_handlers[SHUTDOWN_HANDLERS_NO];
|
|
|
|
|
2021-03-10 20:48:30 -05:00
|
|
|
void IRAM_ATTR esp_restart_noos_dig(void)
|
|
|
|
{
|
|
|
|
// make sure all the panic handler output is sent from UART FIFO
|
|
|
|
if (CONFIG_ESP_CONSOLE_UART_NUM >= 0) {
|
|
|
|
esp_rom_uart_tx_wait_idle(CONFIG_ESP_CONSOLE_UART_NUM);
|
|
|
|
}
|
|
|
|
|
|
|
|
// switch to XTAL (otherwise we will keep running from the PLL)
|
|
|
|
rtc_clk_cpu_freq_set_xtal();
|
|
|
|
|
|
|
|
#if CONFIG_IDF_TARGET_ESP32
|
|
|
|
esp_cpu_unstall(PRO_CPU_NUM);
|
|
|
|
#endif
|
|
|
|
// reset the digital part
|
|
|
|
SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_SYS_RST);
|
|
|
|
while (true) {
|
|
|
|
;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-10-29 23:19:22 -04:00
|
|
|
esp_err_t esp_register_shutdown_handler(shutdown_handler_t handler)
|
|
|
|
{
|
|
|
|
for (int i = 0; i < SHUTDOWN_HANDLERS_NO; i++) {
|
|
|
|
if (shutdown_handlers[i] == handler) {
|
|
|
|
return ESP_ERR_INVALID_STATE;
|
|
|
|
} else if (shutdown_handlers[i] == NULL) {
|
|
|
|
shutdown_handlers[i] = handler;
|
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return ESP_ERR_NO_MEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t esp_unregister_shutdown_handler(shutdown_handler_t handler)
|
|
|
|
{
|
|
|
|
for (int i = 0; i < SHUTDOWN_HANDLERS_NO; i++) {
|
|
|
|
if (shutdown_handlers[i] == handler) {
|
|
|
|
shutdown_handlers[i] = NULL;
|
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return ESP_ERR_INVALID_STATE;
|
|
|
|
}
|
|
|
|
|
2020-03-10 11:46:10 -04:00
|
|
|
|
2019-10-29 23:19:22 -04:00
|
|
|
void IRAM_ATTR esp_restart(void)
|
|
|
|
{
|
|
|
|
for (int i = SHUTDOWN_HANDLERS_NO - 1; i >= 0; i--) {
|
|
|
|
if (shutdown_handlers[i]) {
|
|
|
|
shutdown_handlers[i]();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// Disable scheduler on this core.
|
|
|
|
vTaskSuspendAll();
|
|
|
|
|
2021-01-04 13:38:10 -05:00
|
|
|
bool digital_reset_needed = false;
|
2021-10-04 16:01:50 -04:00
|
|
|
#if CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
|
2021-09-06 04:22:40 -04:00
|
|
|
#if CONFIG_IDF_TARGET_ESP32S2
|
2020-04-30 10:37:57 -04:00
|
|
|
if (esp_memprot_is_intr_ena_any() || esp_memprot_is_locked_any()) {
|
2021-01-04 13:38:10 -05:00
|
|
|
digital_reset_needed = true;
|
2020-03-10 11:46:10 -04:00
|
|
|
}
|
2021-09-06 04:22:40 -04:00
|
|
|
#else
|
|
|
|
bool is_on = false;
|
|
|
|
if (esp_mprot_is_intr_ena_any(&is_on) != ESP_OK || is_on) {
|
|
|
|
digital_reset_needed = true;
|
|
|
|
} else if (esp_mprot_is_conf_locked_any(&is_on) != ESP_OK || is_on) {
|
|
|
|
digital_reset_needed = true;
|
|
|
|
}
|
|
|
|
#endif
|
2020-03-10 11:46:10 -04:00
|
|
|
#endif
|
2021-01-04 13:38:10 -05:00
|
|
|
if (digital_reset_needed) {
|
|
|
|
esp_restart_noos_dig();
|
|
|
|
}
|
2019-10-29 23:19:22 -04:00
|
|
|
esp_restart_noos();
|
|
|
|
}
|
|
|
|
|
|
|
|
uint32_t esp_get_free_heap_size( void )
|
|
|
|
{
|
|
|
|
return heap_caps_get_free_size( MALLOC_CAP_DEFAULT );
|
|
|
|
}
|
|
|
|
|
2020-05-28 04:53:54 -04:00
|
|
|
uint32_t esp_get_free_internal_heap_size( void )
|
|
|
|
{
|
|
|
|
return heap_caps_get_free_size( MALLOC_CAP_8BIT | MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL );
|
|
|
|
}
|
|
|
|
|
2019-10-29 23:19:22 -04:00
|
|
|
uint32_t esp_get_minimum_free_heap_size( void )
|
|
|
|
{
|
|
|
|
return heap_caps_get_minimum_free_size( MALLOC_CAP_DEFAULT );
|
|
|
|
}
|
|
|
|
|
2020-03-10 11:46:10 -04:00
|
|
|
const char *esp_get_idf_version(void)
|
2019-10-29 23:19:22 -04:00
|
|
|
{
|
|
|
|
return IDF_VER;
|
|
|
|
}
|
|
|
|
|
2020-03-10 11:46:10 -04:00
|
|
|
void __attribute__((noreturn)) esp_system_abort(const char *details)
|
2020-02-02 10:23:16 -05:00
|
|
|
{
|
|
|
|
panic_abort(details);
|
2020-04-30 10:37:57 -04:00
|
|
|
}
|