2016-10-18 09:49:00 -04:00
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// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <stddef.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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2016-10-18 09:49:00 -04:00
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#include "sdkconfig.h"
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#include "esp_heap_caps.h"
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#include "esp_heap_caps_init.h"
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2016-10-18 09:49:00 -04:00
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/queue.h"
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#include "freertos/semphr.h"
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#include "freertos/xtensa_api.h"
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#include "freertos/portmacro.h"
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#include "xtensa/core-macros.h"
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#include "esp_types.h"
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#include "esp_system.h"
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#include "esp_task.h"
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#include "esp_attr.h"
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#include "esp_phy_init.h"
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#include "esp_bt.h"
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#include "esp_err.h"
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#include "esp_log.h"
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#include "esp_pm.h"
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#include "esp_ipc.h"
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#include "driver/periph_ctrl.h"
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#include "soc/rtc.h"
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#include "soc/rtc_cntl_reg.h"
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#include "soc/soc_memory_layout.h"
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#include "esp_clk.h"
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#include "esp_coexist_internal.h"
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#if CONFIG_BT_ENABLED
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/* Macro definition
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************************************************************************
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*/
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#define BTDM_LOG_TAG "BTDM_INIT"
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#define BTDM_INIT_PERIOD (5000) /* ms */
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/* Low Power Clock Selection */
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#define BTDM_LPCLK_SEL_XTAL (0)
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#define BTDM_LPCLK_SEL_XTAL32K (1)
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#define BTDM_LPCLK_SEL_RTC_SLOW (2)
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#define BTDM_LPCLK_SEL_8M (3)
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/* Sleep and wakeup interval control */
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#define BTDM_MIN_SLEEP_DURATION (24) // threshold of interval in half slots to allow to fall into modem sleep
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#define BTDM_MODEM_WAKE_UP_DELAY (8) // delay in half slots of modem wake up procedure, including re-enable PHY/RF
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#define BTDM_MODEM_SLEEP_IN_EFFECT (1)
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#define BT_DEBUG(...)
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#define BT_API_CALL_CHECK(info, api_call, ret) \
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do{\
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esp_err_t __err = (api_call);\
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if ((ret) != __err) {\
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BT_DEBUG("%s %d %s ret=0x%X\n", __FUNCTION__, __LINE__, (info), __err);\
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return __err;\
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}\
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} while(0)
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#define OSI_FUNCS_TIME_BLOCKING 0xffffffff
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#define OSI_VERSION 0x00010005
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#define OSI_MAGIC_VALUE 0xFADEBEAD
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/* SPIRAM Configuration */
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#if CONFIG_SPIRAM_USE_MALLOC
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#define BTDM_MAX_QUEUE_NUM (5)
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#endif
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/* Types definition
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************************************************************************
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*/
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/* VHCI function interface */
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typedef struct vhci_host_callback {
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void (*notify_host_send_available)(void); /*!< callback used to notify that the host can send packet to controller */
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int (*notify_host_recv)(uint8_t *data, uint16_t len); /*!< callback used to notify that the controller has a packet to send to the host*/
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} vhci_host_callback_t;
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/* Dram region */
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typedef struct {
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esp_bt_mode_t mode;
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intptr_t start;
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intptr_t end;
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} btdm_dram_available_region_t;
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/* PSRAM configuration */
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#if CONFIG_SPIRAM_USE_MALLOC
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typedef struct {
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QueueHandle_t handle;
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void *storage;
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void *buffer;
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} btdm_queue_item_t;
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#endif
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/* OSI function */
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struct osi_funcs_t {
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uint32_t _magic;
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uint32_t _version;
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xt_handler (*_set_isr)(int n, xt_handler f, void *arg);
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void (*_ints_on)(unsigned int mask);
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void (*_interrupt_disable)(void);
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void (*_interrupt_restore)(void);
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void (*_task_yield)(void);
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void (*_task_yield_from_isr)(void);
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void *(*_semphr_create)(uint32_t max, uint32_t init);
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void (*_semphr_delete)(void *semphr);
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int32_t (*_semphr_take_from_isr)(void *semphr, void *hptw);
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int32_t (*_semphr_give_from_isr)(void *semphr, void *hptw);
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int32_t (*_semphr_take)(void *semphr, uint32_t block_time_ms);
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int32_t (*_semphr_give)(void *semphr);
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void *(*_mutex_create)(void);
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void (*_mutex_delete)(void *mutex);
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int32_t (*_mutex_lock)(void *mutex);
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int32_t (*_mutex_unlock)(void *mutex);
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void *(* _queue_create)(uint32_t queue_len, uint32_t item_size);
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void (* _queue_delete)(void *queue);
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int32_t (* _queue_send)(void *queue, void *item, uint32_t block_time_ms);
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int32_t (* _queue_send_from_isr)(void *queue, void *item, void *hptw);
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int32_t (* _queue_recv)(void *queue, void *item, uint32_t block_time_ms);
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int32_t (* _queue_recv_from_isr)(void *queue, void *item, void *hptw);
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int32_t (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
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void (* _task_delete)(void *task_handle);
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bool (* _is_in_isr)(void);
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int (* _cause_sw_intr_to_core)(int core_id, int intr_no);
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void *(* _malloc)(uint32_t size);
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void *(* _malloc_internal)(uint32_t size);
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void (* _free)(void *p);
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int32_t (* _read_efuse_mac)(uint8_t mac[6]);
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void (* _srand)(unsigned int seed);
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int (* _rand)(void);
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uint32_t (* _btdm_lpcycles_2_hus)(uint32_t cycles, uint32_t *error_corr);
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uint32_t (* _btdm_hus_2_lpcycles)(uint32_t hus);
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bool (* _btdm_sleep_check_duration)(int32_t *slot_cnt);
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void (* _btdm_sleep_enter_phase1)(uint32_t lpcycles); /* called when interrupt is disabled */
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void (* _btdm_sleep_enter_phase2)(void);
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void (* _btdm_sleep_exit_phase1)(void); /* called from ISR */
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void (* _btdm_sleep_exit_phase2)(void); /* called from ISR */
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void (* _btdm_sleep_exit_phase3)(void); /* called from task */
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void (* _coex_wifi_sleep_set)(bool sleep);
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int (* _coex_core_ble_conn_dyn_prio_get)(bool *low, bool *high);
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void (* _coex_schm_status_bit_set)(uint32_t type, uint32_t status);
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void (* _coex_schm_status_bit_clear)(uint32_t type, uint32_t status);
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};
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/* External functions or values
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************************************************************************
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*/
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/* not for user call, so don't put to include file */
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/* OSI */
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extern int btdm_osi_funcs_register(void *osi_funcs);
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/* Initialise and De-initialise */
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extern int btdm_controller_init(esp_bt_controller_config_t *config_opts);
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extern void btdm_controller_deinit(void);
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extern int btdm_controller_enable(esp_bt_mode_t mode);
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extern void btdm_controller_disable(void);
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extern uint8_t btdm_controller_get_mode(void);
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extern const char *btdm_controller_get_compile_version(void);
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extern void btdm_rf_bb_init_phase2(void); // shall be called after PHY/RF is enabled
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/* Sleep */
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extern void btdm_controller_enable_sleep(bool enable);
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extern uint8_t btdm_controller_get_sleep_mode(void);
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extern bool btdm_power_state_active(void);
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extern void btdm_wakeup_request(bool request_lock);
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extern void btdm_wakeup_request_end(void);
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/* Low Power Clock */
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extern bool btdm_lpclk_select_src(uint32_t sel);
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extern bool btdm_lpclk_set_div(uint32_t div);
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extern int btdm_hci_tl_io_event_post(int event);
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/* VHCI */
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extern bool API_vhci_host_check_send_available(void);
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extern void API_vhci_host_send_packet(uint8_t *data, uint16_t len);
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extern int API_vhci_host_register_callback(const vhci_host_callback_t *callback);
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/* TX power */
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extern int ble_txpwr_set(int power_type, int power_level);
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extern int ble_txpwr_get(int power_type);
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extern uint16_t l2c_ble_link_get_tx_buf_num(void);
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extern char _bss_start_btdm;
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extern char _bss_end_btdm;
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extern char _data_start_btdm;
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extern char _data_end_btdm;
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extern uint32_t _data_start_btdm_rom;
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extern uint32_t _data_end_btdm_rom;
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extern uint32_t _bt_bss_start;
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extern uint32_t _bt_bss_end;
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extern uint32_t _btdm_bss_start;
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extern uint32_t _btdm_bss_end;
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extern uint32_t _bt_data_start;
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extern uint32_t _bt_data_end;
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extern uint32_t _btdm_data_start;
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extern uint32_t _btdm_data_end;
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extern char _bt_tmp_bss_start;
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extern char _bt_tmp_bss_end;
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/* Local Function Declare
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*********************************************************************
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*/
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#if CONFIG_SPIRAM_USE_MALLOC
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static bool btdm_queue_generic_register(const btdm_queue_item_t *queue);
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static bool btdm_queue_generic_deregister(btdm_queue_item_t *queue);
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#endif /* CONFIG_SPIRAM_USE_MALLOC */
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static void IRAM_ATTR interrupt_disable(void);
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static void IRAM_ATTR interrupt_restore(void);
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static void IRAM_ATTR task_yield_from_isr(void);
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static void *semphr_create_wrapper(uint32_t max, uint32_t init);
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static void semphr_delete_wrapper(void *semphr);
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static int32_t IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw);
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static int32_t IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw);
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static int32_t semphr_take_wrapper(void *semphr, uint32_t block_time_ms);
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static int32_t semphr_give_wrapper(void *semphr);
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static void *mutex_create_wrapper(void);
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static void mutex_delete_wrapper(void *mutex);
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static int32_t mutex_lock_wrapper(void *mutex);
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static int32_t mutex_unlock_wrapper(void *mutex);
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static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size);
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static void queue_delete_wrapper(void *queue);
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static int32_t queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms);
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static int32_t IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw);
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static int32_t queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms);
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static int32_t IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw);
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static int32_t task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
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static void task_delete_wrapper(void *task_handle);
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static bool IRAM_ATTR is_in_isr_wrapper(void);
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static void IRAM_ATTR cause_sw_intr(void *arg);
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static int IRAM_ATTR cause_sw_intr_to_core_wrapper(int core_id, int intr_no);
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static void *malloc_internal_wrapper(size_t size);
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static int32_t IRAM_ATTR read_mac_wrapper(uint8_t mac[6]);
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static void IRAM_ATTR srand_wrapper(unsigned int seed);
|
|
|
|
static int IRAM_ATTR rand_wrapper(void);
|
2020-07-09 08:58:13 -04:00
|
|
|
static uint32_t IRAM_ATTR btdm_lpcycles_2_hus(uint32_t cycles, uint32_t *error_corr);
|
|
|
|
static uint32_t IRAM_ATTR btdm_hus_2_lpcycles(uint32_t hus);
|
|
|
|
static bool IRAM_ATTR btdm_sleep_check_duration(int32_t *slot_cnt);
|
2018-12-11 03:49:01 -05:00
|
|
|
static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles);
|
|
|
|
static void btdm_sleep_enter_phase2_wrapper(void);
|
2020-07-09 08:58:13 -04:00
|
|
|
static void IRAM_ATTR btdm_sleep_exit_phase1_wrapper(void);
|
2018-12-11 03:49:01 -05:00
|
|
|
static void btdm_sleep_exit_phase3_wrapper(void);
|
2021-01-25 04:12:36 -05:00
|
|
|
static void coex_wifi_sleep_set_hook(bool sleep);
|
|
|
|
static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status);
|
|
|
|
static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status);
|
2018-06-15 09:40:51 -04:00
|
|
|
|
|
|
|
/* Local variable definition
|
|
|
|
***************************************************************************
|
|
|
|
*/
|
|
|
|
/* OSI funcs */
|
|
|
|
static const struct osi_funcs_t osi_funcs_ro = {
|
2020-07-09 08:58:13 -04:00
|
|
|
._magic = OSI_MAGIC_VALUE,
|
2018-06-15 09:40:51 -04:00
|
|
|
._version = OSI_VERSION,
|
|
|
|
._set_isr = xt_set_interrupt_handler,
|
|
|
|
._ints_on = xt_ints_on,
|
|
|
|
._interrupt_disable = interrupt_disable,
|
|
|
|
._interrupt_restore = interrupt_restore,
|
|
|
|
._task_yield = vPortYield,
|
|
|
|
._task_yield_from_isr = task_yield_from_isr,
|
|
|
|
._semphr_create = semphr_create_wrapper,
|
|
|
|
._semphr_delete = semphr_delete_wrapper,
|
|
|
|
._semphr_take_from_isr = semphr_take_from_isr_wrapper,
|
|
|
|
._semphr_give_from_isr = semphr_give_from_isr_wrapper,
|
|
|
|
._semphr_take = semphr_take_wrapper,
|
|
|
|
._semphr_give = semphr_give_wrapper,
|
|
|
|
._mutex_create = mutex_create_wrapper,
|
|
|
|
._mutex_delete = mutex_delete_wrapper,
|
|
|
|
._mutex_lock = mutex_lock_wrapper,
|
|
|
|
._mutex_unlock = mutex_unlock_wrapper,
|
|
|
|
._queue_create = queue_create_wrapper,
|
|
|
|
._queue_delete = queue_delete_wrapper,
|
|
|
|
._queue_send = queue_send_wrapper,
|
|
|
|
._queue_send_from_isr = queue_send_from_isr_wrapper,
|
|
|
|
._queue_recv = queue_recv_wrapper,
|
|
|
|
._queue_recv_from_isr = queue_recv_from_isr_wrapper,
|
|
|
|
._task_create = task_create_wrapper,
|
|
|
|
._task_delete = task_delete_wrapper,
|
|
|
|
._is_in_isr = is_in_isr_wrapper,
|
|
|
|
._cause_sw_intr_to_core = cause_sw_intr_to_core_wrapper,
|
|
|
|
._malloc = malloc,
|
|
|
|
._malloc_internal = malloc_internal_wrapper,
|
|
|
|
._free = free,
|
|
|
|
._read_efuse_mac = read_mac_wrapper,
|
|
|
|
._srand = srand_wrapper,
|
|
|
|
._rand = rand_wrapper,
|
2020-07-09 08:58:13 -04:00
|
|
|
._btdm_lpcycles_2_hus = btdm_lpcycles_2_hus,
|
|
|
|
._btdm_hus_2_lpcycles = btdm_hus_2_lpcycles,
|
2018-06-15 09:40:51 -04:00
|
|
|
._btdm_sleep_check_duration = btdm_sleep_check_duration,
|
2018-12-11 03:49:01 -05:00
|
|
|
._btdm_sleep_enter_phase1 = btdm_sleep_enter_phase1_wrapper,
|
|
|
|
._btdm_sleep_enter_phase2 = btdm_sleep_enter_phase2_wrapper,
|
2020-07-09 08:58:13 -04:00
|
|
|
._btdm_sleep_exit_phase1 = btdm_sleep_exit_phase1_wrapper,
|
2018-12-11 03:49:01 -05:00
|
|
|
._btdm_sleep_exit_phase2 = NULL,
|
|
|
|
._btdm_sleep_exit_phase3 = btdm_sleep_exit_phase3_wrapper,
|
2021-01-25 04:12:36 -05:00
|
|
|
._coex_wifi_sleep_set = coex_wifi_sleep_set_hook,
|
|
|
|
._coex_core_ble_conn_dyn_prio_get = NULL,
|
|
|
|
._coex_schm_status_bit_set = coex_schm_status_bit_set_wrapper,
|
|
|
|
._coex_schm_status_bit_clear = coex_schm_status_bit_clear_wrapper,
|
2016-10-18 09:49:00 -04:00
|
|
|
};
|
|
|
|
|
2018-12-13 22:29:00 -05:00
|
|
|
static DRAM_ATTR struct osi_funcs_t *osi_funcs_p;
|
2018-06-15 09:40:51 -04:00
|
|
|
|
|
|
|
#if CONFIG_SPIRAM_USE_MALLOC
|
2018-12-13 22:29:00 -05:00
|
|
|
static DRAM_ATTR btdm_queue_item_t btdm_queue_table[BTDM_MAX_QUEUE_NUM];
|
|
|
|
static DRAM_ATTR SemaphoreHandle_t btdm_queue_table_mux = NULL;
|
2018-06-15 09:40:51 -04:00
|
|
|
#endif /* #if CONFIG_SPIRAM_USE_MALLOC */
|
2018-04-08 07:19:47 -04:00
|
|
|
|
2017-02-17 06:24:58 -05:00
|
|
|
/* Static variable declare */
|
2018-12-11 03:49:01 -05:00
|
|
|
// timestamp when PHY/RF was switched on
|
2020-07-09 08:58:13 -04:00
|
|
|
// static DRAM_ATTR int64_t s_time_phy_rf_just_enabled = 0;
|
2018-12-13 22:29:00 -05:00
|
|
|
static DRAM_ATTR esp_bt_controller_status_t btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
|
2017-02-17 06:24:58 -05:00
|
|
|
|
2018-12-13 22:29:00 -05:00
|
|
|
static DRAM_ATTR portMUX_TYPE global_int_mux = portMUX_INITIALIZER_UNLOCKED;
|
2016-10-18 09:49:00 -04:00
|
|
|
|
2018-04-08 07:19:47 -04:00
|
|
|
// measured average low power clock period in micro seconds
|
2018-12-13 22:29:00 -05:00
|
|
|
static DRAM_ATTR uint32_t btdm_lpcycle_us = 0;
|
|
|
|
static DRAM_ATTR uint8_t btdm_lpcycle_us_frac = 0; // number of fractional bit for btdm_lpcycle_us
|
2018-04-08 07:19:47 -04:00
|
|
|
|
2017-10-09 03:34:31 -04:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
2018-12-13 22:29:00 -05:00
|
|
|
static DRAM_ATTR esp_timer_handle_t s_btdm_slp_tmr;
|
|
|
|
static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock;
|
2020-07-09 08:58:13 -04:00
|
|
|
static DRAM_ATTR esp_pm_lock_handle_t s_light_sleep_pm_lock; // pm_lock to prevent light sleep due to incompatibility currently
|
|
|
|
static DRAM_ATTR QueueHandle_t s_pm_lock_sem = NULL;
|
2018-12-11 03:49:01 -05:00
|
|
|
static void btdm_slp_tmr_callback(void *arg);
|
2020-07-09 08:58:13 -04:00
|
|
|
#endif
|
2018-12-11 03:49:01 -05:00
|
|
|
static inline void btdm_check_and_init_bb(void)
|
|
|
|
{
|
2020-07-09 08:58:13 -04:00
|
|
|
// todo:
|
|
|
|
// btdm_rf_bb_init_phase2();
|
2018-12-11 03:49:01 -05:00
|
|
|
}
|
|
|
|
|
2018-03-29 23:39:42 -04:00
|
|
|
#if CONFIG_SPIRAM_USE_MALLOC
|
2018-10-29 04:54:32 -04:00
|
|
|
static bool btdm_queue_generic_register(const btdm_queue_item_t *queue)
|
2018-03-29 23:39:42 -04:00
|
|
|
{
|
|
|
|
if (!btdm_queue_table_mux || !queue) {
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool ret = false;
|
|
|
|
btdm_queue_item_t *item;
|
|
|
|
xSemaphoreTake(btdm_queue_table_mux, portMAX_DELAY);
|
|
|
|
for (int i = 0; i < BTDM_MAX_QUEUE_NUM; ++i) {
|
|
|
|
item = &btdm_queue_table[i];
|
|
|
|
if (item->handle == NULL) {
|
|
|
|
memcpy(item, queue, sizeof(btdm_queue_item_t));
|
|
|
|
ret = true;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
xSemaphoreGive(btdm_queue_table_mux);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2018-10-29 04:54:32 -04:00
|
|
|
static bool btdm_queue_generic_deregister(btdm_queue_item_t *queue)
|
2018-03-29 23:39:42 -04:00
|
|
|
{
|
|
|
|
if (!btdm_queue_table_mux || !queue) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool ret = false;
|
|
|
|
btdm_queue_item_t *item;
|
|
|
|
xSemaphoreTake(btdm_queue_table_mux, portMAX_DELAY);
|
|
|
|
for (int i = 0; i < BTDM_MAX_QUEUE_NUM; ++i) {
|
|
|
|
item = &btdm_queue_table[i];
|
|
|
|
if (item->handle == queue->handle) {
|
|
|
|
memcpy(queue, item, sizeof(btdm_queue_item_t));
|
|
|
|
memset(item, 0, sizeof(btdm_queue_item_t));
|
|
|
|
ret = true;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
xSemaphoreGive(btdm_queue_table_mux);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif /* CONFIG_SPIRAM_USE_MALLOC */
|
|
|
|
|
2016-10-18 09:49:00 -04:00
|
|
|
static void IRAM_ATTR interrupt_disable(void)
|
|
|
|
{
|
2018-07-01 09:35:00 -04:00
|
|
|
if (xPortInIsrContext()) {
|
|
|
|
portENTER_CRITICAL_ISR(&global_int_mux);
|
|
|
|
} else {
|
|
|
|
portENTER_CRITICAL(&global_int_mux);
|
|
|
|
}
|
2016-10-18 09:49:00 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
static void IRAM_ATTR interrupt_restore(void)
|
|
|
|
{
|
2018-07-01 09:35:00 -04:00
|
|
|
if (xPortInIsrContext()) {
|
|
|
|
portEXIT_CRITICAL_ISR(&global_int_mux);
|
|
|
|
} else {
|
|
|
|
portEXIT_CRITICAL(&global_int_mux);
|
|
|
|
}
|
2016-10-18 09:49:00 -04:00
|
|
|
}
|
|
|
|
|
2017-06-07 02:58:17 -04:00
|
|
|
static void IRAM_ATTR task_yield_from_isr(void)
|
|
|
|
{
|
|
|
|
portYIELD_FROM_ISR();
|
|
|
|
}
|
|
|
|
|
2018-10-29 04:54:32 -04:00
|
|
|
static void *semphr_create_wrapper(uint32_t max, uint32_t init)
|
2016-10-18 09:49:00 -04:00
|
|
|
{
|
2018-03-29 23:39:42 -04:00
|
|
|
#if !CONFIG_SPIRAM_USE_MALLOC
|
2016-10-18 09:49:00 -04:00
|
|
|
return (void *)xSemaphoreCreateCounting(max, init);
|
2018-03-29 23:39:42 -04:00
|
|
|
#else
|
|
|
|
StaticQueue_t *queue_buffer = NULL;
|
|
|
|
QueueHandle_t handle = NULL;
|
|
|
|
|
|
|
|
queue_buffer = heap_caps_malloc(sizeof(StaticQueue_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
|
|
|
|
if (!queue_buffer) {
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
|
|
|
handle = xSemaphoreCreateCountingStatic(max, init, queue_buffer);
|
|
|
|
if (!handle) {
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
|
|
|
btdm_queue_item_t item = {
|
|
|
|
.handle = handle,
|
|
|
|
.storage = NULL,
|
|
|
|
.buffer = queue_buffer,
|
|
|
|
};
|
|
|
|
|
|
|
|
if (!btdm_queue_generic_register(&item)) {
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
return handle;
|
|
|
|
|
|
|
|
error:
|
|
|
|
if (handle) {
|
|
|
|
vSemaphoreDelete(handle);
|
|
|
|
}
|
|
|
|
if (queue_buffer) {
|
|
|
|
free(queue_buffer);
|
|
|
|
}
|
|
|
|
|
|
|
|
return NULL;
|
|
|
|
#endif
|
2016-10-18 09:49:00 -04:00
|
|
|
}
|
|
|
|
|
2018-10-29 04:54:32 -04:00
|
|
|
static void semphr_delete_wrapper(void *semphr)
|
2017-07-11 09:46:17 -04:00
|
|
|
{
|
2018-03-29 23:39:42 -04:00
|
|
|
#if !CONFIG_SPIRAM_USE_MALLOC
|
2017-07-11 09:46:17 -04:00
|
|
|
vSemaphoreDelete(semphr);
|
2018-03-29 23:39:42 -04:00
|
|
|
#else
|
|
|
|
btdm_queue_item_t item = {
|
|
|
|
.handle = semphr,
|
|
|
|
.storage = NULL,
|
|
|
|
.buffer = NULL,
|
|
|
|
};
|
|
|
|
|
|
|
|
if (btdm_queue_generic_deregister(&item)) {
|
|
|
|
vSemaphoreDelete(item.handle);
|
|
|
|
free(item.buffer);
|
|
|
|
}
|
|
|
|
|
|
|
|
return;
|
|
|
|
#endif
|
2017-07-11 09:46:17 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
static int32_t IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw)
|
|
|
|
{
|
|
|
|
return (int32_t)xSemaphoreTakeFromISR(semphr, hptw);
|
|
|
|
}
|
|
|
|
|
2016-10-18 09:49:00 -04:00
|
|
|
static int32_t IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw)
|
|
|
|
{
|
|
|
|
return (int32_t)xSemaphoreGiveFromISR(semphr, hptw);
|
|
|
|
}
|
|
|
|
|
2018-10-29 04:54:32 -04:00
|
|
|
static int32_t semphr_take_wrapper(void *semphr, uint32_t block_time_ms)
|
2016-10-18 09:49:00 -04:00
|
|
|
{
|
2017-07-11 09:46:17 -04:00
|
|
|
if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
|
|
|
|
return (int32_t)xSemaphoreTake(semphr, portMAX_DELAY);
|
|
|
|
} else {
|
|
|
|
return (int32_t)xSemaphoreTake(semphr, block_time_ms / portTICK_PERIOD_MS);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-10-29 04:54:32 -04:00
|
|
|
static int32_t semphr_give_wrapper(void *semphr)
|
2017-07-11 09:46:17 -04:00
|
|
|
{
|
|
|
|
return (int32_t)xSemaphoreGive(semphr);
|
2016-10-18 09:49:00 -04:00
|
|
|
}
|
|
|
|
|
2018-10-29 04:54:32 -04:00
|
|
|
static void *mutex_create_wrapper(void)
|
2016-10-18 09:49:00 -04:00
|
|
|
{
|
2018-03-29 23:39:42 -04:00
|
|
|
#if CONFIG_SPIRAM_USE_MALLOC
|
|
|
|
StaticQueue_t *queue_buffer = NULL;
|
|
|
|
QueueHandle_t handle = NULL;
|
|
|
|
|
|
|
|
queue_buffer = heap_caps_malloc(sizeof(StaticQueue_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
|
|
|
|
if (!queue_buffer) {
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
|
|
|
handle = xSemaphoreCreateMutexStatic(queue_buffer);
|
|
|
|
if (!handle) {
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
|
|
|
btdm_queue_item_t item = {
|
|
|
|
.handle = handle,
|
|
|
|
.storage = NULL,
|
|
|
|
.buffer = queue_buffer,
|
|
|
|
};
|
|
|
|
|
|
|
|
if (!btdm_queue_generic_register(&item)) {
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
return handle;
|
|
|
|
|
|
|
|
error:
|
|
|
|
if (handle) {
|
|
|
|
vSemaphoreDelete(handle);
|
|
|
|
}
|
|
|
|
if (queue_buffer) {
|
|
|
|
free(queue_buffer);
|
|
|
|
}
|
|
|
|
|
|
|
|
return NULL;
|
|
|
|
#else
|
2016-10-18 09:49:00 -04:00
|
|
|
return (void *)xSemaphoreCreateMutex();
|
2018-03-29 23:39:42 -04:00
|
|
|
#endif
|
2016-10-18 09:49:00 -04:00
|
|
|
}
|
|
|
|
|
2018-10-29 04:54:32 -04:00
|
|
|
static void mutex_delete_wrapper(void *mutex)
|
2017-07-11 09:46:17 -04:00
|
|
|
{
|
2018-03-29 23:39:42 -04:00
|
|
|
#if !CONFIG_SPIRAM_USE_MALLOC
|
2017-07-11 09:46:17 -04:00
|
|
|
vSemaphoreDelete(mutex);
|
2018-03-29 23:39:42 -04:00
|
|
|
#else
|
|
|
|
btdm_queue_item_t item = {
|
|
|
|
.handle = mutex,
|
|
|
|
.storage = NULL,
|
|
|
|
.buffer = NULL,
|
|
|
|
};
|
|
|
|
|
|
|
|
if (btdm_queue_generic_deregister(&item)) {
|
|
|
|
vSemaphoreDelete(item.handle);
|
|
|
|
free(item.buffer);
|
|
|
|
}
|
|
|
|
|
|
|
|
return;
|
|
|
|
#endif
|
2017-07-11 09:46:17 -04:00
|
|
|
}
|
|
|
|
|
2018-10-29 04:54:32 -04:00
|
|
|
static int32_t mutex_lock_wrapper(void *mutex)
|
2016-10-18 09:49:00 -04:00
|
|
|
{
|
|
|
|
return (int32_t)xSemaphoreTake(mutex, portMAX_DELAY);
|
|
|
|
}
|
|
|
|
|
2018-10-29 04:54:32 -04:00
|
|
|
static int32_t mutex_unlock_wrapper(void *mutex)
|
2016-10-18 09:49:00 -04:00
|
|
|
{
|
|
|
|
return (int32_t)xSemaphoreGive(mutex);
|
|
|
|
}
|
|
|
|
|
2018-10-29 04:54:32 -04:00
|
|
|
static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size)
|
2017-07-11 09:46:17 -04:00
|
|
|
{
|
2018-03-29 23:39:42 -04:00
|
|
|
#if CONFIG_SPIRAM_USE_MALLOC
|
|
|
|
StaticQueue_t *queue_buffer = NULL;
|
|
|
|
uint8_t *queue_storage = NULL;
|
|
|
|
QueueHandle_t handle = NULL;
|
|
|
|
|
|
|
|
queue_buffer = heap_caps_malloc(sizeof(StaticQueue_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
|
|
|
|
if (!queue_buffer) {
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
|
|
|
queue_storage = heap_caps_malloc((queue_len*item_size), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
|
|
|
|
if (!queue_storage ) {
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
|
|
|
handle = xQueueCreateStatic(queue_len, item_size, queue_storage, queue_buffer);
|
|
|
|
if (!handle) {
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
|
|
|
btdm_queue_item_t item = {
|
|
|
|
.handle = handle,
|
|
|
|
.storage = queue_storage,
|
|
|
|
.buffer = queue_buffer,
|
|
|
|
};
|
|
|
|
|
|
|
|
if (!btdm_queue_generic_register(&item)) {
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
|
|
|
return handle;
|
|
|
|
|
|
|
|
error:
|
|
|
|
if (handle) {
|
|
|
|
vQueueDelete(handle);
|
|
|
|
}
|
|
|
|
if (queue_storage) {
|
|
|
|
free(queue_storage);
|
|
|
|
}
|
|
|
|
if (queue_buffer) {
|
|
|
|
free(queue_buffer);
|
|
|
|
}
|
|
|
|
|
|
|
|
return NULL;
|
|
|
|
#else
|
2017-07-11 09:46:17 -04:00
|
|
|
return (void *)xQueueCreate(queue_len, item_size);
|
2018-03-29 23:39:42 -04:00
|
|
|
#endif
|
2017-07-11 09:46:17 -04:00
|
|
|
}
|
|
|
|
|
2018-10-29 04:54:32 -04:00
|
|
|
static void queue_delete_wrapper(void *queue)
|
2017-07-11 09:46:17 -04:00
|
|
|
{
|
2018-03-29 23:39:42 -04:00
|
|
|
#if !CONFIG_SPIRAM_USE_MALLOC
|
2017-07-11 09:46:17 -04:00
|
|
|
vQueueDelete(queue);
|
2018-03-29 23:39:42 -04:00
|
|
|
#else
|
|
|
|
btdm_queue_item_t item = {
|
|
|
|
.handle = queue,
|
|
|
|
.storage = NULL,
|
|
|
|
.buffer = NULL,
|
|
|
|
};
|
|
|
|
|
|
|
|
if (btdm_queue_generic_deregister(&item)) {
|
|
|
|
vQueueDelete(item.handle);
|
|
|
|
free(item.storage);
|
|
|
|
free(item.buffer);
|
|
|
|
}
|
|
|
|
|
|
|
|
return;
|
|
|
|
#endif
|
2017-07-11 09:46:17 -04:00
|
|
|
}
|
|
|
|
|
2018-10-29 04:54:32 -04:00
|
|
|
static int32_t queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms)
|
2017-07-11 09:46:17 -04:00
|
|
|
{
|
|
|
|
if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
|
|
|
|
return (int32_t)xQueueSend(queue, item, portMAX_DELAY);
|
|
|
|
} else {
|
|
|
|
return (int32_t)xQueueSend(queue, item, block_time_ms / portTICK_PERIOD_MS);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int32_t IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw)
|
|
|
|
{
|
|
|
|
return (int32_t)xQueueSendFromISR(queue, item, hptw);
|
|
|
|
}
|
|
|
|
|
2018-10-29 04:54:32 -04:00
|
|
|
static int32_t queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms)
|
2017-07-11 09:46:17 -04:00
|
|
|
{
|
|
|
|
if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
|
|
|
|
return (int32_t)xQueueReceive(queue, item, portMAX_DELAY);
|
|
|
|
} else {
|
|
|
|
return (int32_t)xQueueReceive(queue, item, block_time_ms / portTICK_PERIOD_MS);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int32_t IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw)
|
|
|
|
{
|
|
|
|
return (int32_t)xQueueReceiveFromISR(queue, item, hptw);
|
|
|
|
}
|
|
|
|
|
2018-10-29 04:54:32 -04:00
|
|
|
static int32_t task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
|
2017-07-11 09:46:17 -04:00
|
|
|
{
|
|
|
|
return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
|
|
|
|
}
|
|
|
|
|
2018-10-29 04:54:32 -04:00
|
|
|
static void task_delete_wrapper(void *task_handle)
|
2017-07-11 09:46:17 -04:00
|
|
|
{
|
|
|
|
vTaskDelete(task_handle);
|
|
|
|
}
|
|
|
|
|
2017-07-25 07:58:39 -04:00
|
|
|
static bool IRAM_ATTR is_in_isr_wrapper(void)
|
|
|
|
{
|
2020-07-09 08:58:13 -04:00
|
|
|
return (bool)xPortInIsrContext();
|
2017-07-25 07:58:39 -04:00
|
|
|
}
|
|
|
|
|
2017-10-20 05:09:03 -04:00
|
|
|
static void IRAM_ATTR cause_sw_intr(void *arg)
|
|
|
|
{
|
|
|
|
/* just convert void * to int, because the width is the same */
|
|
|
|
uint32_t intr_no = (uint32_t)arg;
|
|
|
|
XTHAL_SET_INTSET((1<<intr_no));
|
|
|
|
}
|
|
|
|
|
|
|
|
static int IRAM_ATTR cause_sw_intr_to_core_wrapper(int core_id, int intr_no)
|
|
|
|
{
|
|
|
|
esp_err_t err = ESP_OK;
|
|
|
|
|
|
|
|
if (xPortGetCoreID() == core_id) {
|
|
|
|
cause_sw_intr((void *)intr_no);
|
|
|
|
} else {
|
|
|
|
err = esp_ipc_call(core_id, cause_sw_intr, (void *)intr_no);
|
|
|
|
}
|
2020-07-09 08:58:13 -04:00
|
|
|
|
2017-10-20 05:09:03 -04:00
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2018-10-29 04:54:32 -04:00
|
|
|
static void *malloc_internal_wrapper(size_t size)
|
2018-06-15 09:40:51 -04:00
|
|
|
{
|
2020-07-09 08:58:13 -04:00
|
|
|
return heap_caps_malloc(size, MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL|MALLOC_CAP_DMA);
|
2018-06-15 09:40:51 -04:00
|
|
|
}
|
|
|
|
|
2017-03-01 08:04:12 -05:00
|
|
|
static int32_t IRAM_ATTR read_mac_wrapper(uint8_t mac[6])
|
|
|
|
{
|
2020-07-09 08:58:13 -04:00
|
|
|
esp_read_mac(mac, ESP_MAC_BT);
|
|
|
|
ESP_LOGI(BTDM_LOG_TAG, "Bluetooth MAC: 0x%02x:%02x:%02x:%02x:%02x:%02x\n",
|
|
|
|
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
|
|
|
|
return ESP_OK;
|
2017-03-01 08:04:12 -05:00
|
|
|
}
|
|
|
|
|
2017-03-24 02:57:07 -04:00
|
|
|
static void IRAM_ATTR srand_wrapper(unsigned int seed)
|
|
|
|
{
|
|
|
|
/* empty function */
|
|
|
|
}
|
|
|
|
|
|
|
|
static int IRAM_ATTR rand_wrapper(void)
|
|
|
|
{
|
|
|
|
return (int)esp_random();
|
|
|
|
}
|
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
static uint32_t IRAM_ATTR btdm_lpcycles_2_hus(uint32_t cycles, uint32_t *error_corr)
|
2018-04-08 07:19:47 -04:00
|
|
|
{
|
2020-07-09 08:58:13 -04:00
|
|
|
uint64_t local_error_corr = (error_corr == NULL) ? 0 : (uint64_t)(*error_corr);
|
|
|
|
uint64_t res = (uint64_t)btdm_lpcycle_us * cycles * 2;
|
|
|
|
local_error_corr += res;
|
|
|
|
res = (local_error_corr >> btdm_lpcycle_us_frac);
|
|
|
|
local_error_corr -= (res << btdm_lpcycle_us_frac);
|
|
|
|
if (error_corr) {
|
|
|
|
*error_corr = (uint32_t) local_error_corr;
|
|
|
|
}
|
|
|
|
return (uint32_t)res;
|
2018-04-08 07:19:47 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
2020-07-09 08:58:13 -04:00
|
|
|
* @brief Converts a duration in half us into a number of low power clock cycles.
|
2018-04-08 07:19:47 -04:00
|
|
|
*/
|
2020-07-09 08:58:13 -04:00
|
|
|
static uint32_t IRAM_ATTR btdm_hus_2_lpcycles(uint32_t hus)
|
2018-04-08 07:19:47 -04:00
|
|
|
{
|
2018-06-27 05:23:23 -04:00
|
|
|
// The number of sleep duration(us) should not lead to overflow. Thrs: 100s
|
2018-04-08 07:19:47 -04:00
|
|
|
// Compute the sleep duration in us to low power clock cycles, with calibration result applied
|
|
|
|
// clock measurement is conducted
|
2020-07-09 08:58:13 -04:00
|
|
|
uint64_t cycles = ((uint64_t)(hus) << btdm_lpcycle_us_frac) / btdm_lpcycle_us;
|
|
|
|
cycles >>= 1;
|
2018-04-08 07:19:47 -04:00
|
|
|
|
|
|
|
return (uint32_t)cycles;
|
|
|
|
}
|
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
static bool IRAM_ATTR btdm_sleep_check_duration(int32_t *half_slot_cnt)
|
2018-04-08 07:19:47 -04:00
|
|
|
{
|
2020-07-09 08:58:13 -04:00
|
|
|
if (*half_slot_cnt < BTDM_MIN_SLEEP_DURATION) {
|
2018-04-08 07:19:47 -04:00
|
|
|
return false;
|
|
|
|
}
|
2018-12-11 03:49:01 -05:00
|
|
|
/* wake up in advance considering the delay in enabling PHY/RF */
|
2020-07-09 08:58:13 -04:00
|
|
|
*half_slot_cnt -= BTDM_MODEM_WAKE_UP_DELAY;
|
2018-04-08 07:19:47 -04:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2018-12-11 03:49:01 -05:00
|
|
|
static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles)
|
|
|
|
{
|
|
|
|
#ifdef CONFIG_PM_ENABLE
|
|
|
|
// start a timer to wake up and acquire the pm_lock before modem_sleep awakes
|
|
|
|
uint32_t us_to_sleep = btdm_lpcycles_2_us(lpcycles);
|
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
#define BTDM_MIN_TIMER_UNCERTAINTY_US (1800)
|
2018-12-11 03:49:01 -05:00
|
|
|
assert(us_to_sleep > BTDM_MIN_TIMER_UNCERTAINTY_US);
|
|
|
|
// allow a maximum time uncertainty to be about 488ppm(1/2048) at least as clock drift
|
|
|
|
// and set the timer in advance
|
|
|
|
uint32_t uncertainty = (us_to_sleep >> 11);
|
|
|
|
if (uncertainty < BTDM_MIN_TIMER_UNCERTAINTY_US) {
|
|
|
|
uncertainty = BTDM_MIN_TIMER_UNCERTAINTY_US;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (esp_timer_start_once(s_btdm_slp_tmr, us_to_sleep - uncertainty) != ESP_OK) {
|
|
|
|
ESP_LOGW(BTDM_LOG_TAG, "timer start failed");
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
static void btdm_sleep_enter_phase2_wrapper(void)
|
2018-04-08 07:19:47 -04:00
|
|
|
{
|
2020-07-09 08:58:13 -04:00
|
|
|
if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
|
|
|
|
#if BTDM_MODEM_SLEEP_IN_EFFECT
|
|
|
|
//esp_phy_disable();
|
|
|
|
#endif /* BTDM_MODEM_SLEEP_IN_EFFECT */
|
|
|
|
|
2018-12-11 03:49:01 -05:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
2020-07-09 08:58:13 -04:00
|
|
|
esp_pm_lock_release(s_pm_lock);
|
|
|
|
semphr_give_wrapper(s_pm_lock_sem);
|
2018-12-11 03:49:01 -05:00
|
|
|
#endif
|
2018-04-08 07:19:47 -04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
static void IRAM_ATTR btdm_sleep_exit_phase1_wrapper(void)
|
2018-12-11 03:49:01 -05:00
|
|
|
{
|
|
|
|
#ifdef CONFIG_PM_ENABLE
|
2020-07-09 08:58:13 -04:00
|
|
|
if (semphr_take_from_isr_wrapper(s_pm_lock_sem, NULL) == pdTRUE) {
|
2018-12-11 03:49:01 -05:00
|
|
|
esp_pm_lock_acquire(s_pm_lock);
|
|
|
|
}
|
|
|
|
#endif
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
2018-12-11 03:49:01 -05:00
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
static void btdm_sleep_exit_phase3_wrapper(void)
|
|
|
|
{
|
|
|
|
if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
|
|
|
|
#if BTDM_MODEM_SLEEP_IN_EFFECT
|
|
|
|
//esp_phy_enable();
|
|
|
|
#endif /* BTDM_MODEM_SLEEP_IN_EFFECT */
|
2018-12-11 03:49:01 -05:00
|
|
|
btdm_check_and_init_bb();
|
|
|
|
#ifdef CONFIG_PM_ENABLE
|
|
|
|
esp_timer_stop(s_btdm_slp_tmr);
|
|
|
|
#endif
|
2018-04-08 07:19:47 -04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-12-11 03:49:01 -05:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
2020-09-03 08:51:19 -04:00
|
|
|
static void IRAM_ATTR btdm_slp_tmr_callback(void *arg)
|
|
|
|
{
|
2020-07-09 08:58:13 -04:00
|
|
|
if (semphr_take_wrapper(s_pm_lock_sem, 0) == pdTRUE) {
|
2020-09-03 08:51:19 -04:00
|
|
|
esp_pm_lock_acquire(s_pm_lock);
|
|
|
|
}
|
2020-08-26 05:51:13 -04:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2021-01-25 04:12:36 -05:00
|
|
|
static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
|
|
|
|
{
|
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
|
|
|
coex_schm_status_bit_set(type, status);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
|
|
|
|
{
|
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
|
|
|
coex_schm_status_bit_clear(type, status);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2020-03-20 05:58:05 -04:00
|
|
|
bool esp_vhci_host_check_send_available(void)
|
|
|
|
{
|
|
|
|
return API_vhci_host_check_send_available();
|
|
|
|
}
|
|
|
|
|
|
|
|
void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
|
|
|
|
{
|
2020-07-09 08:58:13 -04:00
|
|
|
bool do_wakeup_request = false;
|
2020-03-20 05:58:05 -04:00
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
if (!btdm_power_state_active()) {
|
|
|
|
#if CONFIG_PM_ENABLE
|
|
|
|
if (semphr_take_wrapper(s_pm_lock_sem, 0)) {
|
|
|
|
esp_pm_lock_acquire(s_pm_lock);
|
|
|
|
}
|
|
|
|
esp_timer_stop(s_btdm_slp_tmr);
|
|
|
|
#endif
|
|
|
|
do_wakeup_request = true;
|
|
|
|
btdm_wakeup_request(true);
|
|
|
|
}
|
2017-01-03 02:53:06 -05:00
|
|
|
API_vhci_host_send_packet(data, len);
|
2020-07-09 08:58:13 -04:00
|
|
|
if (do_wakeup_request) {
|
|
|
|
btdm_wakeup_request_end();
|
|
|
|
}
|
2017-01-03 02:53:06 -05:00
|
|
|
}
|
|
|
|
|
2018-06-15 09:40:51 -04:00
|
|
|
esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
|
2017-01-03 02:53:06 -05:00
|
|
|
{
|
2018-06-15 09:40:51 -04:00
|
|
|
return API_vhci_host_register_callback((const vhci_host_callback_t *)callback) == 0 ? ESP_OK : ESP_FAIL;
|
2017-01-03 02:53:06 -05:00
|
|
|
}
|
|
|
|
|
2017-09-19 08:10:35 -04:00
|
|
|
static void btdm_controller_mem_init(void)
|
2017-09-12 10:36:17 -04:00
|
|
|
{
|
2020-07-09 08:58:13 -04:00
|
|
|
memset(&_bss_start_btdm, 0, &_bss_end_btdm - &_bss_start_btdm);
|
2017-09-19 08:10:35 -04:00
|
|
|
memcpy(&_data_start_btdm, (void *)_data_start_btdm_rom, &_data_end_btdm - &_data_start_btdm);
|
2020-07-09 08:58:13 -04:00
|
|
|
// memset(&_bt_tmp_bss_start, 0, &_bt_tmp_bss_end - &_bt_tmp_bss_start);
|
2018-08-28 04:01:07 -04:00
|
|
|
}
|
|
|
|
|
2017-09-19 08:10:35 -04:00
|
|
|
esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode)
|
|
|
|
{
|
2020-07-09 08:58:13 -04:00
|
|
|
ESP_LOGW(BTDM_LOG_TAG, "%s not implemented, return OK", __func__);
|
2018-07-11 02:22:32 -04:00
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t esp_bt_mem_release(esp_bt_mode_t mode)
|
|
|
|
{
|
2020-07-09 08:58:13 -04:00
|
|
|
ESP_LOGW(BTDM_LOG_TAG, "%s not implemented, return OK", __func__);
|
2017-09-19 08:10:35 -04:00
|
|
|
return ESP_OK;
|
2017-09-12 10:36:17 -04:00
|
|
|
}
|
|
|
|
|
2017-04-05 09:19:15 -04:00
|
|
|
esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
|
2016-10-18 09:49:00 -04:00
|
|
|
{
|
2018-12-11 03:49:01 -05:00
|
|
|
esp_err_t err;
|
2017-04-05 09:19:15 -04:00
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
btdm_controller_mem_init();
|
2020-11-10 02:40:01 -05:00
|
|
|
|
2018-06-15 09:40:51 -04:00
|
|
|
osi_funcs_p = (struct osi_funcs_t *)malloc_internal_wrapper(sizeof(struct osi_funcs_t));
|
|
|
|
if (osi_funcs_p == NULL) {
|
|
|
|
return ESP_ERR_NO_MEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
memcpy(osi_funcs_p, &osi_funcs_ro, sizeof(struct osi_funcs_t));
|
|
|
|
if (btdm_osi_funcs_register(osi_funcs_p) != 0) {
|
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
|
|
|
|
2017-02-20 12:05:37 -05:00
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
|
2017-04-05 09:19:15 -04:00
|
|
|
return ESP_ERR_INVALID_STATE;
|
2017-02-20 12:05:37 -05:00
|
|
|
}
|
|
|
|
|
2017-04-05 09:19:15 -04:00
|
|
|
if (cfg == NULL) {
|
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
|
|
|
|
2017-07-11 09:46:17 -04:00
|
|
|
if (cfg->controller_task_prio != ESP_TASK_BT_CONTROLLER_PRIO
|
2020-07-09 08:58:13 -04:00
|
|
|
|| cfg->controller_task_stack_size < ESP_TASK_BT_CONTROLLER_STACK) {
|
|
|
|
ESP_LOGE(BTDM_LOG_TAG, "Invalid controller task prioriy or stack size");
|
2017-07-11 09:46:17 -04:00
|
|
|
return ESP_ERR_INVALID_ARG;
|
2017-06-13 05:14:50 -04:00
|
|
|
}
|
|
|
|
|
2018-06-15 09:40:51 -04:00
|
|
|
//overwrite some parameters
|
2020-07-09 08:58:13 -04:00
|
|
|
cfg->magic = ESP_BT_CTRL_CONFIG_MAGIC_VAL;
|
2018-06-15 09:40:51 -04:00
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
if (cfg->bluetooth_mode != ESP_BT_MODE_BLE) {
|
|
|
|
ESP_LOGE(BTDM_LOG_TAG, "%s controller only support BLE only mode", __func__);
|
|
|
|
return ESP_ERR_NOT_SUPPORTED;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (cfg->bluetooth_mode & ESP_BT_MODE_BLE) {
|
|
|
|
if ((cfg->ble_max_act <= 0) || (cfg->ble_max_act > BT_CTRL_BLE_MAX_ACT_LIMIT)) {
|
|
|
|
ESP_LOGE(BTDM_LOG_TAG, "Invalid value of ble_max_act");
|
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
2018-06-15 09:40:51 -04:00
|
|
|
}
|
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
if (cfg->sleep_mode == ESP_BT_SLEEP_MODE_1) {
|
|
|
|
if (cfg->sleep_clock == ESP_BT_SLEEP_CLOCK_NONE) {
|
|
|
|
ESP_LOGE(BTDM_LOG_TAG, "SLEEP_MODE_1 enabled but sleep clock not configured");
|
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-08-28 04:01:07 -04:00
|
|
|
ESP_LOGI(BTDM_LOG_TAG, "BT controller compile version [%s]", btdm_controller_get_compile_version());
|
2018-03-27 04:35:00 -04:00
|
|
|
|
2018-03-29 23:39:42 -04:00
|
|
|
#if CONFIG_SPIRAM_USE_MALLOC
|
|
|
|
btdm_queue_table_mux = xSemaphoreCreateMutex();
|
2018-12-11 03:49:01 -05:00
|
|
|
if (btdm_queue_table_mux == NULL) {
|
2018-03-29 23:39:42 -04:00
|
|
|
return ESP_ERR_NO_MEM;
|
|
|
|
}
|
|
|
|
memset(btdm_queue_table, 0, sizeof(btdm_queue_item_t) * BTDM_MAX_QUEUE_NUM);
|
|
|
|
#endif
|
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
if (cfg->sleep_mode == ESP_BT_SLEEP_MODE_1) {
|
2020-02-20 01:34:28 -05:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
|
|
|
if ((err = esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, "btLS", &s_light_sleep_pm_lock)) != ESP_OK) {
|
|
|
|
goto error;
|
|
|
|
}
|
2020-07-09 08:58:13 -04:00
|
|
|
if ((err = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "bt", &s_pm_lock)) != ESP_OK) {
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
esp_timer_create_args_t create_args = {
|
|
|
|
.callback = btdm_slp_tmr_callback,
|
|
|
|
.arg = NULL,
|
|
|
|
.name = "btSlp"
|
|
|
|
};
|
|
|
|
if ((err = esp_timer_create(&create_args, &s_btdm_slp_tmr)) != ESP_OK) {
|
|
|
|
goto error;
|
|
|
|
}
|
2018-12-11 03:49:01 -05:00
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
s_pm_lock_sem = semphr_create_wrapper(1, 0);
|
|
|
|
if (s_pm_lock_sem == NULL) {
|
|
|
|
err = ESP_ERR_NO_MEM;
|
|
|
|
goto error;
|
|
|
|
}
|
2018-12-11 03:49:01 -05:00
|
|
|
#endif
|
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
do {// todo: rewrite this block of code for chip
|
|
|
|
#if CONFIG_IDF_ENV_FPGA
|
|
|
|
// overwrite the sleep clock for FPGA
|
|
|
|
cfg->sleep_clock = ESP_BT_SLEEP_CLOCK_FPGA_32K;
|
|
|
|
ESP_LOGW(BTDM_LOG_TAG, "%s sleep clock overwrite on FPGA", __func__);
|
|
|
|
#endif
|
|
|
|
bool select_src_ret = false;
|
|
|
|
bool set_div_ret = false;
|
|
|
|
if (cfg->sleep_clock == ESP_BT_SLEEP_CLOCK_MAIN_XTAL) {
|
|
|
|
select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL);
|
|
|
|
set_div_ret = btdm_lpclk_set_div(rtc_clk_xtal_freq_get() * 2);
|
|
|
|
assert(select_src_ret && set_div_ret);
|
|
|
|
btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
|
|
|
|
btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
|
|
|
|
} else if (cfg->sleep_clock == ESP_BT_SLEEP_CLOCK_EXT_32K_XTAL) {
|
|
|
|
select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL32K);
|
|
|
|
set_div_ret = btdm_lpclk_set_div(0);
|
|
|
|
assert(select_src_ret && set_div_ret);
|
|
|
|
btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
|
|
|
|
btdm_lpcycle_us = esp_clk_slowclk_cal_get();
|
|
|
|
assert(btdm_lpcycle_us != 0);
|
|
|
|
} else if (cfg->sleep_clock == ESP_BT_SLEEP_CLOCK_FPGA_32K) {
|
|
|
|
// on FPGA, the low power clock is hard-wired to a 32kHz(clock cycle 31.25us) oscillator
|
|
|
|
btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
|
|
|
|
btdm_lpcycle_us = 125 << (btdm_lpcycle_us_frac - 2);
|
|
|
|
}
|
|
|
|
} while (0);
|
|
|
|
}
|
2020-08-26 05:51:13 -04:00
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
periph_module_enable(PERIPH_BT_MODULE);
|
|
|
|
// must do fpga_init and phy init before controller init
|
|
|
|
esp_phy_enable();
|
2017-04-05 09:19:15 -04:00
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
if (btdm_controller_init(cfg) != 0) {
|
2018-12-11 03:49:01 -05:00
|
|
|
err = ESP_ERR_NO_MEM;
|
|
|
|
goto error;
|
2017-04-05 09:19:15 -04:00
|
|
|
}
|
|
|
|
|
2017-07-11 09:46:17 -04:00
|
|
|
btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
|
2018-12-11 03:49:01 -05:00
|
|
|
|
2017-04-05 09:19:15 -04:00
|
|
|
return ESP_OK;
|
2018-12-11 03:49:01 -05:00
|
|
|
|
|
|
|
error:
|
|
|
|
#ifdef CONFIG_PM_ENABLE
|
2020-07-09 08:58:13 -04:00
|
|
|
if (s_light_sleep_pm_lock != NULL) {
|
|
|
|
esp_pm_lock_delete(s_light_sleep_pm_lock);
|
|
|
|
s_light_sleep_pm_lock = NULL;
|
2018-12-17 06:54:57 -05:00
|
|
|
}
|
2018-12-11 03:49:01 -05:00
|
|
|
if (s_pm_lock != NULL) {
|
|
|
|
esp_pm_lock_delete(s_pm_lock);
|
|
|
|
s_pm_lock = NULL;
|
|
|
|
}
|
|
|
|
if (s_btdm_slp_tmr != NULL) {
|
|
|
|
esp_timer_delete(s_btdm_slp_tmr);
|
|
|
|
s_btdm_slp_tmr = NULL;
|
|
|
|
}
|
2020-07-09 08:58:13 -04:00
|
|
|
if (s_pm_lock_sem) {
|
|
|
|
semphr_delete_wrapper(s_pm_lock_sem);
|
|
|
|
s_pm_lock_sem = NULL;
|
2020-09-03 08:51:19 -04:00
|
|
|
}
|
2020-07-09 08:58:13 -04:00
|
|
|
#endif
|
2018-12-11 03:49:01 -05:00
|
|
|
return err;
|
2017-02-17 06:24:58 -05:00
|
|
|
}
|
|
|
|
|
2017-07-11 09:46:17 -04:00
|
|
|
esp_err_t esp_bt_controller_deinit(void)
|
2017-02-17 06:24:58 -05:00
|
|
|
{
|
2017-07-11 09:46:17 -04:00
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
|
|
|
|
return ESP_ERR_INVALID_STATE;
|
|
|
|
}
|
|
|
|
|
2018-07-17 03:46:56 -04:00
|
|
|
btdm_controller_deinit();
|
2017-07-11 09:46:17 -04:00
|
|
|
|
2017-11-01 05:05:38 -04:00
|
|
|
periph_module_disable(PERIPH_BT_MODULE);
|
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
esp_phy_disable();
|
2018-12-11 03:49:01 -05:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
2020-07-09 08:58:13 -04:00
|
|
|
esp_pm_lock_delete(s_light_sleep_pm_lock);
|
|
|
|
s_light_sleep_pm_lock = NULL;
|
|
|
|
esp_pm_lock_delete(s_pm_lock);
|
|
|
|
s_pm_lock = NULL;
|
2018-12-11 03:49:01 -05:00
|
|
|
esp_timer_stop(s_btdm_slp_tmr);
|
|
|
|
esp_timer_delete(s_btdm_slp_tmr);
|
|
|
|
s_btdm_slp_tmr = NULL;
|
2020-07-09 08:58:13 -04:00
|
|
|
semphr_delete_wrapper(s_pm_lock_sem);
|
|
|
|
s_pm_lock_sem = NULL;
|
2018-12-11 03:49:01 -05:00
|
|
|
#endif
|
2018-03-29 23:39:42 -04:00
|
|
|
#if CONFIG_SPIRAM_USE_MALLOC
|
|
|
|
vSemaphoreDelete(btdm_queue_table_mux);
|
|
|
|
btdm_queue_table_mux = NULL;
|
|
|
|
memset(btdm_queue_table, 0, sizeof(btdm_queue_item_t) * BTDM_MAX_QUEUE_NUM);
|
|
|
|
#endif
|
|
|
|
|
2018-06-15 09:40:51 -04:00
|
|
|
free(osi_funcs_p);
|
|
|
|
osi_funcs_p = NULL;
|
|
|
|
|
2017-10-10 03:35:17 -04:00
|
|
|
btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
|
2018-04-08 07:19:47 -04:00
|
|
|
btdm_lpcycle_us = 0;
|
2017-07-11 09:46:17 -04:00
|
|
|
return ESP_OK;
|
2017-02-17 06:24:58 -05:00
|
|
|
}
|
|
|
|
|
2020-12-21 07:08:10 -05:00
|
|
|
|
2017-02-17 06:24:58 -05:00
|
|
|
esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
2017-02-20 12:05:37 -05:00
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
|
|
|
|
return ESP_ERR_INVALID_STATE;
|
|
|
|
}
|
2017-09-19 08:10:35 -04:00
|
|
|
|
2018-06-15 09:40:51 -04:00
|
|
|
//As the history reason, mode should be equal to the mode which set in esp_bt_controller_init()
|
|
|
|
if (mode != btdm_controller_get_mode()) {
|
2020-07-09 08:58:13 -04:00
|
|
|
ESP_LOGE(BTDM_LOG_TAG, "invalid mode %d, controller support mode is %d", mode, btdm_controller_get_mode());
|
2017-02-17 06:24:58 -05:00
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
2017-10-09 03:34:31 -04:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
2020-07-09 08:58:13 -04:00
|
|
|
esp_pm_lock_acquire(s_light_sleep_pm_lock);
|
2017-10-09 03:34:31 -04:00
|
|
|
esp_pm_lock_acquire(s_pm_lock);
|
|
|
|
#endif
|
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
// esp_phy_enable();
|
2020-05-22 05:15:28 -04:00
|
|
|
|
2021-01-25 04:12:36 -05:00
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
2020-08-26 05:51:13 -04:00
|
|
|
coex_enable();
|
2020-05-22 05:15:28 -04:00
|
|
|
#endif
|
2017-11-09 21:54:50 -05:00
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
|
2018-04-08 07:19:47 -04:00
|
|
|
btdm_controller_enable_sleep(true);
|
|
|
|
}
|
2018-12-11 03:49:01 -05:00
|
|
|
// inititalize bluetooth baseband
|
|
|
|
btdm_check_and_init_bb();
|
2017-02-17 06:24:58 -05:00
|
|
|
|
|
|
|
ret = btdm_controller_enable(mode);
|
2020-07-09 08:58:13 -04:00
|
|
|
if (ret) {
|
|
|
|
// esp_phy_disable();
|
2018-07-17 03:46:56 -04:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
2020-07-09 08:58:13 -04:00
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esp_pm_lock_release(s_light_sleep_pm_lock);
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2018-07-17 03:46:56 -04:00
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esp_pm_lock_release(s_pm_lock);
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#endif
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2017-02-17 06:24:58 -05:00
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return ESP_ERR_INVALID_STATE;
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}
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2017-02-20 12:05:37 -05:00
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btdm_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;
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2017-02-17 06:24:58 -05:00
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return ESP_OK;
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}
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2017-09-19 08:10:35 -04:00
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esp_err_t esp_bt_controller_disable(void)
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2017-02-17 06:24:58 -05:00
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{
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2017-02-20 12:05:37 -05:00
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if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
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return ESP_ERR_INVALID_STATE;
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}
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2018-04-08 07:19:47 -04:00
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// disable modem sleep and wake up from sleep mode
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2020-07-09 08:58:13 -04:00
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if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
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2018-04-08 07:19:47 -04:00
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btdm_controller_enable_sleep(false);
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2020-07-09 08:58:13 -04:00
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if (!btdm_power_state_active()) {
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btdm_wakeup_request(true);
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}
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2018-04-08 07:19:47 -04:00
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while (!btdm_power_state_active()) {
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2020-07-21 01:07:34 -04:00
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esp_rom_delay_us(1000);
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2018-04-08 07:19:47 -04:00
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}
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}
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2018-07-17 03:46:56 -04:00
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btdm_controller_disable();
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2017-02-17 06:24:58 -05:00
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|
2021-01-25 04:12:36 -05:00
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#if CONFIG_SW_COEXIST_ENABLE
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2020-08-26 05:51:13 -04:00
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coex_disable();
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2020-05-22 05:15:28 -04:00
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#endif
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2020-07-09 08:58:13 -04:00
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// esp_phy_disable();
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2018-07-17 03:46:56 -04:00
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btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
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2017-10-09 03:34:31 -04:00
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|
#ifdef CONFIG_PM_ENABLE
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2020-07-09 08:58:13 -04:00
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esp_pm_lock_release(s_light_sleep_pm_lock);
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2017-10-09 03:34:31 -04:00
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esp_pm_lock_release(s_pm_lock);
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#endif
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2017-02-17 06:24:58 -05:00
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return ESP_OK;
|
2016-10-18 09:49:00 -04:00
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}
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|
2020-07-09 08:58:13 -04:00
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|
2017-02-20 12:05:37 -05:00
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esp_bt_controller_status_t esp_bt_controller_get_status(void)
|
|
|
|
{
|
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|
|
return btdm_controller_status;
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}
|
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|
2017-07-11 09:46:17 -04:00
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|
/* extra functions */
|
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|
esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
|
|
|
|
{
|
2020-07-09 08:58:13 -04:00
|
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|
ESP_LOGW(BTDM_LOG_TAG, "%s not implemented, return OK", __func__);
|
2017-07-11 09:46:17 -04:00
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
|
|
|
|
{
|
2020-07-09 08:58:13 -04:00
|
|
|
ESP_LOGW(BTDM_LOG_TAG, "%s not implemented, return 0", __func__);
|
|
|
|
return 0;
|
2018-04-19 05:22:49 -04:00
|
|
|
}
|
|
|
|
|
2018-04-08 07:19:47 -04:00
|
|
|
esp_err_t esp_bt_sleep_enable (void)
|
|
|
|
{
|
|
|
|
esp_err_t status;
|
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
|
|
|
|
return ESP_ERR_INVALID_STATE;
|
|
|
|
}
|
2020-07-09 08:58:13 -04:00
|
|
|
if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
|
2018-04-08 07:19:47 -04:00
|
|
|
btdm_controller_enable_sleep (true);
|
|
|
|
status = ESP_OK;
|
|
|
|
} else {
|
|
|
|
status = ESP_ERR_NOT_SUPPORTED;
|
|
|
|
}
|
|
|
|
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t esp_bt_sleep_disable (void)
|
|
|
|
{
|
|
|
|
esp_err_t status;
|
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
|
|
|
|
return ESP_ERR_INVALID_STATE;
|
|
|
|
}
|
2020-07-09 08:58:13 -04:00
|
|
|
if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
|
2018-04-08 07:19:47 -04:00
|
|
|
btdm_controller_enable_sleep (false);
|
|
|
|
status = ESP_OK;
|
|
|
|
} else {
|
|
|
|
status = ESP_ERR_NOT_SUPPORTED;
|
|
|
|
}
|
|
|
|
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
bool esp_bt_controller_is_sleeping(void)
|
2018-05-20 23:33:30 -04:00
|
|
|
{
|
2020-07-09 08:58:13 -04:00
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED ||
|
|
|
|
btdm_controller_get_sleep_mode() != ESP_BT_SLEEP_MODE_1) {
|
|
|
|
return false;
|
2018-05-20 23:33:30 -04:00
|
|
|
}
|
2020-07-09 08:58:13 -04:00
|
|
|
|
|
|
|
return !btdm_power_state_active();
|
2018-05-20 23:33:30 -04:00
|
|
|
}
|
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
void esp_bt_controller_wakeup_request(void)
|
2018-08-20 03:04:37 -04:00
|
|
|
{
|
2020-07-09 08:58:13 -04:00
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED ||
|
|
|
|
btdm_controller_get_sleep_mode() != ESP_BT_SLEEP_MODE_1) {
|
|
|
|
return;
|
2018-08-20 03:04:37 -04:00
|
|
|
}
|
2020-07-09 08:58:13 -04:00
|
|
|
|
|
|
|
btdm_wakeup_request(false);
|
|
|
|
}
|
|
|
|
|
|
|
|
int IRAM_ATTR esp_bt_h4tl_eif_io_event_notify(int event)
|
|
|
|
{
|
|
|
|
return btdm_hci_tl_io_event_post(event);
|
|
|
|
}
|
|
|
|
|
|
|
|
uint16_t esp_bt_get_tx_buf_num(void)
|
|
|
|
{
|
|
|
|
return l2c_ble_link_get_tx_buf_num();
|
|
|
|
}
|
|
|
|
|
2021-01-25 04:12:36 -05:00
|
|
|
static void coex_wifi_sleep_set_hook(bool sleep)
|
2020-07-09 08:58:13 -04:00
|
|
|
{
|
|
|
|
|
2018-08-20 03:04:37 -04:00
|
|
|
}
|
2017-09-12 10:36:17 -04:00
|
|
|
#endif /* CONFIG_BT_ENABLED */
|