2021-08-05 10:30:10 -04:00
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/*
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* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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2019-05-09 23:34:06 -04:00
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#ifndef __ESP_SPIRAM_H
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#define __ESP_SPIRAM_H
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#include <stddef.h>
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#include <stdint.h>
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2019-06-05 22:57:29 -04:00
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#include <stdbool.h>
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2019-05-09 23:34:06 -04:00
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#include "esp_err.h"
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2020-01-26 22:43:08 -05:00
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#ifdef __cplusplus
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extern "C" {
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#endif
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2019-05-09 23:34:06 -04:00
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/**
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* @brief Initialize spiram interface/hardware. Normally called from cpu_start.c.
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*
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* @return ESP_OK on success
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*/
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2019-08-11 22:06:07 -04:00
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esp_err_t esp_spiram_init(void);
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/**
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* @brief Configure Cache/MMU for access to external SPI RAM.
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*
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* Normally this function is called from cpu_start, if CONFIG_SPIRAM_BOOT_INIT
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* option is enabled. Applications which need to enable SPI RAM at run time
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* can disable CONFIG_SPIRAM_BOOT_INIT, and call this function later.
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*
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* @attention this function must be called with flash cache disabled.
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*/
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2019-08-11 22:06:07 -04:00
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void esp_spiram_init_cache(void);
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/**
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* @brief Memory test for SPI RAM. Should be called after SPI RAM is initialized and
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* (in case of a dual-core system) the app CPU is online. This test overwrites the
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2019-05-09 23:34:06 -04:00
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* memory with crap, so do not call after e.g. the heap allocator has stored important
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* stuff in SPI RAM.
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*
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* @return true on success, false on failed memory test
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*/
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bool esp_spiram_test(void);
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/**
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* @brief Add the initialized SPI RAM to the heap allocator.
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*/
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esp_err_t esp_spiram_add_to_heapalloc(void);
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/**
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* @brief Get the size of the attached SPI RAM chip selected in menuconfig
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*
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* @return Size in bytes, or 0 if no external RAM chip support compiled in.
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*/
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size_t esp_spiram_get_size(void);
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/**
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* @brief Force a writeback of the data in the SPI RAM cache. This is to be called whenever
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* cache is disabled, because disabling cache on the ESP32 discards the data in the SPI
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* RAM cache.
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*
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* This is meant for use from within the SPI flash code.
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*/
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void esp_spiram_writeback_cache(void);
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2021-07-02 09:46:49 -04:00
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/**
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* @brief get psram CS IO
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*
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* This interface should be called after PSRAM is enabled, otherwise it will
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* return an invalid value -1/0xff.
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*
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* @return psram CS IO or -1/0xff if psram not enabled
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*/
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uint8_t esp_spiram_get_cs_io(void);
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/**
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* @brief Reserve a pool of internal memory for specific DMA/internal allocations
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*
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* @param size Size of reserved pool in bytes
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*
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* @return
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* - ESP_OK on success
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* - ESP_ERR_NO_MEM when no memory available for pool
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*/
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esp_err_t esp_spiram_reserve_dma_pool(size_t size);
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2021-07-29 00:45:29 -04:00
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/**
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* @brief If SPI RAM(PSRAM) has been initialized
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*
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* @return
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* - true SPI RAM has been initialized successfully
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* - false SPI RAM hasn't been initialized or initialized failed
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*/
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bool esp_spiram_is_initialized(void);
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2020-04-20 07:35:16 -04:00
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#if CONFIG_SPIRAM_FETCH_INSTRUCTIONS
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extern int _instruction_reserved_start, _instruction_reserved_end;
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/**
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* @brief Get the start page number of the instruction in SPI flash
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*
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* @return start page number
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*/
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uint32_t instruction_flash_start_page_get(void);
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/**
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* @brief Get the end page number of the instruction in SPI flash
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*
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* @return end page number
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*/
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uint32_t instruction_flash_end_page_get(void);
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/**
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* @brief Get the offset of instruction from SPI flash to SPI RAM
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*
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* @return instruction offset
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*/
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int instruction_flash2spiram_offset(void);
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#endif
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#if CONFIG_SPIRAM_RODATA
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extern int _rodata_reserved_start, _rodata_reserved_end;
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/**
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* @brief Get the start page number of the rodata in SPI flash
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*
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* @return start page number
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*/
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uint32_t rodata_flash_start_page_get(void);
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/**
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* @brief Get the end page number of the rodata in SPI flash
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*
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* @return end page number
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*/
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uint32_t rodata_flash_end_page_get(void);
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/**
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* @brief Get the offset number of rodata from SPI flash to SPI RAM
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*
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* @return rodata offset
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*/
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int rodata_flash2spiram_offset(void);
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#endif
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2020-01-26 22:43:08 -05:00
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#ifdef __cplusplus
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}
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#endif
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2019-05-09 23:34:06 -04:00
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#endif
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