2020-07-14 08:36:05 -04:00
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menu "ESP32S3-Specific"
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visible if IDF_TARGET_ESP32S3
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menu "Cache config"
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choice ESP32S3_INSTRUCTION_CACHE_SIZE
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prompt "Instruction cache size"
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default ESP32S3_INSTRUCTION_CACHE_16KB
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help
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Instruction cache size to be set on application startup.
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If you use 16KB instruction cache rather than 32KB instruction cache,
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then the other 16KB will be managed by heap allocator.
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config ESP32S3_INSTRUCTION_CACHE_16KB
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bool "16KB"
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config ESP32S3_INSTRUCTION_CACHE_32KB
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bool "32KB"
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endchoice
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config ESP32S3_INSTRUCTION_CACHE_SIZE
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hex
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default 0x4000 if ESP32S3_INSTRUCTION_CACHE_16KB
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default 0x8000 if ESP32S3_INSTRUCTION_CACHE_32KB
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choice ESP32S3_ICACHE_ASSOCIATED_WAYS
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prompt "Instruction cache associated ways"
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default ESP32S3_INSTRUCTION_CACHE_8WAYS
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help
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Instruction cache associated ways to be set on application startup.
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config ESP32S3_INSTRUCTION_CACHE_4WAYS
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bool "4 ways"
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config ESP32S3_INSTRUCTION_CACHE_8WAYS
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bool "8 ways"
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endchoice
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config ESP32S3_ICACHE_ASSOCIATED_WAYS
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int
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default 4 if ESP32S3_INSTRUCTION_CACHE_4WAYS
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default 8 if ESP32S3_INSTRUCTION_CACHE_8WAYS
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choice ESP32S3_INSTRUCTION_CACHE_LINE_SIZE
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prompt "Instruction cache line size"
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default ESP32S3_INSTRUCTION_CACHE_LINE_32B
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help
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Instruction cache line size to be set on application startup.
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config ESP32S3_INSTRUCTION_CACHE_LINE_16B
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bool "16 Bytes"
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depends on ESP32S3_INSTRUCTION_CACHE_16KB
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config ESP32S3_INSTRUCTION_CACHE_LINE_32B
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bool "32 Bytes"
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endchoice
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config ESP32S3_INSTRUCTION_CACHE_LINE_SIZE
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int
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default 16 if ESP32S3_INSTRUCTION_CACHE_LINE_16B
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default 32 if ESP32S3_INSTRUCTION_CACHE_LINE_32B
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config ESP32S3_INSTRUCTION_CACHE_WRAP
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2021-11-08 02:47:30 -05:00
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bool ## TODO IDF-4307
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2020-07-14 08:36:05 -04:00
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default "n"
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2021-11-18 02:34:22 -05:00
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depends on !SPIRAM_ECC_ENABLE
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2020-07-14 08:36:05 -04:00
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help
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If enabled, instruction cache will use wrap mode to read spi flash or spi ram.
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The wrap length equals to ESP32S3_INSTRUCTION_CACHE_LINE_SIZE.
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However, it depends on complex conditions.
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choice ESP32S3_DATA_CACHE_SIZE
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prompt "Data cache size"
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default ESP32S3_DATA_CACHE_32KB
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help
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Data cache size to be set on application startup.
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If you use 32KB data cache rather than 64KB data cache,
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the other 32KB will be added to the heap.
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config ESP32S3_DATA_CACHE_16KB
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bool "16KB"
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config ESP32S3_DATA_CACHE_32KB
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bool "32KB"
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config ESP32S3_DATA_CACHE_64KB
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bool "64KB"
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endchoice
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config ESP32S3_DATA_CACHE_SIZE
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hex
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2020-10-10 04:22:49 -04:00
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# For 16KB the actual configuration is 32kb cache, but 16kb will be reserved for heap at startup
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default 0x8000 if ESP32S3_DATA_CACHE_16KB
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2020-07-14 08:36:05 -04:00
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default 0x8000 if ESP32S3_DATA_CACHE_32KB
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default 0x10000 if ESP32S3_DATA_CACHE_64KB
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choice ESP32S3_DCACHE_ASSOCIATED_WAYS
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prompt "Data cache associated ways"
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default ESP32S3_DATA_CACHE_8WAYS
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help
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Data cache associated ways to be set on application startup.
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config ESP32S3_DATA_CACHE_4WAYS
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bool "4 ways"
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config ESP32S3_DATA_CACHE_8WAYS
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bool "8 ways"
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endchoice
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config ESP32S3_DCACHE_ASSOCIATED_WAYS
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int
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default 4 if ESP32S3_DATA_CACHE_4WAYS
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default 8 if ESP32S3_DATA_CACHE_8WAYS
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choice ESP32S3_DATA_CACHE_LINE_SIZE
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prompt "Data cache line size"
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default ESP32S3_DATA_CACHE_LINE_32B
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help
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Data cache line size to be set on application startup.
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config ESP32S3_DATA_CACHE_LINE_16B
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bool "16 Bytes"
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depends on ESP32S3_DATA_CACHE_16KB || ESP32S3_DATA_CACHE_32KB
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config ESP32S3_DATA_CACHE_LINE_32B
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bool "32 Bytes"
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2020-10-10 04:22:49 -04:00
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config ESP32S3_DATA_CACHE_LINE_64B
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bool "64 Bytes"
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2020-07-14 08:36:05 -04:00
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endchoice
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config ESP32S3_DATA_CACHE_LINE_SIZE
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int
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default 16 if ESP32S3_DATA_CACHE_LINE_16B
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default 32 if ESP32S3_DATA_CACHE_LINE_32B
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2020-10-10 04:22:49 -04:00
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default 64 if ESP32S3_DATA_CACHE_LINE_64B
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2020-07-14 08:36:05 -04:00
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config ESP32S3_DATA_CACHE_WRAP
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2021-11-08 02:47:30 -05:00
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bool ## TODO IDF-4307
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2020-07-14 08:36:05 -04:00
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default "n"
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2021-11-18 02:34:22 -05:00
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depends on !SPIRAM_ECC_ENABLE
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2020-07-14 08:36:05 -04:00
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help
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If enabled, data cache will use wrap mode to read spi flash or spi ram.
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The wrap length equals to ESP32S3_DATA_CACHE_LINE_SIZE.
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However, it depends on complex conditions.
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endmenu # Cache config
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# Hint: to support SPIRAM across multiple chips, check CONFIG_SPIRAM instead
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config ESP32S3_SPIRAM_SUPPORT
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bool "Support for external, SPI-connected RAM"
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default "n"
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select SPIRAM
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help
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This enables support for an external SPI RAM chip, connected in parallel with the
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main SPI flash chip.
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menu "SPI RAM config"
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depends on ESP32S3_SPIRAM_SUPPORT
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2022-01-04 23:37:34 -05:00
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config SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
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bool
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default "y"
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2021-04-15 05:13:48 -04:00
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choice SPIRAM_MODE
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prompt "Mode (QUAD/OCT) of SPI RAM chip in use"
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default SPIRAM_MODE_QUAD
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config SPIRAM_MODE_QUAD
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bool "Quad Mode PSRAM"
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config SPIRAM_MODE_OCT
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bool "Octal Mode PSRAM"
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endchoice
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2020-07-14 08:36:05 -04:00
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choice SPIRAM_TYPE
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2021-04-15 05:13:48 -04:00
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prompt "Type of SPIRAM chip in use"
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2020-08-10 07:33:00 -04:00
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default SPIRAM_TYPE_AUTO
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config SPIRAM_TYPE_AUTO
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bool "Auto-detect"
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config SPIRAM_TYPE_ESPPSRAM16
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bool "ESP-PSRAM16 or APS1604"
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2021-04-15 05:13:48 -04:00
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depends on SPIRAM_MODE_QUAD
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2020-07-14 08:36:05 -04:00
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config SPIRAM_TYPE_ESPPSRAM32
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bool "ESP-PSRAM32 or IS25WP032"
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2021-04-15 05:13:48 -04:00
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depends on SPIRAM_MODE_QUAD
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2020-08-10 07:33:00 -04:00
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2020-07-14 08:36:05 -04:00
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config SPIRAM_TYPE_ESPPSRAM64
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2021-04-15 05:13:48 -04:00
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bool "ESP-PSRAM64 , LY68L6400 or APS6408"
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2020-07-14 08:36:05 -04:00
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endchoice
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config SPIRAM_SIZE
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int
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2020-08-10 07:33:00 -04:00
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default -1 if SPIRAM_TYPE_AUTO
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default 2097152 if SPIRAM_TYPE_ESPPSRAM16
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2020-07-14 08:36:05 -04:00
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default 4194304 if SPIRAM_TYPE_ESPPSRAM32
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default 8388608 if SPIRAM_TYPE_ESPPSRAM64
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2021-04-15 05:13:48 -04:00
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default 16777216 if SPIRAM_TYPE_ESPPSRAM128
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default 33554432 if SPIRAM_TYPE_ESPPSRAM256
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2020-07-14 08:36:05 -04:00
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default 0
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menu "PSRAM Clock and CS IO for ESP32S3"
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depends on ESP32S3_SPIRAM_SUPPORT
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config DEFAULT_PSRAM_CLK_IO
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int "PSRAM CLK IO number"
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range 0 33
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default 30
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help
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The PSRAM Clock IO can be any unused GPIO, please refer to your hardware design.
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config DEFAULT_PSRAM_CS_IO
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int "PSRAM CS IO number"
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range 0 33
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default 26
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help
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The PSRAM CS IO can be any unused GPIO, please refer to your hardware design.
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endmenu
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config SPIRAM_FETCH_INSTRUCTIONS
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bool "Cache fetch instructions from SPI RAM"
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default n
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help
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If enabled, instruction in flash will be copied into SPIRAM.
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If SPIRAM_RODATA also enabled, you can run the instruction when erasing or programming the flash.
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config SPIRAM_RODATA
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bool "Cache load read only data from SPI RAM"
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default n
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help
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If enabled, rodata in flash will be copied into SPIRAM.
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If SPIRAM_FETCH_INSTRUCTIONS is also enabled,
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you can run the instruction when erasing or programming the flash.
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choice SPIRAM_SPEED
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prompt "Set RAM clock speed"
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default SPIRAM_SPEED_40M
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help
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Select the speed for the SPI RAM chip.
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2021-08-12 23:30:54 -04:00
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config SPIRAM_SPEED_120M
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depends on SPIRAM_MODE_QUAD
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bool "120MHz clock speed"
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2020-07-14 08:36:05 -04:00
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config SPIRAM_SPEED_80M
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bool "80MHz clock speed"
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config SPIRAM_SPEED_40M
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bool "40Mhz clock speed"
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endchoice
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2021-11-18 02:34:22 -05:00
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config SPIRAM_SPEED
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int
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default 120 if SPIRAM_SPEED_120M
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default 80 if SPIRAM_SPEED_80M
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default 40 if SPIRAM_SPEED_40M
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source "$IDF_PATH/components/esp_hw_support/Kconfig.spiram.common" # insert non-chip-specific items here
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2020-07-14 08:36:05 -04:00
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endmenu
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config ESP32S3_MEMMAP_TRACEMEM
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bool
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default "n"
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config ESP32S3_MEMMAP_TRACEMEM_TWOBANKS
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bool
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default "n"
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config ESP32S3_TRAX
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bool "Use TRAX tracing feature"
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default "n"
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select ESP32S3_MEMMAP_TRACEMEM
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help
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The esp32-s3 contains a feature which allows you to trace the execution path the processor
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has taken through the program. This is stored in a chunk of 32K (16K for single-processor)
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of memory that can't be used for general purposes anymore. Disable this if you do not know
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what this is.
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config ESP32S3_TRAX_TWOBANKS
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bool "Reserve memory for tracing both pro as well as app cpu execution"
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default "n"
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depends on ESP32S3_TRAX && !FREERTOS_UNICORE
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select ESP32S3_MEMMAP_TRACEMEM_TWOBANKS
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help
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The esp32-s3 contains a feature which allows you to trace the execution path the processor
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has taken through the program. This is stored in a chunk of 32K (16K for single-processor)
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of memory that can't be used for general purposes anymore. Disable this if you do not know
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what this is.
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config ESP32S3_TRACEMEM_RESERVE_DRAM
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hex
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default 0x8000 if ESP32S3_MEMMAP_TRACEMEM && ESP32S3_MEMMAP_TRACEMEM_TWOBANKS
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default 0x4000 if ESP32S3_MEMMAP_TRACEMEM && !ESP32S3_MEMMAP_TRACEMEM_TWOBANKS
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default 0x0
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2021-04-01 07:55:15 -04:00
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config ESP32S3_DEEP_SLEEP_WAKEUP_DELAY
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int "Extra delay in deep sleep wake stub (in us)"
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default 2000
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range 0 5000
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help
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When ESP32S3 exits deep sleep, the CPU and the flash chip are powered on
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at the same time. CPU will run deep sleep stub first, and then
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proceed to load code from flash. Some flash chips need sufficient
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time to pass between power on and first read operation. By default,
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without any extra delay, this time is approximately 900us, although
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some flash chip types need more than that.
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By default extra delay is set to 2000us. When optimizing startup time
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for applications which require it, this value may be reduced.
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If you are seeing "flash read err, 1000" message printed to the
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console after deep sleep reset, try increasing this value.
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2020-07-14 08:36:05 -04:00
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config ESP32S3_RTCDATA_IN_FAST_MEM
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bool "Place RTC_DATA_ATTR and RTC_RODATA_ATTR variables into RTC fast memory segment"
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default n
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help
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This option allows to place .rtc_data and .rtc_rodata sections into
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RTC fast memory segment to free the slow memory region for ULP programs.
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config ESP32S3_USE_FIXED_STATIC_RAM_SIZE
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bool "Use fixed static RAM size"
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default n
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help
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If this option is disabled, the DRAM part of the heap starts right after the .bss section,
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within the dram0_0 region. As a result, adding or removing some static variables
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will change the available heap size.
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If this option is enabled, the DRAM part of the heap starts right after the dram0_0 region,
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where its length is set with ESP32S3_FIXED_STATIC_RAM_SIZE
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config ESP32S3_FIXED_STATIC_RAM_SIZE
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hex "Fixed Static RAM size"
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default 0x10000
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range 0 0x34000
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depends on ESP32S3_USE_FIXED_STATIC_RAM_SIZE
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help
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RAM size dedicated for static variables (.data & .bss sections).
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2020-11-10 02:40:01 -05:00
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endmenu # ESP32S3-Specific
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