esp-idf/components/spi_flash/linker.lf

[mapping:spi_flash]
archive: libspi_flash.a
entries:
    if IDF_TARGET_ESP32 = y:
        spi_flash_rom_patch (noflash)
    spi_flash_chip_generic (noflash)
    spi_flash_chip_issi (noflash)
    spi_flash_chip_mxic (noflash)
    spi_flash_chip_gd (noflash)
    spi_flash_chip_winbond (noflash)
    memspi_host_driver (noflash)
ldgen: update component linker fragment files 2019-03-19 02:19:39 -04:00			`[mapping:spi_flash]`
tools: implement linker script generation 2018-04-17 22:57:45 -04:00			`archive: libspi_flash.a`
spi_flash: New low-level flash API 2017-05-23 22:35:12 -04:00			`entries:`
ci: enabled ldgen mapping check in ci 2020-11-12 10:17:17 -05:00			`if IDF_TARGET_ESP32 = y:`
			`spi_flash_rom_patch (noflash)`
spi_flash: support working on differnt buses and frequency 2019-01-08 05:29:25 -05:00			`spi_flash_chip_generic (noflash)`
			`spi_flash_chip_issi (noflash)`
esp_flash: support MXIC flash chips The default chip driver (chip_generic) use command 01H + 2 bytes to clear the QE bit. However this will accidently change the configuration register value of the MXIC chip. MXIC chip driver is added to fix that. 2020-03-19 10:49:25 -04:00			`spi_flash_chip_mxic (noflash)`
esp_flash: support high capacity flash chips (32-bit address) 2020-07-26 15:13:07 -04:00			`spi_flash_chip_gd (noflash)`
			`spi_flash_chip_winbond (noflash)`
spi_flash: support working on differnt buses and frequency 2019-01-08 05:29:25 -05:00			`memspi_host_driver (noflash)`