2023-02-07 03:01:26 -05:00
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/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#include <stdbool.h>
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#include "sdkconfig.h"
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#include "esp_pm.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/ringbuf.h"
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#include "hal/adc_types.h"
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#include "hal/adc_hal.h"
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//For DMA
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#if SOC_GDMA_SUPPORTED
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#include "esp_private/gdma.h"
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#elif CONFIG_IDF_TARGET_ESP32S2
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#include "hal/spi_types.h"
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2023-10-18 05:25:20 -04:00
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#include "esp_private/spi_common_internal.h"
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2023-02-07 03:01:26 -05:00
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#elif CONFIG_IDF_TARGET_ESP32
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#include "driver/i2s_types.h"
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#endif
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#include "esp_adc/adc_filter.h"
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2023-03-20 06:17:44 -04:00
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#include "esp_adc/adc_monitor.h"
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2023-02-07 03:01:26 -05:00
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef enum {
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ADC_FSM_INIT,
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ADC_FSM_STARTED,
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} adc_fsm_t;
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2023-03-20 06:17:44 -04:00
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typedef enum {
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ADC_MONITOR_FSM_INIT,
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ADC_MONITOR_FSM_ENABLED,
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} adc_monitor_fsm_t;
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2023-02-07 03:01:26 -05:00
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/*---------------------------------------------------------------
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Driver Context
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---------------------------------------------------------------*/
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typedef struct adc_iir_filter_t adc_iir_filter_t;
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typedef struct adc_monitor_t adc_monitor_t;
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typedef struct adc_continuous_ctx_t adc_continuous_ctx_t;
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/**
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* @brief ADC iir filter context
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*/
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struct adc_iir_filter_t {
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adc_digi_iir_filter_t filter_id; // Filter ID
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adc_continuous_iir_filter_config_t cfg; //filter configuration
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adc_continuous_ctx_t *continuous_ctx; //ADC continuous driver context
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};
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2023-03-20 06:17:44 -04:00
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/**
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* @brief ADC digi monitor context
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*/
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struct adc_monitor_t {
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adc_monitor_id_t monitor_id; // monitor unit number
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adc_monitor_fsm_t fsm; // monitor status indicator
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adc_monitor_config_t config; // monitor configuration
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adc_monitor_evt_cbs_t cbs; // monitor thresh callbacks
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void *user_data; // user data pointer to use in cb
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};
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2023-02-07 03:01:26 -05:00
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/**
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* @brief ADC continuous driver context
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*/
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struct adc_continuous_ctx_t {
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uint8_t *rx_dma_buf; //dma buffer
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adc_hal_dma_ctx_t hal; //hal context
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#if SOC_GDMA_SUPPORTED
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gdma_channel_handle_t rx_dma_channel; //dma rx channel handle
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#elif CONFIG_IDF_TARGET_ESP32S2
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spi_host_device_t spi_host; //ADC uses this SPI DMA
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spi_dma_ctx_t *spi_dma_ctx; //spi_dma context
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#elif CONFIG_IDF_TARGET_ESP32
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i2s_port_t i2s_host; //ADC uses this I2S DMA
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#endif
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intr_handle_t dma_intr_hdl; //DMA Interrupt handler
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RingbufHandle_t ringbuf_hdl; //RX ringbuffer handler
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void* ringbuf_storage; //Ringbuffer storage buffer
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void* ringbuf_struct; //Ringbuffer structure buffer
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size_t ringbuf_size; //Ringbuffer size
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intptr_t rx_eof_desc_addr; //eof descriptor address of RX channel
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adc_fsm_t fsm; //ADC continuous mode driver internal states
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bool use_adc1; //1: ADC unit1 will be used; 0: ADC unit1 won't be used.
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bool use_adc2; //1: ADC unit2 will be used; 0: ADC unit2 won't be used. This determines whether to acquire sar_adc2_mutex lock or not.
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adc_atten_t adc1_atten; //Attenuation for ADC1. On this chip each ADC can only support one attenuation.
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adc_atten_t adc2_atten; //Attenuation for ADC2. On this chip each ADC can only support one attenuation.
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adc_hal_digi_ctrlr_cfg_t hal_digi_ctrlr_cfg; //Hal digital controller configuration
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adc_continuous_evt_cbs_t cbs; //Callbacks
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void *user_data; //User context
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esp_pm_lock_handle_t pm_lock; //For power management
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struct {
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uint32_t flush_pool: 1; //Flush the internal pool when the pool is full. With this flag, the `on_pool_ovf` event will not happen.
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} flags;
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#if SOC_ADC_DIG_IIR_FILTER_SUPPORTED
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adc_iir_filter_t *iir_filter[SOC_ADC_DIGI_IIR_FILTER_NUM]; //ADC IIR filter context
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#endif
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2023-03-20 06:17:44 -04:00
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#if SOC_ADC_MONITOR_SUPPORTED
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adc_monitor_t *adc_monitor[SOC_ADC_DIGI_MONITOR_NUM]; // adc monitor context
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#endif
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2023-02-07 03:01:26 -05:00
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};
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#ifdef __cplusplus
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}
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#endif
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