mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
adc: new feature adc digital monitor supported
This commit is contained in:
wanlei
parent
7a462d8a86
commit
87848110c1
@ -10,6 +10,9 @@ set(srcs "adc_cali.c"
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if(CONFIG_SOC_ADC_DMA_SUPPORTED)
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list(APPEND srcs "adc_continuous.c")
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if(CONFIG_SOC_ADC_MONITOR_SUPPORTED)
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list(APPEND srcs "adc_monitor.c")
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endif()
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endif()
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if(CONFIG_SOC_ADC_DIG_IIR_FILTER_SUPPORTED)
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@ -24,6 +24,7 @@
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#endif
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#include "esp_adc/adc_filter.h"
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#include "esp_adc/adc_monitor.h"
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#ifdef __cplusplus
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extern "C" {
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@ -34,21 +35,38 @@ typedef enum {
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ADC_FSM_STARTED,
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} adc_fsm_t;
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typedef enum {
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ADC_MONITOR_FSM_INIT,
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ADC_MONITOR_FSM_ENABLED,
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} adc_monitor_fsm_t;
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/*---------------------------------------------------------------
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Driver Context
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---------------------------------------------------------------*/
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typedef struct adc_iir_filter_t adc_iir_filter_t;
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typedef struct adc_monitor_t adc_monitor_t;
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typedef struct adc_continuous_ctx_t adc_continuous_ctx_t;
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/**
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* @brief ADC iir filter context
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*/
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struct adc_iir_filter_t {
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adc_digi_iir_filter_t filter_id; // Filter ID
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adc_digi_iir_filter_t filter_id; // Filter ID
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adc_continuous_iir_filter_config_t cfg; //filter configuration
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adc_continuous_ctx_t *continuous_ctx; //ADC continuous driver context
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};
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/**
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* @brief ADC digi monitor context
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*/
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struct adc_monitor_t {
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adc_monitor_id_t monitor_id; // monitor unit number
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adc_monitor_fsm_t fsm; // monitor status indicator
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adc_monitor_config_t config; // monitor configuration
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adc_monitor_evt_cbs_t cbs; // monitor thresh callbacks
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void *user_data; // user data pointer to use in cb
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};
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/**
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* @brief ADC continuous driver context
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*/
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@ -79,6 +97,9 @@ struct adc_continuous_ctx_t {
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#if SOC_ADC_DIG_IIR_FILTER_SUPPORTED
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adc_iir_filter_t *iir_filter[SOC_ADC_DIGI_IIR_FILTER_NUM]; //ADC IIR filter context
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#endif
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#if SOC_ADC_MONITOR_SUPPORTED
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adc_monitor_t *adc_monitor[SOC_ADC_DIGI_MONITOR_NUM]; // adc monitor context
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#endif
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};
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274
components/esp_adc/adc_monitor.c
Normal file
274
components/esp_adc/adc_monitor.c
Normal file
@ -0,0 +1,274 @@
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/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdatomic.h>
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#include "esp_check.h"
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#include "esp_memory_utils.h"
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#include "esp_intr_alloc.h"
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#include "esp_heap_caps.h"
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#include "freertos/FreeRTOS.h"
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#include "adc_continuous_internal.h"
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#include "soc/periph_defs.h"
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#include "esp_adc/adc_monitor.h"
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static const char *MNTOR_TAG = "adc_monitor";
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/**
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* @brief context for adc continuous driver
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*/
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typedef struct adc_monitor_platform_t {
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adc_continuous_ctx_t *continuous_ctx; // ADC continuous driver context
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intr_handle_t monitor_intr_handle; // monitor intr handler
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portMUX_TYPE monitor_spinlock; // spinlock
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} adc_monitor_platform_t;
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// Global context of adc monitor, other member will be lazy loaded
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static adc_monitor_platform_t s_adc_monitor_platform = {.monitor_spinlock = portMUX_INITIALIZER_UNLOCKED};
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#if CONFIG_IDF_TARGET_ESP32S2
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// Monitor unit index need equal to ADC unit index on ESP32S2
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static atomic_bool s_adc_monitor_claimed[SOC_ADC_DIGI_MONITOR_NUM] = {};
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static esp_err_t s_adc_monitor_claim(adc_continuous_handle_t handle, adc_monitor_t *monitor_ctx, adc_unit_t unit)
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{
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assert(handle && monitor_ctx);
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esp_err_t ret = ESP_ERR_NOT_FOUND;
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bool false_var = false;
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if (atomic_compare_exchange_strong(&s_adc_monitor_claimed[unit], &false_var, true)) {
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monitor_ctx->monitor_id = unit;
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handle->adc_monitor[unit] = monitor_ctx;
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ret = ESP_OK;
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} else {
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ESP_LOGE(MNTOR_TAG, "monitor %d already in use", (int)unit);
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}
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return ret;
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}
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static esp_err_t s_adc_monitor_release(adc_monitor_t *monitor_ctx)
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{
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assert(monitor_ctx);
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esp_err_t ret = ESP_ERR_NOT_FOUND;
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bool true_var = true;
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if (atomic_compare_exchange_strong(&s_adc_monitor_claimed[monitor_ctx->monitor_id], &true_var, false)) {
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s_adc_monitor_platform.continuous_ctx->adc_monitor[monitor_ctx->monitor_id] = NULL;
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ret = ESP_OK;
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}
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return ret;
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}
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#else
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static esp_err_t s_adc_monitor_claim(adc_continuous_handle_t handle, adc_monitor_t *monitor_ctx, adc_unit_t unit)
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{
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(void)unit;
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assert(handle && monitor_ctx);
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portENTER_CRITICAL(&s_adc_monitor_platform.monitor_spinlock);
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for (int i = 0; i < SOC_ADC_DIGI_MONITOR_NUM; i++) {
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if (!handle->adc_monitor[i]) {
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monitor_ctx->monitor_id = i;
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handle->adc_monitor[i] = monitor_ctx;
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portEXIT_CRITICAL(&s_adc_monitor_platform.monitor_spinlock);
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return ESP_OK;
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}
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}
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portEXIT_CRITICAL(&s_adc_monitor_platform.monitor_spinlock);
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ESP_LOGE(MNTOR_TAG, "no free monitor");
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return ESP_ERR_NOT_FOUND;
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}
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static esp_err_t s_adc_monitor_release(adc_monitor_t *monitor_ctx)
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{
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assert(monitor_ctx);
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portENTER_CRITICAL(&s_adc_monitor_platform.monitor_spinlock);
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s_adc_monitor_platform.continuous_ctx->adc_monitor[monitor_ctx->monitor_id] = NULL;
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portEXIT_CRITICAL(&s_adc_monitor_platform.monitor_spinlock);
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return ESP_OK;
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}
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#endif
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static void IRAM_ATTR s_adc_digi_monitor_isr(void *args)
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{
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bool need_yield = false;
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uint32_t intr_val = *((uint32_t *)adc_ll_digi_monitor_get_intr_status_addr());
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// clear all intr flags as have save intr status in `intr_val`
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adc_ll_digi_monitor_clear_intr();
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for (uint8_t i = 0; i < SOC_ADC_DIGI_MONITOR_NUM; i++) {
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adc_monitor_handle_t monitor_handle = s_adc_monitor_platform.continuous_ctx->adc_monitor[i];
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// check if high threshold alert
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if (intr_val & ADC_LL_GET_HIGH_THRES_MASK(i)) {
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assert(monitor_handle);
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assert(monitor_handle->monitor_id == i);
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if (monitor_handle->cbs.on_over_high_thresh) {
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adc_monitor_evt_data_t event_data = {};
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need_yield |= monitor_handle->cbs.on_over_high_thresh(monitor_handle, &event_data, monitor_handle->user_data);
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}
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}
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// check if low threshold alert
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if (intr_val & ADC_LL_GET_LOW_THRES_MASK(i)) {
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assert(monitor_handle);
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assert(monitor_handle->monitor_id == i);
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if (monitor_handle->cbs.on_below_low_thresh) {
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adc_monitor_evt_data_t event_data = {};
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need_yield |= monitor_handle->cbs.on_below_low_thresh(monitor_handle, &event_data, monitor_handle->user_data);
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}
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}
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}
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if (need_yield) {
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portYIELD_FROM_ISR();
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}
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}
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static esp_err_t adc_monitor_intr_alloc(void)
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{
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esp_err_t ret = ESP_OK;
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int intr_flags = ESP_INTR_FLAG_LOWMED;
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#if CONFIG_ADC_CONTINUOUS_ISR_IRAM_SAFE
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intr_flags |= ESP_INTR_FLAG_IRAM;
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#endif
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#if SOC_ADC_TEMPERATURE_SHARE_INTR
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intr_flags |= ESP_INTR_FLAG_SHARED;
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ret = esp_intr_alloc_intrstatus(ETS_APB_ADC_INTR_SOURCE, intr_flags,
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(uint32_t)adc_ll_digi_monitor_get_intr_status_addr(),
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ADC_LL_THRES_ALL_INTR_ST_M, s_adc_digi_monitor_isr, NULL, &s_adc_monitor_platform.monitor_intr_handle);
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#else
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ret = esp_intr_alloc(ETS_APB_ADC_INTR_SOURCE, intr_flags, s_adc_digi_monitor_isr, NULL, &s_adc_monitor_platform.monitor_intr_handle);
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#endif //SOC_ADC_TEMPERATURE_SHARE_INTR
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return ret;
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}
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//-------------------------------------------PUBLIC APIs--------------------------------------------//
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esp_err_t adc_new_continuous_monitor(adc_continuous_handle_t handle, const adc_monitor_config_t *monitor_cfg, adc_monitor_handle_t *ret_handle)
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{
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esp_err_t ret;
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ESP_RETURN_ON_FALSE(handle && monitor_cfg && ret_handle, ESP_ERR_INVALID_ARG, MNTOR_TAG, "invalid argument: null pointer");
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ESP_RETURN_ON_FALSE(monitor_cfg->adc_unit < SOC_ADC_PERIPH_NUM, ESP_ERR_INVALID_ARG, MNTOR_TAG, "invalid adc_unit");
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ESP_RETURN_ON_FALSE(handle->fsm == ADC_FSM_INIT, ESP_ERR_INVALID_STATE, MNTOR_TAG, "ADC continuous driver should be in init state");
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#if CONFIG_IDF_TARGET_ESP32S2
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ESP_RETURN_ON_FALSE(!((monitor_cfg->h_threshold >= 0) && (monitor_cfg->l_threshold >= 0)), ESP_ERR_NOT_SUPPORTED, MNTOR_TAG, "ESP32S2 support only one threshold");
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#endif
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// alloc handler memory
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adc_monitor_t *monitor_ctx = heap_caps_calloc(1, sizeof(adc_monitor_t), MALLOC_CAP_INTERNAL);
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ESP_RETURN_ON_FALSE(monitor_ctx, ESP_ERR_NO_MEM, MNTOR_TAG, "no mem");
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// alloc monitor hardware
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ESP_GOTO_ON_ERROR(s_adc_monitor_claim(handle, monitor_ctx, monitor_cfg->adc_unit), claim_err, MNTOR_TAG, "ADC monitor claim failed");
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memcpy(&monitor_ctx->config, monitor_cfg, sizeof(adc_monitor_config_t));
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s_adc_monitor_platform.continuous_ctx = handle;
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// alloc cpu intr
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portENTER_CRITICAL(&s_adc_monitor_platform.monitor_spinlock);
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bool alloc_intr = !s_adc_monitor_platform.monitor_intr_handle;
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portEXIT_CRITICAL(&s_adc_monitor_platform.monitor_spinlock);
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if (alloc_intr) {
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ESP_GOTO_ON_ERROR(adc_monitor_intr_alloc(), intr_err, MNTOR_TAG, "esp intr alloc failed");
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}
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// config hardware
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adc_ll_digi_monitor_clear_intr();
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adc_ll_digi_monitor_set_thres(monitor_ctx->monitor_id, monitor_ctx->config.adc_unit, monitor_ctx->config.channel, monitor_ctx->config.h_threshold, monitor_ctx->config.l_threshold);
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*ret_handle = monitor_ctx;
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return ESP_OK;
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intr_err:
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s_adc_monitor_release(monitor_ctx);
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claim_err:
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free(monitor_ctx);
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return ret;
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}
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esp_err_t adc_continuous_monitor_register_event_callbacks(adc_monitor_handle_t monitor_handle, const adc_monitor_evt_cbs_t *cbs, void *user_data)
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{
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ESP_RETURN_ON_FALSE(monitor_handle && cbs, ESP_ERR_INVALID_ARG, MNTOR_TAG, "invalid argument: null pointer");
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ESP_RETURN_ON_FALSE(monitor_handle->fsm == ADC_MONITOR_FSM_INIT, ESP_ERR_INVALID_STATE, MNTOR_TAG, "monitor should be in init state");
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ESP_RETURN_ON_FALSE(!(monitor_handle->cbs.on_over_high_thresh || monitor_handle->cbs.on_below_low_thresh), ESP_ERR_INVALID_STATE, MNTOR_TAG, "callbacks had beed registered");
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#if CONFIG_IDF_TARGET_ESP32S2
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ESP_RETURN_ON_FALSE(!(cbs->on_below_low_thresh && cbs->on_over_high_thresh), ESP_ERR_NOT_SUPPORTED, MNTOR_TAG, "ESP32S2 support only one threshold");
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#endif
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// If iram_safe enabled, check if user_data and cbs is iram_safe
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#if CONFIG_ADC_CONTINUOUS_ISR_IRAM_SAFE
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if (cbs->on_over_high_thresh) {
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ESP_RETURN_ON_FALSE(esp_ptr_in_iram(cbs->on_over_high_thresh), ESP_ERR_INVALID_ARG, MNTOR_TAG, "on_over_high_thresh func not in iram");
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}
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if (cbs->on_below_low_thresh) {
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ESP_RETURN_ON_FALSE(esp_ptr_in_iram(cbs->on_below_low_thresh), ESP_ERR_INVALID_ARG, MNTOR_TAG, "on_below_low_thresh func not in iram");
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}
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if (user_data) {
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ESP_RETURN_ON_FALSE(esp_ptr_in_dram(user_data) || esp_ptr_in_diram_dram(user_data), ESP_ERR_INVALID_ARG, MNTOR_TAG, "user_data not in iram");
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}
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#endif
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memcpy(&monitor_handle->cbs, cbs, sizeof(adc_monitor_evt_cbs_t));
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monitor_handle->user_data = user_data;
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return ESP_OK;
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}
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esp_err_t adc_continuous_monitor_enable(adc_monitor_handle_t monitor_handle)
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{
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ESP_RETURN_ON_FALSE(monitor_handle, ESP_ERR_INVALID_ARG, MNTOR_TAG, "invalid argument: null pointer");
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ESP_RETURN_ON_FALSE(monitor_handle->fsm == ADC_MONITOR_FSM_INIT, ESP_ERR_INVALID_STATE, MNTOR_TAG, "monitor should be in init state");
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// enable peripheral intr_ena
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if ((monitor_handle->config.h_threshold >= 0)) {
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adc_ll_digi_monitor_enable_intr(monitor_handle->monitor_id, ADC_MONITOR_MODE_HIGH, true);
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}
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if ((monitor_handle->config.l_threshold >= 0)) {
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adc_ll_digi_monitor_enable_intr(monitor_handle->monitor_id, ADC_MONITOR_MODE_LOW, true);
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}
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adc_ll_digi_monitor_user_start(monitor_handle->monitor_id, true);
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monitor_handle->fsm = ADC_MONITOR_FSM_ENABLED;
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return esp_intr_enable(s_adc_monitor_platform.monitor_intr_handle);
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}
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esp_err_t adc_continuous_monitor_disable(adc_monitor_handle_t monitor_handle)
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{
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ESP_RETURN_ON_FALSE(monitor_handle, ESP_ERR_INVALID_ARG, MNTOR_TAG, "invalid argument: null pointer");
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ESP_RETURN_ON_FALSE(monitor_handle->fsm == ADC_MONITOR_FSM_ENABLED, ESP_ERR_INVALID_STATE, MNTOR_TAG, "monitor not in running");
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// disable peripheral intr_ena
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if ((monitor_handle->config.h_threshold >= 0)) {
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adc_ll_digi_monitor_enable_intr(monitor_handle->monitor_id, ADC_MONITOR_MODE_HIGH, false);
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}
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if ((monitor_handle->config.l_threshold >= 0)) {
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adc_ll_digi_monitor_enable_intr(monitor_handle->monitor_id, ADC_MONITOR_MODE_LOW, false);
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}
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adc_ll_digi_monitor_user_start(monitor_handle->monitor_id, false);
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monitor_handle->fsm = ADC_MONITOR_FSM_INIT;
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return esp_intr_disable(s_adc_monitor_platform.monitor_intr_handle);
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}
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esp_err_t adc_del_continuous_monitor(adc_monitor_handle_t monitor_handle)
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{
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ESP_RETURN_ON_FALSE(monitor_handle, ESP_ERR_INVALID_ARG, MNTOR_TAG, "invalid argument: null pointer");
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ESP_RETURN_ON_FALSE((monitor_handle->fsm == ADC_MONITOR_FSM_INIT) && (s_adc_monitor_platform.continuous_ctx->fsm == ADC_FSM_INIT), \
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ESP_ERR_INVALID_STATE, MNTOR_TAG, "monitor and ADC continuous driver should all be in init state");
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ESP_RETURN_ON_ERROR(s_adc_monitor_release(monitor_handle), MNTOR_TAG, "monitor not find or isn't in use");
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for (int i = 0; i < SOC_ADC_DIGI_MONITOR_NUM; i++) {
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if (s_adc_monitor_platform.continuous_ctx->adc_monitor[i]) {
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// If any other monitor not freed, then delete self and exit now. del_monitor is complete
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free(monitor_handle);
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return ESP_OK;
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}
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}
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// If no monitor is using, the release intr handle as well
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ESP_RETURN_ON_ERROR(esp_intr_free(s_adc_monitor_platform.monitor_intr_handle), MNTOR_TAG, "esp intr release failed\n");
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s_adc_monitor_platform.monitor_intr_handle = NULL;
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free(monitor_handle);
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return ESP_OK;
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}
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123
components/esp_adc/include/esp_adc/adc_monitor.h
Normal file
123
components/esp_adc/include/esp_adc/adc_monitor.h
Normal file
@ -0,0 +1,123 @@
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/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include "adc_continuous.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Type of adc digi monitor handle
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*/
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typedef struct adc_monitor_t *adc_monitor_handle_t;
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/**
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* @brief ADC digital controller (DMA mode) monitor configuration.
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*/
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typedef struct {
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adc_unit_t adc_unit; /*!<Set adc unit number for monitor. */
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adc_channel_t channel; /*!<Set adc channel number for monitor. */
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int32_t h_threshold; /*!<Set monitor high threshold of adc digital controller, -1 if not used. */
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int32_t l_threshold; /*!<Set monitor low threshold of adc digital controller, -1 if not used. */
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} adc_monitor_config_t;
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/**
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* @brief Type of adc monitor event data
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*/
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typedef struct adc_monitor_evt_data {
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// reserved for extensibility
|
||||
} adc_monitor_evt_data_t;
|
||||
|
||||
/**
|
||||
* @brief ADC digital controller (DMA mode) monitor callback type.
|
||||
*/
|
||||
typedef bool (*adc_monitor_evt_cb_t)(adc_monitor_handle_t monitor_handle, const adc_monitor_evt_data_t *event_data, void *user_data);
|
||||
|
||||
/**
|
||||
* @brief Struct type of many different adc_monitor evt callbacks.
|
||||
*/
|
||||
typedef struct {
|
||||
adc_monitor_evt_cb_t on_over_high_thresh; /*!< adc_monitor high value interrupt callback */
|
||||
adc_monitor_evt_cb_t on_below_low_thresh; /*!< adc_monitor low value interrupt callback */
|
||||
} adc_monitor_evt_cbs_t;
|
||||
|
||||
|
||||
/**
|
||||
* @brief Allocate an ADC continuous mode monitor (and configure it into an initial state)
|
||||
*
|
||||
* @param[in] handle ADC continuous mode driver handle
|
||||
* @param[in] monitor_cfg ADC monitor config struct
|
||||
* @param[out] ret_handle Handle of allocated monitor
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK: On success
|
||||
* - ESP_ERR_INVALID_ARG: Invalid argument
|
||||
* - ESP_ERR_INVALID_STATE： Install monitor when ADC converter is running
|
||||
* - ESP_ERR_NOT_FOUND： No appropriate monitor Or no free monitor
|
||||
* - ESP_ERR_NOT_SUPPORTED: Threshold configuration not supported
|
||||
* - ESP_ERR_NO_MEM: Free memory not enough
|
||||
*/
|
||||
esp_err_t adc_new_continuous_monitor(adc_continuous_handle_t handle, const adc_monitor_config_t *monitor_cfg, adc_monitor_handle_t *ret_handle);
|
||||
|
||||
/**
|
||||
* @brief Register threshold interrupt callbacks for allocated monitor.
|
||||
*
|
||||
* @param[in] monitor_handle Monitor handle
|
||||
* @param[in] cbs Pointer to a adc_monitor_evt_cbs_t struct
|
||||
* @param[in] user_data User data, which will be delivered to the callback functions directly
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK: On success
|
||||
* - ESP_ERR_INVALID_STATE: To register cbs when monitor is running, or cbs has been installed
|
||||
* - ESP_ERR_NOT_SUPPORTED: Register not supported callbacks to esp32s2
|
||||
* - ESP_ERR_INVALID_ARG: Invalid argument
|
||||
*/
|
||||
esp_err_t adc_continuous_monitor_register_event_callbacks(adc_monitor_handle_t monitor_handle, const adc_monitor_evt_cbs_t *cbs, void *user_data);
|
||||
|
||||
/**
|
||||
* @brief Enable an ADC continuous mode monitor.
|
||||
*
|
||||
* @param[in] monitor_handle Monitor handle
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK: On success
|
||||
* - ESP_ERR_INVALID_STATE: Monitor has enabled, no need to enable again
|
||||
* - ESP_ERR_INVALID_ARG: Invalid argument
|
||||
*/
|
||||
esp_err_t adc_continuous_monitor_enable(adc_monitor_handle_t monitor_handle);
|
||||
|
||||
/**
|
||||
* @brief Disable an ADC continuous mode monitor.
|
||||
*
|
||||
* @param[in] monitor_handle Monitor handle
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK: On success
|
||||
* - ESP_ERR_INVALID_STATE: Monitor not enabled, no need to disable
|
||||
* - ESP_ERR_INVALID_ARG: Invalid argument
|
||||
*/
|
||||
esp_err_t adc_continuous_monitor_disable(adc_monitor_handle_t monitor_handle);
|
||||
|
||||
/**
|
||||
* @brief Free an ADC continuous mode monitor.
|
||||
*
|
||||
* @param[in] monitor_handle Monitor handle
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK: On success
|
||||
* - ESP_ERR_INVALID_STATE: Monitor is in enabled state, should call `adc_continuous_monitor_disable` first
|
||||
* - ESP_ERR_NOT_FOUND: Monitor haven't been used
|
||||
* - ESP_ERR_INVALID_ARG: Invalid argument
|
||||
*/
|
||||
esp_err_t adc_del_continuous_monitor(adc_monitor_handle_t monitor_handle);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
@ -247,42 +247,6 @@ static inline void adc_ll_digi_filter_enable(adc_digi_iir_filter_t idx, adc_unit
|
||||
//nothing to do to enable, after adc_ll_digi_filter_set_factor, it's enabled.
|
||||
}
|
||||
|
||||
/**
|
||||
* Set monitor mode of adc digital controller.
|
||||
*
|
||||
* @note If the channel info is not supported, the monitor function will not be enabled.
|
||||
* @param adc_n ADC unit.
|
||||
* @param is_larger true: If ADC_OUT > threshold, Generates monitor interrupt.
|
||||
* false: If ADC_OUT < threshold, Generates monitor interrupt.
|
||||
*/
|
||||
static inline void adc_ll_digi_monitor_set_mode(adc_digi_monitor_idx_t idx, adc_digi_monitor_t *cfg)
|
||||
{
|
||||
if (idx == ADC_DIGI_MONITOR_IDX0) {
|
||||
APB_SARADC.saradc_thres0_ctrl.saradc_thres0_channel = (cfg->adc_unit << 3) | (cfg->channel & 0x7);
|
||||
APB_SARADC.saradc_thres0_ctrl.saradc_thres0_high = cfg->h_threshold;
|
||||
APB_SARADC.saradc_thres0_ctrl.saradc_thres0_low = cfg->l_threshold;
|
||||
} else { // ADC_DIGI_MONITOR_IDX1
|
||||
APB_SARADC.saradc_thres1_ctrl.saradc_thres1_channel = (cfg->adc_unit << 3) | (cfg->channel & 0x7);
|
||||
APB_SARADC.saradc_thres1_ctrl.saradc_thres1_high = cfg->h_threshold;
|
||||
APB_SARADC.saradc_thres1_ctrl.saradc_thres1_low = cfg->l_threshold;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Enable/disable monitor of adc digital controller.
|
||||
*
|
||||
* @note If the channel info is not supported, the monitor function will not be enabled.
|
||||
* @param adc_n ADC unit.
|
||||
*/
|
||||
static inline void adc_ll_digi_monitor_disable(adc_digi_monitor_idx_t idx)
|
||||
{
|
||||
if (idx == ADC_DIGI_MONITOR_IDX0) {
|
||||
APB_SARADC.saradc_thres0_ctrl.saradc_thres0_channel = 0xF;
|
||||
} else { // ADC_DIGI_MONITOR_IDX1
|
||||
APB_SARADC.saradc_thres1_ctrl.saradc_thres1_channel = 0xF;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Reset adc digital controller.
|
||||
*/
|
||||
|
||||
@ -29,10 +29,13 @@ extern "C" {
|
||||
|
||||
#define ADC_LL_EVENT_ADC1_ONESHOT_DONE BIT(31)
|
||||
#define ADC_LL_EVENT_ADC2_ONESHOT_DONE BIT(30)
|
||||
#define ADC_LL_EVENT_THRES0_HIGH BIT(29)
|
||||
#define ADC_LL_EVENT_THRES1_HIGH BIT(28)
|
||||
#define ADC_LL_EVENT_THRES0_LOW BIT(27)
|
||||
#define ADC_LL_EVENT_THRES1_LOW BIT(26)
|
||||
|
||||
#define ADC_LL_THRES_ALL_INTR_ST_M (APB_SARADC_THRES0_HIGH_INT_ST_M | \
|
||||
APB_SARADC_THRES1_HIGH_INT_ST_M | \
|
||||
APB_SARADC_THRES0_LOW_INT_ST_M | \
|
||||
APB_SARADC_THRES1_LOW_INT_ST_M)
|
||||
#define ADC_LL_GET_HIGH_THRES_MASK(monitor_id) ((monitor_id == 0) ? APB_SARADC_THRES0_HIGH_INT_ST_M : APB_SARADC_THRES1_HIGH_INT_ST_M)
|
||||
#define ADC_LL_GET_LOW_THRES_MASK(monitor_id) ((monitor_id == 0) ? APB_SARADC_THRES0_LOW_INT_ST_M : APB_SARADC_THRES1_LOW_INT_ST_M)
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
Oneshot
|
||||
@ -391,41 +394,87 @@ static inline void adc_ll_digi_filter_enable(adc_digi_iir_filter_t idx, adc_unit
|
||||
}
|
||||
|
||||
/**
|
||||
* Set monitor mode of adc digital controller.
|
||||
* Set monitor threshold of adc digital controller on specific channel.
|
||||
*
|
||||
* @note If the channel info is not supported, the monitor function will not be enabled.
|
||||
* @param adc_n ADC unit.
|
||||
* @param is_larger true: If ADC_OUT > threshold, Generates monitor interrupt.
|
||||
* false: If ADC_OUT < threshold, Generates monitor interrupt.
|
||||
* @param monitor_id ADC digi monitor unit index.
|
||||
* @param adc_n Which adc unit the channel belong to.
|
||||
* @param channel Which channel of adc want to be monitored.
|
||||
* @param h_thresh High threshold of this monitor.
|
||||
* @param l_thresh Low threshold of this monitor.
|
||||
*/
|
||||
static inline void adc_ll_digi_monitor_set_mode(adc_digi_monitor_idx_t idx, adc_digi_monitor_t *cfg)
|
||||
static inline void adc_ll_digi_monitor_set_thres(adc_monitor_id_t monitor_id, adc_unit_t adc_n, uint8_t channel, int32_t h_thresh, int32_t l_thresh)
|
||||
{
|
||||
if (idx == ADC_DIGI_MONITOR_IDX0) {
|
||||
APB_SARADC.thres0_ctrl.thres0_channel = (cfg->adc_unit << 3) | (cfg->channel & 0x7);
|
||||
APB_SARADC.thres0_ctrl.thres0_high = cfg->h_threshold;
|
||||
APB_SARADC.thres0_ctrl.thres0_low = cfg->l_threshold;
|
||||
} else { // ADC_DIGI_MONITOR_IDX1
|
||||
APB_SARADC.thres1_ctrl.thres1_channel = (cfg->adc_unit << 3) | (cfg->channel & 0x7);
|
||||
APB_SARADC.thres1_ctrl.thres1_high = cfg->h_threshold;
|
||||
APB_SARADC.thres1_ctrl.thres1_low = cfg->l_threshold;
|
||||
if (monitor_id == ADC_MONITOR_0) {
|
||||
APB_SARADC.thres0_ctrl.thres0_channel = (adc_n << 3) | (channel & 0x7);
|
||||
APB_SARADC.thres0_ctrl.thres0_high = h_thresh;
|
||||
APB_SARADC.thres0_ctrl.thres0_low = l_thresh;
|
||||
} else { // ADC_MONITOR_1
|
||||
APB_SARADC.thres1_ctrl.thres1_channel = (adc_n << 3) | (channel & 0x7);
|
||||
APB_SARADC.thres1_ctrl.thres1_high = h_thresh;
|
||||
APB_SARADC.thres1_ctrl.thres1_low = l_thresh;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Enable/disable monitor of adc digital controller.
|
||||
* Start/Stop monitor of adc digital controller.
|
||||
*
|
||||
* @note If the channel info is not supported, the monitor function will not be enabled.
|
||||
* @param adc_n ADC unit.
|
||||
* @param monitor_id ADC digi monitor unit index.
|
||||
* @param start 1 for start, 0 for stop
|
||||
*/
|
||||
static inline void adc_ll_digi_monitor_disable(adc_digi_monitor_idx_t idx)
|
||||
static inline void adc_ll_digi_monitor_user_start(adc_monitor_id_t monitor_id, bool start)
|
||||
{
|
||||
if (idx == ADC_DIGI_MONITOR_IDX0) {
|
||||
APB_SARADC.thres0_ctrl.thres0_channel = 0xF;
|
||||
} else { // ADC_DIGI_MONITOR_IDX1
|
||||
APB_SARADC.thres1_ctrl.thres1_channel = 0xF;
|
||||
if (monitor_id == ADC_MONITOR_0) {
|
||||
APB_SARADC.thres_ctrl.thres0_en = start;
|
||||
} else {
|
||||
APB_SARADC.thres_ctrl.thres1_en = start;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Enable/disable a intr of adc digital monitor.
|
||||
*
|
||||
* @param monitor_id ADC digi monitor unit index.
|
||||
* @param mode monit mode to enable/disable intr.
|
||||
* @param enable enable or disable.
|
||||
*/
|
||||
static inline void adc_ll_digi_monitor_enable_intr(adc_monitor_id_t monitor_id, adc_monitor_mode_t mode, bool enable)
|
||||
{
|
||||
if (monitor_id == ADC_MONITOR_0) {
|
||||
if (mode == ADC_MONITOR_MODE_HIGH) {
|
||||
APB_SARADC.int_ena.thres0_high = enable;
|
||||
} else {
|
||||
APB_SARADC.int_ena.thres0_low = enable;
|
||||
}
|
||||
}
|
||||
if (monitor_id == ADC_MONITOR_1) {
|
||||
if (mode == ADC_MONITOR_MODE_HIGH) {
|
||||
APB_SARADC.int_ena.thres1_high = enable;
|
||||
} else {
|
||||
APB_SARADC.int_ena.thres1_low = enable;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Get the address of digi monitor intr statue register.
|
||||
*
|
||||
* @return address of register.
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline volatile const void *adc_ll_digi_monitor_get_intr_status_addr(void)
|
||||
{
|
||||
return &APB_SARADC.int_st.val;
|
||||
}
|
||||
|
||||
/**
|
||||
* Clear intr raw for adc digi monitors.
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void adc_ll_digi_monitor_clear_intr(void)
|
||||
{
|
||||
APB_SARADC.int_clr.val |= ADC_LL_THRES_ALL_INTR_ST_M;
|
||||
}
|
||||
|
||||
/**
|
||||
* Set DMA eof num of adc digital controller.
|
||||
* If the number of measurements reaches `dma_eof_num`, then `dma_in_suc_eof` signal is generated.
|
||||
|
||||
@ -30,10 +30,13 @@ extern "C" {
|
||||
|
||||
#define ADC_LL_EVENT_ADC1_ONESHOT_DONE BIT(31)
|
||||
#define ADC_LL_EVENT_ADC2_ONESHOT_DONE BIT(30)
|
||||
#define ADC_LL_EVENT_THRES0_HIGH BIT(29)
|
||||
#define ADC_LL_EVENT_THRES1_HIGH BIT(28)
|
||||
#define ADC_LL_EVENT_THRES0_LOW BIT(27)
|
||||
#define ADC_LL_EVENT_THRES1_LOW BIT(26)
|
||||
|
||||
#define ADC_LL_THRES_ALL_INTR_ST_M (APB_SARADC_APB_SARADC_THRES0_HIGH_INT_ST_M | \
|
||||
APB_SARADC_APB_SARADC_THRES1_HIGH_INT_ST_M | \
|
||||
APB_SARADC_APB_SARADC_THRES0_LOW_INT_ST_M | \
|
||||
APB_SARADC_APB_SARADC_THRES1_LOW_INT_ST_M)
|
||||
#define ADC_LL_GET_HIGH_THRES_MASK(monitor_id) ((monitor_id == 0) ? APB_SARADC_APB_SARADC_THRES0_HIGH_INT_ST_M : APB_SARADC_APB_SARADC_THRES1_HIGH_INT_ST_M)
|
||||
#define ADC_LL_GET_LOW_THRES_MASK(monitor_id) ((monitor_id == 0) ? APB_SARADC_APB_SARADC_THRES0_LOW_INT_ST_M : APB_SARADC_APB_SARADC_THRES1_LOW_INT_ST_M)
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
Oneshot
|
||||
@ -50,7 +53,6 @@ extern "C" {
|
||||
#define ADC_LL_FSM_STANDBY_WAIT_DEFAULT (100)
|
||||
#define ADC_LL_SAMPLE_CYCLE_DEFAULT (2)
|
||||
#define ADC_LL_DIGI_SAR_CLK_DIV_DEFAULT (1)
|
||||
|
||||
#define ADC_LL_CLKM_DIV_NUM_DEFAULT 15
|
||||
#define ADC_LL_CLKM_DIV_B_DEFAULT 1
|
||||
#define ADC_LL_CLKM_DIV_A_DEFAULT 0
|
||||
@ -407,41 +409,87 @@ static inline void adc_ll_digi_filter_enable(adc_digi_iir_filter_t idx, adc_unit
|
||||
}
|
||||
|
||||
/**
|
||||
* Set monitor mode of adc digital controller.
|
||||
* Set monitor threshold of adc digital controller on specific channel.
|
||||
*
|
||||
* @note If the channel info is not supported, the monitor function will not be enabled.
|
||||
* @param adc_n ADC unit.
|
||||
* @param is_larger true: If ADC_OUT > threshold, Generates monitor interrupt.
|
||||
* false: If ADC_OUT < threshold, Generates monitor interrupt.
|
||||
* @param monitor_id ADC digi monitor unit index.
|
||||
* @param adc_n Which adc unit the channel belong to.
|
||||
* @param channel Which channel of adc want to be monitored.
|
||||
* @param h_thresh High threshold of this monitor.
|
||||
* @param l_thresh Low threshold of this monitor.
|
||||
*/
|
||||
static inline void adc_ll_digi_monitor_set_mode(adc_digi_monitor_idx_t idx, adc_digi_monitor_t *cfg)
|
||||
static inline void adc_ll_digi_monitor_set_thres(adc_monitor_id_t monitor_id, adc_unit_t adc_n, uint8_t channel, int32_t h_thresh, int32_t l_thresh)
|
||||
{
|
||||
if (idx == ADC_DIGI_MONITOR_IDX0) {
|
||||
APB_SARADC.saradc_thres0_ctrl.saradc_apb_saradc_thres0_channel = (cfg->adc_unit << 3) | (cfg->channel & 0x7);
|
||||
APB_SARADC.saradc_thres0_ctrl.saradc_apb_saradc_thres0_high = cfg->h_threshold;
|
||||
APB_SARADC.saradc_thres0_ctrl.saradc_apb_saradc_thres0_low = cfg->l_threshold;
|
||||
} else { // ADC_DIGI_MONITOR_IDX1
|
||||
APB_SARADC.saradc_thres1_ctrl.saradc_apb_saradc_thres1_channel = (cfg->adc_unit << 3) | (cfg->channel & 0x7);
|
||||
APB_SARADC.saradc_thres1_ctrl.saradc_apb_saradc_thres1_low = cfg->h_threshold;
|
||||
APB_SARADC.saradc_thres1_ctrl.saradc_apb_saradc_thres1_low = cfg->l_threshold;
|
||||
if (monitor_id == ADC_MONITOR_0) {
|
||||
APB_SARADC.saradc_thres0_ctrl.saradc_apb_saradc_thres0_channel = (adc_n << 3) | (channel & 0x7);
|
||||
APB_SARADC.saradc_thres0_ctrl.saradc_apb_saradc_thres0_high = h_thresh;
|
||||
APB_SARADC.saradc_thres0_ctrl.saradc_apb_saradc_thres0_low = l_thresh;
|
||||
} else { // ADC_MONITOR_1
|
||||
APB_SARADC.saradc_thres1_ctrl.saradc_apb_saradc_thres1_channel = (adc_n << 3) | (channel & 0x7);
|
||||
APB_SARADC.saradc_thres1_ctrl.saradc_apb_saradc_thres1_high = h_thresh;
|
||||
APB_SARADC.saradc_thres1_ctrl.saradc_apb_saradc_thres1_low = l_thresh;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Enable/disable monitor of adc digital controller.
|
||||
* Start/Stop monitor of adc digital controller.
|
||||
*
|
||||
* @note If the channel info is not supported, the monitor function will not be enabled.
|
||||
* @param adc_n ADC unit.
|
||||
* @param monitor_id ADC digi monitor unit index.
|
||||
* @param start 1 for start, 0 for stop
|
||||
*/
|
||||
static inline void adc_ll_digi_monitor_disable(adc_digi_monitor_idx_t idx)
|
||||
static inline void adc_ll_digi_monitor_user_start(adc_monitor_id_t monitor_id, bool start)
|
||||
{
|
||||
if (idx == ADC_DIGI_MONITOR_IDX0) {
|
||||
APB_SARADC.saradc_thres0_ctrl.saradc_apb_saradc_thres0_channel = 0xF;
|
||||
} else { // ADC_DIGI_MONITOR_IDX1
|
||||
APB_SARADC.saradc_thres1_ctrl.saradc_apb_saradc_thres1_channel = 0xF;
|
||||
if (monitor_id == ADC_MONITOR_0) {
|
||||
APB_SARADC.saradc_thres_ctrl.saradc_apb_saradc_thres0_en = start;
|
||||
} else {
|
||||
APB_SARADC.saradc_thres_ctrl.saradc_apb_saradc_thres1_en = start;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Enable/disable a intr of adc digital monitor.
|
||||
*
|
||||
* @param monitor_id ADC digi monitor unit index.
|
||||
* @param mode monit mode to enable/disable intr.
|
||||
* @param enable enable or disable.
|
||||
*/
|
||||
static inline void adc_ll_digi_monitor_enable_intr(adc_monitor_id_t monitor_id, adc_monitor_mode_t mode, bool enable)
|
||||
{
|
||||
if (monitor_id == ADC_MONITOR_0) {
|
||||
if (mode == ADC_MONITOR_MODE_HIGH) {
|
||||
APB_SARADC.saradc_int_ena.saradc_apb_saradc_thres0_high_int_ena = enable;
|
||||
} else {
|
||||
APB_SARADC.saradc_int_ena.saradc_apb_saradc_thres0_low_int_ena = enable;
|
||||
}
|
||||
}
|
||||
if (monitor_id == ADC_MONITOR_1) {
|
||||
if (mode == ADC_MONITOR_MODE_HIGH) {
|
||||
APB_SARADC.saradc_int_ena.saradc_apb_saradc_thres1_high_int_ena = enable;
|
||||
} else {
|
||||
APB_SARADC.saradc_int_ena.saradc_apb_saradc_thres1_low_int_ena = enable;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Clear intr raw for adc digi monitors.
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void adc_ll_digi_monitor_clear_intr(void)
|
||||
{
|
||||
APB_SARADC.saradc_int_clr.val |= ADC_LL_THRES_ALL_INTR_ST_M;
|
||||
}
|
||||
|
||||
/**
|
||||
* Get the address of digi monitor intr statue register.
|
||||
*
|
||||
* @return address of register.
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline volatile const void *adc_ll_digi_monitor_get_intr_status_addr(void)
|
||||
{
|
||||
return &APB_SARADC.saradc_int_st.val;
|
||||
}
|
||||
|
||||
/**
|
||||
* Set DMA eof num of adc digital controller.
|
||||
* If the number of measurements reaches `dma_eof_num`, then `dma_in_suc_eof` signal is generated.
|
||||
|
||||
@ -30,10 +30,13 @@ extern "C" {
|
||||
|
||||
#define ADC_LL_EVENT_ADC1_ONESHOT_DONE BIT(31)
|
||||
#define ADC_LL_EVENT_ADC2_ONESHOT_DONE BIT(30)
|
||||
#define ADC_LL_EVENT_THRES0_HIGH BIT(29)
|
||||
#define ADC_LL_EVENT_THRES1_HIGH BIT(28)
|
||||
#define ADC_LL_EVENT_THRES0_LOW BIT(27)
|
||||
#define ADC_LL_EVENT_THRES1_LOW BIT(26)
|
||||
|
||||
#define ADC_LL_THRES_ALL_INTR_ST_M (APB_SARADC_APB_SARADC_THRES0_HIGH_INT_ST_M | \
|
||||
APB_SARADC_APB_SARADC_THRES1_HIGH_INT_ST_M | \
|
||||
APB_SARADC_APB_SARADC_THRES0_LOW_INT_ST_M | \
|
||||
APB_SARADC_APB_SARADC_THRES1_LOW_INT_ST_M)
|
||||
#define ADC_LL_GET_HIGH_THRES_MASK(monitor_id) ((monitor_id == 0) ? APB_SARADC_APB_SARADC_THRES0_HIGH_INT_ST_M : APB_SARADC_APB_SARADC_THRES1_HIGH_INT_ST_M)
|
||||
#define ADC_LL_GET_LOW_THRES_MASK(monitor_id) ((monitor_id == 0) ? APB_SARADC_APB_SARADC_THRES0_LOW_INT_ST_M : APB_SARADC_APB_SARADC_THRES1_LOW_INT_ST_M)
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
Oneshot
|
||||
@ -407,41 +410,87 @@ static inline void adc_ll_digi_filter_enable(adc_digi_iir_filter_t idx, adc_unit
|
||||
}
|
||||
|
||||
/**
|
||||
* Set monitor mode of adc digital controller.
|
||||
* Set monitor threshold of adc digital controller on specific channel.
|
||||
*
|
||||
* @note If the channel info is not supported, the monitor function will not be enabled.
|
||||
* @param adc_n ADC unit.
|
||||
* @param is_larger true: If ADC_OUT > threshold, Generates monitor interrupt.
|
||||
* false: If ADC_OUT < threshold, Generates monitor interrupt.
|
||||
* @param monitor_id ADC digi monitor unit index.
|
||||
* @param adc_n Which adc unit the channel belong to.
|
||||
* @param channel Which channel of adc want to be monitored.
|
||||
* @param h_thresh High threshold of this monitor.
|
||||
* @param l_thresh Low threshold of this monitor.
|
||||
*/
|
||||
static inline void adc_ll_digi_monitor_set_mode(adc_digi_monitor_idx_t idx, adc_digi_monitor_t *cfg)
|
||||
static inline void adc_ll_digi_monitor_set_thres(adc_monitor_id_t monitor_id, adc_unit_t adc_n, uint8_t channel, int32_t h_thresh, int32_t l_thresh)
|
||||
{
|
||||
if (idx == ADC_DIGI_MONITOR_IDX0) {
|
||||
APB_SARADC.saradc_thres0_ctrl.saradc_apb_saradc_thres0_channel = (cfg->adc_unit << 3) | (cfg->channel & 0x7);
|
||||
APB_SARADC.saradc_thres0_ctrl.saradc_apb_saradc_thres0_high = cfg->h_threshold;
|
||||
APB_SARADC.saradc_thres0_ctrl.saradc_apb_saradc_thres0_low = cfg->l_threshold;
|
||||
} else { // ADC_DIGI_MONITOR_IDX1
|
||||
APB_SARADC.saradc_thres1_ctrl.saradc_apb_saradc_thres1_channel = (cfg->adc_unit << 3) | (cfg->channel & 0x7);
|
||||
APB_SARADC.saradc_thres1_ctrl.saradc_apb_saradc_thres1_low = cfg->h_threshold;
|
||||
APB_SARADC.saradc_thres1_ctrl.saradc_apb_saradc_thres1_low = cfg->l_threshold;
|
||||
if (monitor_id == ADC_MONITOR_0) {
|
||||
APB_SARADC.saradc_thres0_ctrl.saradc_apb_saradc_thres0_channel = (adc_n << 3) | (channel & 0x7);
|
||||
APB_SARADC.saradc_thres0_ctrl.saradc_apb_saradc_thres0_high = h_thresh;
|
||||
APB_SARADC.saradc_thres0_ctrl.saradc_apb_saradc_thres0_low = l_thresh;
|
||||
} else { // ADC_MONITOR_1
|
||||
APB_SARADC.saradc_thres1_ctrl.saradc_apb_saradc_thres1_channel = (adc_n << 3) | (channel & 0x7);
|
||||
APB_SARADC.saradc_thres1_ctrl.saradc_apb_saradc_thres1_high = h_thresh;
|
||||
APB_SARADC.saradc_thres1_ctrl.saradc_apb_saradc_thres1_low = l_thresh;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Enable/disable monitor of adc digital controller.
|
||||
* Start/Stop monitor of adc digital controller.
|
||||
*
|
||||
* @note If the channel info is not supported, the monitor function will not be enabled.
|
||||
* @param adc_n ADC unit.
|
||||
* @param monitor_id ADC digi monitor unit index.
|
||||
* @param start 1 for start, 0 for stop
|
||||
*/
|
||||
static inline void adc_ll_digi_monitor_disable(adc_digi_monitor_idx_t idx)
|
||||
static inline void adc_ll_digi_monitor_user_start(adc_monitor_id_t monitor_id, bool start)
|
||||
{
|
||||
if (idx == ADC_DIGI_MONITOR_IDX0) {
|
||||
APB_SARADC.saradc_thres0_ctrl.saradc_apb_saradc_thres0_channel = 0xF;
|
||||
} else { // ADC_DIGI_MONITOR_IDX1
|
||||
APB_SARADC.saradc_thres1_ctrl.saradc_apb_saradc_thres1_channel = 0xF;
|
||||
if (monitor_id == ADC_MONITOR_0) {
|
||||
APB_SARADC.saradc_thres_ctrl.saradc_apb_saradc_thres0_en = start;
|
||||
} else {
|
||||
APB_SARADC.saradc_thres_ctrl.saradc_apb_saradc_thres1_en = start;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Enable/disable a intr of adc digital monitor.
|
||||
*
|
||||
* @param monitor_id ADC digi monitor unit index.
|
||||
* @param mode monit mode to enable/disable intr.
|
||||
* @param enable enable or disable.
|
||||
*/
|
||||
static inline void adc_ll_digi_monitor_enable_intr(adc_monitor_id_t monitor_id, adc_monitor_mode_t mode, bool enable)
|
||||
{
|
||||
if (monitor_id == ADC_MONITOR_0) {
|
||||
if (mode == ADC_MONITOR_MODE_HIGH) {
|
||||
APB_SARADC.saradc_int_ena.saradc_apb_saradc_thres0_high_int_ena = enable;
|
||||
} else {
|
||||
APB_SARADC.saradc_int_ena.saradc_apb_saradc_thres0_low_int_ena = enable;
|
||||
}
|
||||
}
|
||||
if (monitor_id == ADC_MONITOR_1) {
|
||||
if (mode == ADC_MONITOR_MODE_HIGH) {
|
||||
APB_SARADC.saradc_int_ena.saradc_apb_saradc_thres1_high_int_ena = enable;
|
||||
} else {
|
||||
APB_SARADC.saradc_int_ena.saradc_apb_saradc_thres1_low_int_ena = enable;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Clear intr raw for adc digi monitors.
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void adc_ll_digi_monitor_clear_intr(void)
|
||||
{
|
||||
APB_SARADC.saradc_int_clr.val |= ADC_LL_THRES_ALL_INTR_ST_M;
|
||||
}
|
||||
|
||||
/**
|
||||
* Get the address of digi monitor intr statue register.
|
||||
*
|
||||
* @return address of register.
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline volatile const void *adc_ll_digi_monitor_get_intr_status_addr(void)
|
||||
{
|
||||
return &APB_SARADC.saradc_int_st.val;
|
||||
}
|
||||
|
||||
/**
|
||||
* Set DMA eof num of adc digital controller.
|
||||
* If the number of measurements reaches `dma_eof_num`, then `dma_in_suc_eof` signal is generated.
|
||||
|
||||
@ -30,6 +30,10 @@ extern "C" {
|
||||
#define ADC_LL_EVENT_ADC1_ONESHOT_DONE (1 << 0)
|
||||
#define ADC_LL_EVENT_ADC2_ONESHOT_DONE (1 << 1)
|
||||
|
||||
#define ADC_LL_THRES_ALL_INTR_ST_M (APB_SARADC_ADC1_THRES_INT_ST_M | APB_SARADC_ADC2_THRES_INT_ST_M)
|
||||
#define ADC_LL_GET_HIGH_THRES_MASK(monitor_id) ((monitor_id == 0) ? APB_SARADC_ADC1_THRES_INT_ST_M : APB_SARADC_ADC2_THRES_INT_ST_M)
|
||||
#define ADC_LL_GET_LOW_THRES_MASK(monitor_id) ((monitor_id == 0) ? APB_SARADC_ADC1_THRES_INT_ST_M : APB_SARADC_ADC2_THRES_INT_ST_M)
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
Oneshot
|
||||
---------------------------------------------------------------*/
|
||||
@ -460,48 +464,88 @@ static inline uint32_t adc_ll_digi_filter_read_data(adc_unit_t adc_n)
|
||||
* Set monitor mode of adc digital controller.
|
||||
*
|
||||
* @note The monitor will monitor all the enabled channel data of the each ADC unit at the same time.
|
||||
* @param adc_n ADC unit.
|
||||
* @param monitor_id ADC digi monitor unit index.
|
||||
* @param is_larger true: If ADC_OUT > threshold, Generates monitor interrupt.
|
||||
* false: If ADC_OUT < threshold, Generates monitor interrupt.
|
||||
*/
|
||||
static inline void adc_ll_digi_monitor_set_mode(adc_unit_t adc_n, bool is_larger)
|
||||
static inline void adc_ll_digi_monitor_set_mode(adc_monitor_id_t monitor_id, bool is_larger)
|
||||
{
|
||||
if (adc_n == ADC_UNIT_1) {
|
||||
if (monitor_id == ADC_MONITOR_0) {
|
||||
APB_SARADC.thres_ctrl.adc1_thres_mode = is_larger;
|
||||
} else { // adc_n == ADC_UNIT_2
|
||||
} else { // monitor_id == ADC_MONITOR_1
|
||||
APB_SARADC.thres_ctrl.adc2_thres_mode = is_larger;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Set monitor threshold of adc digital controller.
|
||||
* Set monitor threshold of adc digital controller on specific channel.
|
||||
*
|
||||
* @note The monitor will monitor all the enabled channel data of the each ADC unit at the same time.
|
||||
* @param adc_n ADC unit.
|
||||
* @param threshold Monitor threshold.
|
||||
* @param monitor_id ADC digi monitor unit index.
|
||||
* @param adc_n Which adc unit the channel belong to.
|
||||
* @param channel Which channel of adc want to be monitored.
|
||||
* @param h_thresh High threshold of this monitor.
|
||||
* @param l_thresh Low threshold of this monitor.
|
||||
*/
|
||||
static inline void adc_ll_digi_monitor_set_thres(adc_unit_t adc_n, uint32_t threshold)
|
||||
static inline void adc_ll_digi_monitor_set_thres(adc_monitor_id_t monitor_id, adc_unit_t adc_n, uint8_t channel, int32_t h_thresh, int32_t l_thresh)
|
||||
{
|
||||
if (adc_n == ADC_UNIT_1) {
|
||||
APB_SARADC.thres_ctrl.adc1_thres = threshold;
|
||||
} else { // adc_n == ADC_UNIT_2
|
||||
APB_SARADC.thres_ctrl.adc2_thres = threshold;
|
||||
if (monitor_id == ADC_MONITOR_0) {
|
||||
APB_SARADC.thres_ctrl.adc1_thres = (h_thresh == -1)? l_thresh : h_thresh;
|
||||
} else { // monitor_id == ADC_MONITOR_1
|
||||
APB_SARADC.thres_ctrl.adc2_thres = (h_thresh == -1)? l_thresh : h_thresh;
|
||||
}
|
||||
adc_ll_digi_monitor_set_mode(monitor_id, l_thresh == -1);
|
||||
}
|
||||
|
||||
/**
|
||||
* Start/Stop monitor of adc digital controller.
|
||||
*
|
||||
* @param monitor_id ADC digi monitor unit index.
|
||||
* @param start 1 for start, 0 for stop
|
||||
*/
|
||||
static inline void adc_ll_digi_monitor_user_start(adc_monitor_id_t monitor_id, bool start)
|
||||
{
|
||||
if (monitor_id == ADC_MONITOR_0) {
|
||||
APB_SARADC.thres_ctrl.adc1_thres_en = start;
|
||||
} else {
|
||||
APB_SARADC.thres_ctrl.adc2_thres_en = start;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Enable/disable monitor of adc digital controller.
|
||||
* Enable/disable a intr of adc digital monitor.
|
||||
*
|
||||
* @note The monitor will monitor all the enabled channel data of the each ADC unit at the same time.
|
||||
* @param adc_n ADC unit.
|
||||
* @param monitor_id ADC digi monitor unit index.
|
||||
* @param mode monit mode to enable/disable intr.
|
||||
* @param enable enable or disable.
|
||||
*/
|
||||
static inline void adc_ll_digi_monitor_enable(adc_unit_t adc_n, bool enable)
|
||||
static inline void adc_ll_digi_monitor_enable_intr(adc_monitor_id_t monitor_id, adc_monitor_mode_t mode, bool enable)
|
||||
{
|
||||
if (adc_n == ADC_UNIT_1) {
|
||||
APB_SARADC.thres_ctrl.adc1_thres_en = enable;
|
||||
} else { // adc_n == ADC_UNIT_2
|
||||
APB_SARADC.thres_ctrl.adc2_thres_en = enable;
|
||||
if (monitor_id == ADC_MONITOR_0) {
|
||||
APB_SARADC.int_ena.adc1_thres = enable;
|
||||
}
|
||||
if (monitor_id == ADC_MONITOR_1) {
|
||||
APB_SARADC.int_ena.adc2_thres = enable;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Clear intr raw for adc digi monitors.
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void adc_ll_digi_monitor_clear_intr(void)
|
||||
{
|
||||
APB_SARADC.int_clr.val |= ADC_LL_THRES_ALL_INTR_ST_M;
|
||||
}
|
||||
|
||||
/**
|
||||
* Get the address of digi monitor intr statue register.
|
||||
*
|
||||
* @return address of register.
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline volatile const void *adc_ll_digi_monitor_get_intr_status_addr(void)
|
||||
{
|
||||
return &APB_SARADC.int_st.val;
|
||||
}
|
||||
|
||||
/**
|
||||
|
||||
@ -30,6 +30,13 @@ extern "C" {
|
||||
#define ADC_LL_EVENT_ADC1_ONESHOT_DONE (1 << 0)
|
||||
#define ADC_LL_EVENT_ADC2_ONESHOT_DONE (1 << 1)
|
||||
|
||||
#define ADC_LL_THRES_ALL_INTR_ST_M (APB_SARADC_THRES0_HIGH_INT_ST_M | \
|
||||
APB_SARADC_THRES1_HIGH_INT_ST_M | \
|
||||
APB_SARADC_THRES0_LOW_INT_ST_M | \
|
||||
APB_SARADC_THRES1_LOW_INT_ST_M)
|
||||
#define ADC_LL_GET_HIGH_THRES_MASK(monitor_id) ((monitor_id == 0) ? APB_SARADC_THRES0_HIGH_INT_ST_M : APB_SARADC_THRES1_HIGH_INT_ST_M)
|
||||
#define ADC_LL_GET_LOW_THRES_MASK(monitor_id) ((monitor_id == 0) ? APB_SARADC_THRES0_LOW_INT_ST_M : APB_SARADC_THRES1_LOW_INT_ST_M)
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
Oneshot
|
||||
---------------------------------------------------------------*/
|
||||
@ -456,39 +463,85 @@ static inline void adc_ll_digi_filter_enable(adc_digi_iir_filter_t idx, adc_unit
|
||||
}
|
||||
|
||||
/**
|
||||
* Set monitor mode of adc digital controller.
|
||||
* Set monitor threshold of adc digital controller on specific channel.
|
||||
*
|
||||
* @note The monitor will monitor all the enabled channel data of the each ADC unit at the same time.
|
||||
* @param adc_n ADC unit.
|
||||
* @param is_larger true: If ADC_OUT > threshold, Generates monitor interrupt.
|
||||
* false: If ADC_OUT < threshold, Generates monitor interrupt.
|
||||
* @param monitor_id ADC digi monitor unit index.
|
||||
* @param adc_n Which adc unit the channel belong to.
|
||||
* @param channel Which channel of adc want to be monitored.
|
||||
* @param h_thresh High threshold of this monitor.
|
||||
* @param l_thresh Low threshold of this monitor.
|
||||
*/
|
||||
static inline void adc_ll_digi_monitor_set_mode(adc_unit_t adc_n, bool is_larger)
|
||||
static inline void adc_ll_digi_monitor_set_thres(adc_monitor_id_t monitor_id, adc_unit_t adc_n, uint8_t channel, int32_t h_thresh, int32_t l_thresh)
|
||||
{
|
||||
abort();
|
||||
if (monitor_id == ADC_MONITOR_0) {
|
||||
APB_SARADC.thres0_ctrl.thres0_channel = (adc_n << 3) | (channel & 0x7);
|
||||
APB_SARADC.thres0_ctrl.thres0_high = h_thresh;
|
||||
APB_SARADC.thres0_ctrl.thres0_low = l_thresh;
|
||||
} else { // ADC_MONITOR_1
|
||||
APB_SARADC.thres1_ctrl.thres1_channel = (adc_n << 3) | (channel & 0x7);
|
||||
APB_SARADC.thres1_ctrl.thres1_high = h_thresh;
|
||||
APB_SARADC.thres1_ctrl.thres1_low = l_thresh;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Set monitor threshold of adc digital controller.
|
||||
* Start/Stop monitor of adc digital controller.
|
||||
*
|
||||
* @note The monitor will monitor all the enabled channel data of the each ADC unit at the same time.
|
||||
* @param adc_n ADC unit.
|
||||
* @param threshold Monitor threshold.
|
||||
* @param monitor_id ADC digi monitor unit index.
|
||||
* @param start 1 for start, 0 for stop
|
||||
*/
|
||||
static inline void adc_ll_digi_monitor_set_thres(adc_unit_t adc_n, uint32_t threshold)
|
||||
static inline void adc_ll_digi_monitor_user_start(adc_monitor_id_t monitor_id, bool start)
|
||||
{
|
||||
abort();
|
||||
if (monitor_id == ADC_MONITOR_0) {
|
||||
APB_SARADC.thres_ctrl.thres0_en = start;
|
||||
} else {
|
||||
APB_SARADC.thres_ctrl.thres1_en = start;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Enable/disable monitor of adc digital controller.
|
||||
* Enable/disable a intr of adc digital monitor.
|
||||
*
|
||||
* @note The monitor will monitor all the enabled channel data of the each ADC unit at the same time.
|
||||
* @param adc_n ADC unit.
|
||||
* @param monitor_id ADC digi monitor unit index.
|
||||
* @param mode monit mode to enable/disable intr.
|
||||
* @param enable enable or disable.
|
||||
*/
|
||||
static inline void adc_ll_digi_monitor_enable(adc_unit_t adc_n, bool enable)
|
||||
static inline void adc_ll_digi_monitor_enable_intr(adc_monitor_id_t monitor_id, adc_monitor_mode_t mode, bool enable)
|
||||
{
|
||||
abort();
|
||||
if (monitor_id == ADC_MONITOR_0) {
|
||||
if (mode == ADC_MONITOR_MODE_HIGH) {
|
||||
APB_SARADC.int_ena.thres0_high = enable;
|
||||
} else {
|
||||
APB_SARADC.int_ena.thres0_low = enable;
|
||||
}
|
||||
}
|
||||
if (monitor_id == ADC_MONITOR_1) {
|
||||
if (mode == ADC_MONITOR_MODE_HIGH) {
|
||||
APB_SARADC.int_ena.thres1_high = enable;
|
||||
} else {
|
||||
APB_SARADC.int_ena.thres1_low = enable;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Clear intr raw for adc digi monitors.
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void adc_ll_digi_monitor_clear_intr(void)
|
||||
{
|
||||
APB_SARADC.int_clr.val |= ADC_LL_THRES_ALL_INTR_ST_M;
|
||||
}
|
||||
|
||||
/**
|
||||
* Get the address of digi monitor intr statue register.
|
||||
*
|
||||
* @return address of register.
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline volatile const void *adc_ll_digi_monitor_get_intr_status_addr(void)
|
||||
{
|
||||
return &APB_SARADC.int_st.val;
|
||||
}
|
||||
|
||||
/**
|
||||
|
||||
@ -116,6 +116,25 @@ typedef enum {
|
||||
ADC_DIGI_IIR_FILTER_COEFF_64, ///< The filter coefficient is 64
|
||||
} adc_digi_iir_filter_coeff_t;
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
ADC Monitor
|
||||
---------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief ADC monitor (continuous mode) ID
|
||||
*/
|
||||
typedef enum {
|
||||
ADC_MONITOR_0, ///< The monitor index 0.
|
||||
ADC_MONITOR_1, ///< The monitor index 1.
|
||||
} adc_monitor_id_t;
|
||||
|
||||
/**
|
||||
* @brief Monitor config/event mode type
|
||||
*/
|
||||
typedef enum {
|
||||
ADC_MONITOR_MODE_HIGH = 0, ///< ADC raw_result > threshold value, monitor interrupt will be generated.
|
||||
ADC_MONITOR_MODE_LOW, ///< ADC raw_result < threshold value, monitor interrupt will be generated.
|
||||
} adc_monitor_mode_t;
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
Output Format
|
||||
---------------------------------------------------------------*/
|
||||
@ -205,6 +224,7 @@ typedef struct {
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#if CONFIG_IDF_TARGET_ESP32S2
|
||||
/**
|
||||
* @brief ADC digital controller (DMA mode) clock system setting.
|
||||
|
||||
@ -47,55 +47,6 @@ typedef struct {
|
||||
}
|
||||
#endif //#if SOC_ADC_ARBITER_SUPPORTED
|
||||
|
||||
#if SOC_ADC_MONITOR_SUPPORTED
|
||||
/*---------------------------------------------------------------
|
||||
Monitor
|
||||
---------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief ADC digital controller (DMA mode) monitor index options.
|
||||
*
|
||||
* @note For ESP32-S2, The monitor object of the ADC is fixed.
|
||||
*/
|
||||
typedef enum {
|
||||
ADC_DIGI_MONITOR_IDX0 = 0, /*!<The monitor index 0.
|
||||
For ESP32-S2, It can only be used to monitor all enabled channels of ADC1 unit at the same time. */
|
||||
ADC_DIGI_MONITOR_IDX1, /*!<The monitor index 1.
|
||||
For ESP32-S2, It can only be used to monitor all enabled channels of ADC2 unit at the same time. */
|
||||
ADC_DIGI_MONITOR_IDX_MAX
|
||||
} adc_digi_monitor_idx_t;
|
||||
|
||||
/**
|
||||
* @brief Set monitor mode of adc digital controller.
|
||||
* MONITOR_HIGH:If ADC_OUT > threshold, Generates monitor interrupt.
|
||||
* MONITOR_LOW: If ADC_OUT < threshold, Generates monitor interrupt.
|
||||
*/
|
||||
typedef enum {
|
||||
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2
|
||||
ADC_DIGI_MONITOR_DIS = 0, /*!<Disable monitor. */
|
||||
ADC_DIGI_MONITOR_EN, /*!<If ADC_OUT < threshold, Generates monitor interrupt. */
|
||||
/*!<If ADC_OUT > threshold, Generates monitor interrupt. */
|
||||
#else
|
||||
ADC_DIGI_MONITOR_HIGH = 0, /*!<If ADC_OUT > threshold, Generates monitor interrupt. */
|
||||
ADC_DIGI_MONITOR_LOW, /*!<If ADC_OUT < threshold, Generates monitor interrupt. */
|
||||
#endif
|
||||
ADC_DIGI_MONITOR_MAX
|
||||
} adc_digi_monitor_mode_t;
|
||||
|
||||
/**
|
||||
* @brief ADC digital controller (DMA mode) monitor configuration.
|
||||
*
|
||||
*/
|
||||
typedef struct {
|
||||
adc_unit_t adc_unit; /*!<Set adc unit number for monitor.
|
||||
For ESP32-S2, monitor IDX0/IDX1 can only be used to monitor all enabled channels of ADC1/ADC2 unit at the same time. */
|
||||
adc_channel_t channel; /*!<Set adc channel number for monitor.
|
||||
For ESP32-S2, it's always `ADC_CHANNEL_MAX` */
|
||||
adc_digi_monitor_mode_t mode; /*!<Set adc monitor mode. See ``adc_digi_monitor_mode_t``. */
|
||||
uint32_t h_threshold; /*!<Set monitor threshold of adc digital controller. */
|
||||
uint32_t l_threshold; /*!<Set monitor threshold of adc digital controller. */
|
||||
} adc_digi_monitor_t;
|
||||
#endif //#if SOC_ADC_MONITOR_SUPPORTED
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -243,6 +243,10 @@ config SOC_ADC_DIGI_DATA_BYTES_PER_CONV
|
||||
int
|
||||
default 2
|
||||
|
||||
config SOC_ADC_DIGI_MONITOR_NUM
|
||||
int
|
||||
default 2
|
||||
|
||||
config SOC_ADC_SAMPLE_FREQ_THRES_HIGH
|
||||
int
|
||||
default 83333
|
||||
|
||||
@ -108,6 +108,7 @@
|
||||
#define SOC_ADC_DIGI_IIR_FILTER_NUM (2)
|
||||
#define SOC_ADC_DIGI_RESULT_BYTES (2)
|
||||
#define SOC_ADC_DIGI_DATA_BYTES_PER_CONV (2)
|
||||
#define SOC_ADC_DIGI_MONITOR_NUM (2)
|
||||
/*!< F_sample = F_digi_con / 2 / interval. F_digi_con = 5M for now. 30 <= interval<= 4095 */
|
||||
#define SOC_ADC_SAMPLE_FREQ_THRES_HIGH 83333
|
||||
#define SOC_ADC_SAMPLE_FREQ_THRES_LOW 611
|
||||
|
||||
@ -279,6 +279,10 @@ config SOC_ADC_DIGI_IIR_FILTER_NUM
|
||||
int
|
||||
default 2
|
||||
|
||||
config SOC_ADC_DIGI_MONITOR_NUM
|
||||
int
|
||||
default 2
|
||||
|
||||
config SOC_ADC_SAMPLE_FREQ_THRES_HIGH
|
||||
int
|
||||
default 83333
|
||||
|
||||
@ -100,6 +100,7 @@
|
||||
#define SOC_ADC_DIGI_RESULT_BYTES (4)
|
||||
#define SOC_ADC_DIGI_DATA_BYTES_PER_CONV (4)
|
||||
#define SOC_ADC_DIGI_IIR_FILTER_NUM (2)
|
||||
#define SOC_ADC_DIGI_MONITOR_NUM (2)
|
||||
/*!< F_sample = F_digi_con / 2 / interval. F_digi_con = 5M for now. 30 <= interval<= 4095 */
|
||||
#define SOC_ADC_SAMPLE_FREQ_THRES_HIGH 83333
|
||||
#define SOC_ADC_SAMPLE_FREQ_THRES_LOW 611
|
||||
|
||||
Loading…
Reference in New Issue
Block a user