2017-09-22 11:29:33 -04:00
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#include <stdio.h>
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#include <stdlib.h>
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2022-11-29 05:58:54 -05:00
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#include <stdint.h>
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2017-09-22 11:29:33 -04:00
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#include <time.h>
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#include <sys/time.h>
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2018-07-29 03:51:19 -04:00
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#include <sys/param.h>
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2017-09-22 11:29:33 -04:00
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#include "unity.h"
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#include "esp_pm.h"
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2020-07-22 03:23:39 -04:00
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#include "esp_sleep.h"
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2022-04-16 05:32:22 -04:00
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#include "esp_timer.h"
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2018-03-26 22:53:03 -04:00
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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2018-04-12 06:18:45 -04:00
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#include "freertos/semphr.h"
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2018-03-26 22:53:03 -04:00
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#include "esp_log.h"
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2022-01-02 03:19:49 -05:00
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#include "driver/gptimer.h"
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2018-04-12 06:18:45 -04:00
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#include "driver/rtc_io.h"
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2022-01-05 03:17:12 -05:00
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#include "soc/rtc.h"
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2022-01-02 03:19:49 -05:00
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#include "esp_private/gptimer.h"
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2019-05-13 06:02:45 -04:00
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#include "soc/rtc_periph.h"
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2020-07-21 01:07:34 -04:00
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#include "esp_rom_sys.h"
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2021-11-18 22:42:01 -05:00
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#include "esp_private/esp_clk.h"
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2022-05-20 06:16:47 -04:00
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#include "test_utils.h"
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2017-09-22 11:29:33 -04:00
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2020-07-21 05:15:19 -04:00
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#include "sdkconfig.h"
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2022-01-21 04:13:48 -05:00
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#if CONFIG_ULP_COPROC_TYPE_FSM
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2020-07-21 05:15:19 -04:00
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#if CONFIG_IDF_TARGET_ESP32
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#include "esp32/ulp.h"
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#elif CONFIG_IDF_TARGET_ESP32S2
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#include "esp32s2/ulp.h"
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2020-09-14 00:15:00 -04:00
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#elif CONFIG_IDF_TARGET_ESP32S3
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#include "esp32s3/ulp.h"
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2020-07-21 05:15:19 -04:00
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#endif
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2022-01-21 04:13:48 -05:00
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#endif //CONFIG_ULP_COPROC_TYPE_FSM
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2018-10-26 07:52:49 -04:00
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2017-09-22 11:29:33 -04:00
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TEST_CASE("Can dump power management lock stats", "[pm]")
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{
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esp_pm_dump_locks(stdout);
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}
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2018-03-26 22:53:03 -04:00
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#ifdef CONFIG_PM_ENABLE
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static void switch_freq(int mhz)
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{
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2022-03-25 06:41:25 -04:00
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int xtal_freq_mhz = esp_clk_xtal_freq() / MHZ;
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2020-07-21 05:15:19 -04:00
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#if CONFIG_IDF_TARGET_ESP32
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2018-03-26 22:53:03 -04:00
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esp_pm_config_esp32_t pm_config = {
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2020-07-21 05:15:19 -04:00
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#elif CONFIG_IDF_TARGET_ESP32S2
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esp_pm_config_esp32s2_t pm_config = {
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2020-09-14 00:15:00 -04:00
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#elif CONFIG_IDF_TARGET_ESP32S3
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esp_pm_config_esp32s3_t pm_config = {
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2022-05-20 06:16:47 -04:00
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#elif CONFIG_IDF_TARGET_ESP32C2
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esp_pm_config_esp32c2_t pm_config = {
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2021-02-25 22:44:26 -05:00
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#elif CONFIG_IDF_TARGET_ESP32C3
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esp_pm_config_esp32c3_t pm_config = {
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2021-06-10 07:47:41 -04:00
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#elif CONFIG_IDF_TARGET_ESP32H2
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esp_pm_config_esp32h2_t pm_config = {
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2020-07-21 05:15:19 -04:00
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#endif
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2018-07-29 03:51:19 -04:00
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.max_freq_mhz = mhz,
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2022-03-25 06:41:25 -04:00
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.min_freq_mhz = MIN(mhz, xtal_freq_mhz),
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2018-03-26 22:53:03 -04:00
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};
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ESP_ERROR_CHECK( esp_pm_configure(&pm_config) );
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2018-07-29 03:51:19 -04:00
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printf("Waiting for frequency to be set to %d MHz...\n", mhz);
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2022-01-02 03:19:49 -05:00
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while (esp_clk_cpu_freq() / MHZ != mhz)
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{
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2018-07-29 03:51:19 -04:00
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vTaskDelay(pdMS_TO_TICKS(200));
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2018-10-26 07:52:49 -04:00
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printf("Frequency is %d MHz\n", esp_clk_cpu_freq() / MHZ);
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2018-03-26 22:53:03 -04:00
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}
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}
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2022-05-11 02:56:00 -04:00
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#if CONFIG_IDF_TARGET_ESP32C3
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static const int test_freqs[] = {40, CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ, 80, 40, 80, 10, 80, 20, 40};
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#elif CONFIG_IDF_TARGET_ESP32C2
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static const int test_freqs[] = {CONFIG_XTAL_FREQ, CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ, 80, CONFIG_XTAL_FREQ, 80,
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CONFIG_XTAL_FREQ / 2, CONFIG_XTAL_FREQ}; // C2 xtal has 40/26MHz option
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#elif CONFIG_IDF_TARGET_ESP32H2
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static const int test_freqs[] = {32, CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ, 32} // TODO: IDF-3786
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2021-02-25 22:44:26 -05:00
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#else
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static const int test_freqs[] = {240, 40, 160, 240, 80, 40, 240, 40, 80, 10, 80, 20, 40};
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#endif
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2018-03-26 22:53:03 -04:00
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TEST_CASE("Can switch frequency using esp_pm_configure", "[pm]")
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{
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2018-10-26 07:52:49 -04:00
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int orig_freq_mhz = esp_clk_cpu_freq() / MHZ;
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2021-02-25 22:44:26 -05:00
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2022-01-02 03:19:49 -05:00
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for (int i = 0; i < sizeof(test_freqs) / sizeof(int); i++) {
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2021-02-25 22:44:26 -05:00
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switch_freq(test_freqs[i]);
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}
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2018-03-26 22:53:03 -04:00
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switch_freq(orig_freq_mhz);
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}
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2018-04-12 06:18:45 -04:00
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#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
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2019-07-16 05:33:30 -04:00
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static void light_sleep_enable(void)
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2018-04-12 06:18:45 -04:00
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{
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2018-10-26 07:52:49 -04:00
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int cur_freq_mhz = esp_clk_cpu_freq() / MHZ;
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2022-03-25 06:41:25 -04:00
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int xtal_freq = esp_clk_xtal_freq() / MHZ;
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2018-10-26 07:52:49 -04:00
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2020-07-21 05:15:19 -04:00
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#if CONFIG_IDF_TARGET_ESP32
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esp_pm_config_esp32_t pm_config = {
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#elif CONFIG_IDF_TARGET_ESP32S2
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esp_pm_config_esp32s2_t pm_config = {
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2020-09-14 00:15:00 -04:00
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#elif CONFIG_IDF_TARGET_ESP32S3
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esp_pm_config_esp32s3_t pm_config = {
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2022-05-20 06:16:47 -04:00
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#elif CONFIG_IDF_TARGET_ESP32C2
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esp_pm_config_esp32c2_t pm_config = {
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2021-02-25 22:44:26 -05:00
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#elif CONFIG_IDF_TARGET_ESP32C3
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esp_pm_config_esp32c3_t pm_config = {
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2021-06-10 07:47:41 -04:00
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#elif CONFIG_IDF_TARGET_ESP32H2
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esp_pm_config_esp32h2_t pm_config = {
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2020-07-21 05:15:19 -04:00
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#endif
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2018-10-26 07:52:49 -04:00
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.max_freq_mhz = cur_freq_mhz,
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.min_freq_mhz = xtal_freq,
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2018-04-12 06:18:45 -04:00
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.light_sleep_enable = true
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};
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ESP_ERROR_CHECK( esp_pm_configure(&pm_config) );
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}
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2019-07-16 05:33:30 -04:00
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static void light_sleep_disable(void)
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2018-04-12 06:18:45 -04:00
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{
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2018-10-26 07:52:49 -04:00
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int cur_freq_mhz = esp_clk_cpu_freq() / MHZ;
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2020-07-21 05:15:19 -04:00
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#if CONFIG_IDF_TARGET_ESP32
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esp_pm_config_esp32_t pm_config = {
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#elif CONFIG_IDF_TARGET_ESP32S2
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esp_pm_config_esp32s2_t pm_config = {
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2020-09-14 00:15:00 -04:00
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#elif CONFIG_IDF_TARGET_ESP32S3
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esp_pm_config_esp32s3_t pm_config = {
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2022-05-20 06:16:47 -04:00
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#elif CONFIG_IDF_TARGET_ESP32C2
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esp_pm_config_esp32c2_t pm_config = {
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2021-02-25 22:44:26 -05:00
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#elif CONFIG_IDF_TARGET_ESP32C3
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esp_pm_config_esp32c3_t pm_config = {
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2021-06-10 07:47:41 -04:00
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#elif CONFIG_IDF_TARGET_ESP32H2
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esp_pm_config_esp32h2_t pm_config = {
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2020-07-21 05:15:19 -04:00
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#endif
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2018-10-26 07:52:49 -04:00
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.max_freq_mhz = cur_freq_mhz,
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.min_freq_mhz = cur_freq_mhz,
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2018-04-12 06:18:45 -04:00
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};
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ESP_ERROR_CHECK( esp_pm_configure(&pm_config) );
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}
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TEST_CASE("Automatic light occurs when tasks are suspended", "[pm]")
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{
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2022-01-02 03:19:49 -05:00
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gptimer_handle_t gptimer = NULL;
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/* To figure out if light sleep takes place, use GPTimer
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2018-04-12 06:18:45 -04:00
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* It will stop working while in light sleep.
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*/
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2022-01-02 03:19:49 -05:00
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gptimer_config_t config = {
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2022-04-13 01:12:30 -04:00
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.clk_src = GPTIMER_CLK_SRC_DEFAULT,
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2022-01-02 03:19:49 -05:00
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.direction = GPTIMER_COUNT_UP,
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.resolution_hz = 1000000, /* 1 us per tick */
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2018-04-12 06:18:45 -04:00
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};
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2022-01-02 03:19:49 -05:00
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TEST_ESP_OK(gptimer_new_timer(&config, &gptimer));
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2022-04-23 06:59:38 -04:00
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TEST_ESP_OK(gptimer_enable(gptimer));
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2022-01-02 03:19:49 -05:00
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TEST_ESP_OK(gptimer_start(gptimer));
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// if GPTimer is clocked from APB, when PM is enabled, the driver will acquire the PM lock
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// causing the auto light sleep doesn't take effect
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// so we manually release the lock here
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esp_pm_lock_handle_t gptimer_pm_lock;
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TEST_ESP_OK(gptimer_get_pm_lock(gptimer, &gptimer_pm_lock));
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2022-05-11 02:56:00 -04:00
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if (gptimer_pm_lock) {
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TEST_ESP_OK(esp_pm_lock_release(gptimer_pm_lock));
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}
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2018-04-12 06:18:45 -04:00
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light_sleep_enable();
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for (int ticks_to_delay = CONFIG_FREERTOS_IDLE_TIME_BEFORE_SLEEP;
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ticks_to_delay < CONFIG_FREERTOS_IDLE_TIME_BEFORE_SLEEP * 10;
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++ticks_to_delay) {
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/* Wait until next tick */
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vTaskDelay(1);
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/* The following delay should cause light sleep to start */
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uint64_t count_start;
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uint64_t count_end;
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2022-01-02 03:19:49 -05:00
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TEST_ESP_OK(gptimer_get_raw_count(gptimer, &count_start));
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vTaskDelay(ticks_to_delay);
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TEST_ESP_OK(gptimer_get_raw_count(gptimer, &count_end));
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2018-04-12 06:18:45 -04:00
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int timer_diff_us = (int) (count_end - count_start);
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const int us_per_tick = 1 * portTICK_PERIOD_MS * 1000;
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printf("%d %d\n", ticks_to_delay * us_per_tick, timer_diff_us);
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TEST_ASSERT(timer_diff_us < ticks_to_delay * us_per_tick);
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}
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light_sleep_disable();
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2022-05-11 02:56:00 -04:00
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if (gptimer_pm_lock) {
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TEST_ESP_OK(esp_pm_lock_acquire(gptimer_pm_lock));
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}
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2022-01-02 03:19:49 -05:00
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TEST_ESP_OK(gptimer_stop(gptimer));
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2022-04-23 06:59:38 -04:00
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TEST_ESP_OK(gptimer_disable(gptimer));
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2022-01-02 03:19:49 -05:00
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TEST_ESP_OK(gptimer_del_timer(gptimer));
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2018-04-12 06:18:45 -04:00
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}
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2022-01-21 04:13:48 -05:00
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#if CONFIG_ULP_COPROC_TYPE_FSM
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2020-07-22 03:23:39 -04:00
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
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2021-02-25 22:44:26 -05:00
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2020-09-29 06:35:47 -04:00
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// Fix failure on ESP32 when running alone; passes when the previous test is run before this one
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2020-11-10 02:40:01 -05:00
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TEST_CASE("Can wake up from automatic light sleep by GPIO", "[pm][ignore]")
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2018-04-12 06:18:45 -04:00
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{
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2022-01-21 04:13:48 -05:00
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assert(CONFIG_ULP_COPROC_RESERVE_MEM >= 16 && "this test needs ULP_COPROC_RESERVE_MEM option set in menuconfig");
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2018-04-12 06:18:45 -04:00
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/* Set up GPIO used to wake up RTC */
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const int ext1_wakeup_gpio = 25;
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const int ext_rtc_io = RTCIO_GPIO25_CHANNEL;
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TEST_ESP_OK(rtc_gpio_init(ext1_wakeup_gpio));
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rtc_gpio_set_direction(ext1_wakeup_gpio, RTC_GPIO_MODE_INPUT_OUTPUT);
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rtc_gpio_set_level(ext1_wakeup_gpio, 0);
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2022-01-02 03:19:49 -05:00
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/* Enable wakeup */
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2018-04-12 06:18:45 -04:00
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TEST_ESP_OK(esp_sleep_enable_ext1_wakeup(1ULL << ext1_wakeup_gpio, ESP_EXT1_WAKEUP_ANY_HIGH));
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/* To simplify test environment, we'll use a ULP program to set GPIO high */
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ulp_insn_t ulp_code[] = {
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2022-01-02 03:19:49 -05:00
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I_DELAY(65535), /* about 8ms, given 8MHz ULP clock */
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I_WR_REG_BIT(RTC_CNTL_HOLD_FORCE_REG, RTC_CNTL_PDAC1_HOLD_FORCE_S, 0),
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I_WR_REG_BIT(RTC_GPIO_OUT_REG, ext_rtc_io + RTC_GPIO_OUT_DATA_S, 1),
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I_DELAY(1000),
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I_WR_REG_BIT(RTC_GPIO_OUT_REG, ext_rtc_io + RTC_GPIO_OUT_DATA_S, 0),
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I_WR_REG_BIT(RTC_CNTL_HOLD_FORCE_REG, RTC_CNTL_PDAC1_HOLD_FORCE_S, 1),
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I_END(),
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I_HALT()
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2018-04-12 06:18:45 -04:00
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};
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TEST_ESP_OK(ulp_set_wakeup_period(0, 1000 /* us */));
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2022-01-02 03:19:49 -05:00
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size_t size = sizeof(ulp_code) / sizeof(ulp_insn_t);
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2018-04-12 06:18:45 -04:00
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TEST_ESP_OK(ulp_process_macros_and_load(0, ulp_code, &size));
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light_sleep_enable();
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2019-07-25 11:11:31 -04:00
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int rtcio_num = rtc_io_number_get(ext1_wakeup_gpio);
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2018-04-12 06:18:45 -04:00
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for (int i = 0; i < 10; ++i) {
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/* Set GPIO low */
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2019-07-25 11:11:31 -04:00
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REG_CLR_BIT(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].hold_force);
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2018-04-12 06:18:45 -04:00
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rtc_gpio_set_level(ext1_wakeup_gpio, 0);
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2019-07-25 11:11:31 -04:00
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REG_SET_BIT(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].hold_force);
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2018-04-12 06:18:45 -04:00
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/* Wait for the next tick */
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vTaskDelay(1);
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/* Start ULP program */
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|
|
ulp_run(0);
|
|
|
|
|
|
|
|
const int delay_ms = 200;
|
|
|
|
const int delay_ticks = delay_ms / portTICK_PERIOD_MS;
|
|
|
|
|
|
|
|
int64_t start_rtc = esp_clk_rtc_time();
|
|
|
|
int64_t start_hs = esp_timer_get_time();
|
|
|
|
uint32_t start_tick = xTaskGetTickCount();
|
|
|
|
/* Will enter sleep here */
|
|
|
|
vTaskDelay(delay_ticks);
|
|
|
|
int64_t end_rtc = esp_clk_rtc_time();
|
|
|
|
int64_t end_hs = esp_timer_get_time();
|
|
|
|
uint32_t end_tick = xTaskGetTickCount();
|
|
|
|
|
|
|
|
printf("%lld %lld %u\n", end_rtc - start_rtc, end_hs - start_hs, end_tick - start_tick);
|
|
|
|
|
|
|
|
TEST_ASSERT_INT32_WITHIN(3, delay_ticks, end_tick - start_tick);
|
|
|
|
TEST_ASSERT_INT32_WITHIN(2 * portTICK_PERIOD_MS * 1000, delay_ms * 1000, end_hs - start_hs);
|
|
|
|
TEST_ASSERT_INT32_WITHIN(2 * portTICK_PERIOD_MS * 1000, delay_ms * 1000, end_rtc - start_rtc);
|
|
|
|
}
|
2019-07-25 11:11:31 -04:00
|
|
|
REG_CLR_BIT(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].hold_force);
|
2018-04-12 06:18:45 -04:00
|
|
|
rtc_gpio_deinit(ext1_wakeup_gpio);
|
|
|
|
|
|
|
|
light_sleep_disable();
|
|
|
|
}
|
2021-02-25 22:44:26 -05:00
|
|
|
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
|
2022-01-21 04:13:48 -05:00
|
|
|
#endif //CONFIG_ULP_COPROC_TYPE_FSM
|
2021-02-25 22:44:26 -05:00
|
|
|
|
2018-04-12 06:18:45 -04:00
|
|
|
typedef struct {
|
|
|
|
int delay_us;
|
|
|
|
int result;
|
|
|
|
SemaphoreHandle_t done;
|
|
|
|
} delay_test_arg_t;
|
|
|
|
|
2022-01-02 03:19:49 -05:00
|
|
|
static void test_delay_task(void *p)
|
2018-04-12 06:18:45 -04:00
|
|
|
{
|
2022-01-02 03:19:49 -05:00
|
|
|
delay_test_arg_t *arg = (delay_test_arg_t *) p;
|
2018-04-12 06:18:45 -04:00
|
|
|
vTaskDelay(1);
|
|
|
|
|
|
|
|
uint64_t start = esp_clk_rtc_time();
|
|
|
|
vTaskDelay(arg->delay_us / portTICK_PERIOD_MS / 1000);
|
|
|
|
uint64_t stop = esp_clk_rtc_time();
|
|
|
|
|
|
|
|
arg->result = (int) (stop - start);
|
|
|
|
xSemaphoreGive(arg->done);
|
|
|
|
vTaskDelete(NULL);
|
|
|
|
}
|
|
|
|
|
|
|
|
TEST_CASE("vTaskDelay duration is correct with light sleep enabled", "[pm]")
|
|
|
|
{
|
|
|
|
light_sleep_enable();
|
2022-01-02 03:19:49 -05:00
|
|
|
SemaphoreHandle_t done_sem = xSemaphoreCreateBinary();
|
|
|
|
TEST_ASSERT_NOT_NULL(done_sem);
|
2018-04-12 06:18:45 -04:00
|
|
|
|
|
|
|
delay_test_arg_t args = {
|
2022-01-02 03:19:49 -05:00
|
|
|
.done = done_sem,
|
2018-04-12 06:18:45 -04:00
|
|
|
};
|
|
|
|
|
|
|
|
const int delays[] = { 10, 20, 50, 100, 150, 200, 250 };
|
|
|
|
const int delays_count = sizeof(delays) / sizeof(delays[0]);
|
|
|
|
|
|
|
|
for (int i = 0; i < delays_count; ++i) {
|
|
|
|
int delay_ms = delays[i];
|
|
|
|
args.delay_us = delay_ms * 1000;
|
|
|
|
|
2022-01-02 03:19:49 -05:00
|
|
|
xTaskCreatePinnedToCore(test_delay_task, "", 2048, (void *) &args, 3, NULL, 0);
|
|
|
|
TEST_ASSERT( xSemaphoreTake(done_sem, delay_ms * 10 / portTICK_PERIOD_MS) );
|
2018-04-12 06:18:45 -04:00
|
|
|
printf("CPU0: %d %d\n", args.delay_us, args.result);
|
|
|
|
TEST_ASSERT_INT32_WITHIN(1000 * portTICK_PERIOD_MS * 2, args.delay_us, args.result);
|
|
|
|
|
|
|
|
#if portNUM_PROCESSORS == 2
|
2022-01-02 03:19:49 -05:00
|
|
|
xTaskCreatePinnedToCore(test_delay_task, "", 2048, (void *) &args, 3, NULL, 1);
|
|
|
|
TEST_ASSERT( xSemaphoreTake(done_sem, delay_ms * 10 / portTICK_PERIOD_MS) );
|
2018-04-12 06:18:45 -04:00
|
|
|
printf("CPU1: %d %d\n", args.delay_us, args.result);
|
|
|
|
TEST_ASSERT_INT32_WITHIN(1000 * portTICK_PERIOD_MS * 2, args.delay_us, args.result);
|
|
|
|
#endif
|
|
|
|
}
|
2022-01-02 03:19:49 -05:00
|
|
|
vSemaphoreDelete(done_sem);
|
2018-04-12 06:18:45 -04:00
|
|
|
|
|
|
|
light_sleep_disable();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* This test is similar to the one in test_esp_timer.c, but since we can't use
|
|
|
|
* ref_clock, this test uses RTC clock for timing. Also enables automatic
|
|
|
|
* light sleep.
|
|
|
|
*/
|
|
|
|
TEST_CASE("esp_timer produces correct delays with light sleep", "[pm]")
|
|
|
|
{
|
|
|
|
// no, we can't make this a const size_t (§6.7.5.2)
|
|
|
|
#define NUM_INTERVALS 16
|
|
|
|
|
|
|
|
typedef struct {
|
|
|
|
esp_timer_handle_t timer;
|
|
|
|
size_t cur_interval;
|
|
|
|
int intervals[NUM_INTERVALS];
|
|
|
|
int64_t t_start;
|
|
|
|
SemaphoreHandle_t done;
|
|
|
|
} test_args_t;
|
|
|
|
|
2022-01-02 03:19:49 -05:00
|
|
|
void timer_func(void *arg) {
|
|
|
|
test_args_t *p_args = (test_args_t *) arg;
|
2018-04-12 06:18:45 -04:00
|
|
|
int64_t t_end = esp_clk_rtc_time();
|
|
|
|
int32_t ms_diff = (t_end - p_args->t_start) / 1000;
|
2022-11-29 05:58:54 -05:00
|
|
|
printf("timer #%d %"PRIi32"ms\n", p_args->cur_interval, ms_diff);
|
2018-04-12 06:18:45 -04:00
|
|
|
p_args->intervals[p_args->cur_interval++] = ms_diff;
|
|
|
|
// Deliberately make timer handler run longer.
|
|
|
|
// We check that this doesn't affect the result.
|
2022-01-02 03:19:49 -05:00
|
|
|
esp_rom_delay_us(10 * 1000);
|
2018-04-12 06:18:45 -04:00
|
|
|
if (p_args->cur_interval == NUM_INTERVALS) {
|
|
|
|
printf("done\n");
|
|
|
|
TEST_ESP_OK(esp_timer_stop(p_args->timer));
|
|
|
|
xSemaphoreGive(p_args->done);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
light_sleep_enable();
|
|
|
|
|
|
|
|
const int delay_ms = 100;
|
|
|
|
test_args_t args = {0};
|
|
|
|
esp_timer_handle_t timer1;
|
|
|
|
esp_timer_create_args_t create_args = {
|
2022-01-02 03:19:49 -05:00
|
|
|
.callback = timer_func,
|
|
|
|
.arg = &args,
|
|
|
|
.name = "timer1",
|
2018-04-12 06:18:45 -04:00
|
|
|
};
|
|
|
|
TEST_ESP_OK(esp_timer_create(&create_args, &timer1));
|
|
|
|
|
|
|
|
args.timer = timer1;
|
|
|
|
args.t_start = esp_clk_rtc_time();
|
|
|
|
args.done = xSemaphoreCreateBinary();
|
|
|
|
TEST_ESP_OK(esp_timer_start_periodic(timer1, delay_ms * 1000));
|
|
|
|
|
|
|
|
TEST_ASSERT(xSemaphoreTake(args.done, delay_ms * NUM_INTERVALS * 2));
|
|
|
|
|
|
|
|
TEST_ASSERT_EQUAL_UINT32(NUM_INTERVALS, args.cur_interval);
|
|
|
|
for (size_t i = 0; i < NUM_INTERVALS; ++i) {
|
|
|
|
TEST_ASSERT_INT32_WITHIN(portTICK_PERIOD_MS, (i + 1) * delay_ms, args.intervals[i]);
|
|
|
|
}
|
|
|
|
|
|
|
|
TEST_ESP_OK( esp_timer_dump(stdout) );
|
|
|
|
|
|
|
|
TEST_ESP_OK( esp_timer_delete(timer1) );
|
|
|
|
vSemaphoreDelete(args.done);
|
|
|
|
|
|
|
|
light_sleep_disable();
|
|
|
|
|
|
|
|
#undef NUM_INTERVALS
|
|
|
|
}
|
|
|
|
|
2021-04-19 08:48:16 -04:00
|
|
|
static void timer_cb1(void *arg)
|
|
|
|
{
|
2022-01-02 03:19:49 -05:00
|
|
|
++*((int *) arg);
|
2021-04-19 08:48:16 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
TEST_CASE("esp_timer with SKIP_UNHANDLED_EVENTS does not wake up CPU from sleep", "[pm]")
|
|
|
|
{
|
|
|
|
int count_calls = 0;
|
|
|
|
int timer_interval_ms = 50;
|
|
|
|
|
|
|
|
const esp_timer_create_args_t timer_args = {
|
2022-01-02 03:19:49 -05:00
|
|
|
.name = "timer_cb1",
|
|
|
|
.arg = &count_calls,
|
|
|
|
.callback = &timer_cb1,
|
|
|
|
.skip_unhandled_events = true,
|
2021-04-19 08:48:16 -04:00
|
|
|
};
|
|
|
|
esp_timer_handle_t periodic_timer;
|
|
|
|
esp_timer_create(&timer_args, &periodic_timer);
|
|
|
|
TEST_ESP_OK(esp_timer_start_periodic(periodic_timer, timer_interval_ms * 1000));
|
|
|
|
|
|
|
|
light_sleep_enable();
|
|
|
|
|
|
|
|
const unsigned count_delays = 5;
|
|
|
|
unsigned i = count_delays;
|
|
|
|
while (i-- > 0) {
|
|
|
|
vTaskDelay(pdMS_TO_TICKS(500));
|
|
|
|
}
|
|
|
|
TEST_ASSERT_INT_WITHIN(1, count_delays, count_calls);
|
|
|
|
|
|
|
|
light_sleep_disable();
|
|
|
|
|
|
|
|
TEST_ESP_OK(esp_timer_stop(periodic_timer));
|
|
|
|
TEST_ESP_OK(esp_timer_dump(stdout));
|
|
|
|
TEST_ESP_OK(esp_timer_delete(periodic_timer));
|
|
|
|
}
|
|
|
|
|
2018-04-12 06:18:45 -04:00
|
|
|
#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
|
|
|
|
|
2018-03-26 22:53:03 -04:00
|
|
|
#endif // CONFIG_PM_ENABLE
|