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esp-idf/components/efuse/esp32c3/include/esp_efuse_table.h

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efuse: Updates common_efuse_table for all chips
2021-05-21 07:46:59 -04:00
/*
remove esp32c3 unsupported efuse field
2022-01-19 02:58:30 -05:00
* SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
efuse: Updates common_efuse_table for all chips
2021-05-21 07:46:59 -04:00
*
* SPDX-License-Identifier: Apache-2.0
*/
efuse: Add support ESP32-C3 Updated: - CSV eFuse table - Kconfig - efuse_table_gen.py - UTs - espefuse.py efuse/c3: Fix the burn order of BLOCKs (MAX->0) efuse/c3: Support efuse API with keys, protection, purpose bits tool/ci: Adds test_efuse_table_on_host for esp32s3 and esp32c3
2020-06-23 22:52:51 -04:00
#ifdef __cplusplus
extern "C" {
#endif
efuse: update efuse name
2022-05-28 10:03:16 -04:00
// md5_digest_table 6614a99de35023cf9ba3849a2b80e9e7
efuse: Add support ESP32-C3 Updated: - CSV eFuse table - Kconfig - efuse_table_gen.py - UTs - espefuse.py efuse/c3: Fix the burn order of BLOCKs (MAX->0) efuse/c3: Support efuse API with keys, protection, purpose bits tool/ci: Adds test_efuse_table_on_host for esp32s3 and esp32c3
2020-06-23 22:52:51 -04:00
// This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
// If you want to change some fields, you need to change esp_efuse_table.csv file
// then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
// To show efuse_table run the command 'show_efuse_table'.
efuse: Updates common_efuse_table for all chips
2021-05-21 07:46:59 -04:00
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS[];
efuse: Add support ESP32-C3 Updated: - CSV eFuse table - Kconfig - efuse_table_gen.py - UTs - espefuse.py efuse/c3: Fix the burn order of BLOCKs (MAX->0) efuse/c3: Support efuse API with keys, protection, purpose bits tool/ci: Adds test_efuse_table_on_host for esp32s3 and esp32c3
2020-06-23 22:52:51 -04:00
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RD_DIS[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_GROUP_1[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_GROUP_2[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE0[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE1[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE2[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY0_PURPOSE[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY1_PURPOSE[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY2_PURPOSE[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY3_PURPOSE[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY4_PURPOSE[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY5_PURPOSE[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_EN[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_GROUP_3[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLK1[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SYS_DATA_PART1[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_USER_DATA[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY0[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY1[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY2[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY3[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY4[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY5[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SYS_DATA_PART2[];
efuse: Updates common_efuse_table for all chips
2021-05-21 07:46:59 -04:00
extern const esp_efuse_desc_t* ESP_EFUSE_RD_DIS[];
efuse: Add support ESP32-C3 Updated: - CSV eFuse table - Kconfig - efuse_table_gen.py - UTs - espefuse.py efuse/c3: Fix the burn order of BLOCKs (MAX->0) efuse/c3: Support efuse API with keys, protection, purpose bits tool/ci: Adds test_efuse_table_on_host for esp32s3 and esp32c3
2020-06-23 22:52:51 -04:00
extern const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY0[];
extern const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY1[];
extern const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY2[];
extern const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY3[];
extern const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY4[];
extern const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY5[];
extern const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_SYS_DATA_PART2[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_ICACHE[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_JTAG[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_ICACHE[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DEVICE[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_FORCE_DOWNLOAD[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_CAN[];
extern const esp_efuse_desc_t* ESP_EFUSE_JTAG_SEL_ENABLE[];
extern const esp_efuse_desc_t* ESP_EFUSE_SOFT_DIS_JTAG[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_PAD_JTAG[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT[];
extern const esp_efuse_desc_t* ESP_EFUSE_USB_DREFH[];
extern const esp_efuse_desc_t* ESP_EFUSE_USB_DREFL[];
extern const esp_efuse_desc_t* ESP_EFUSE_USB_EXCHG_PINS[];
extern const esp_efuse_desc_t* ESP_EFUSE_VDD_SPI_AS_GPIO[];
extern const esp_efuse_desc_t* ESP_EFUSE_BTLC_GPIO_ENABLE[];
extern const esp_efuse_desc_t* ESP_EFUSE_POWERGLITCH_EN[];
extern const esp_efuse_desc_t* ESP_EFUSE_POWER_GLITCH_DSENSE[];
extern const esp_efuse_desc_t* ESP_EFUSE_WDT_DELAY_SEL[];
extern const esp_efuse_desc_t* ESP_EFUSE_SPI_BOOT_CRYPT_CNT[];
extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE0[];
extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE1[];
extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE2[];
extern const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_0[];
extern const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_1[];
extern const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_2[];
extern const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_3[];
extern const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_4[];
extern const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_5[];
extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_EN[];
extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE[];
extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_TPUW[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MODE[];
efuse: update efuse name
2022-05-28 10:03:16 -04:00
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DIRECT_BOOT[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[];
efuse: Add support ESP32-C3 Updated: - CSV eFuse table - Kconfig - efuse_table_gen.py - UTs - espefuse.py efuse/c3: Fix the burn order of BLOCKs (MAX->0) efuse/c3: Support efuse API with keys, protection, purpose bits tool/ci: Adds test_efuse_table_on_host for esp32s3 and esp32c3
2020-06-23 22:52:51 -04:00
extern const esp_efuse_desc_t* ESP_EFUSE_ENABLE_SECURITY_DOWNLOAD[];
extern const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CONTROL[];
extern const esp_efuse_desc_t* ESP_EFUSE_FORCE_SEND_RESUME[];
extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_VERSION[];
efuse: Adds ERR_RST_ENABLE efuse for C3 and S3 Closes https://github.com/espressif/esp-idf/issues/8357
2022-02-28 08:16:24 -05:00
extern const esp_efuse_desc_t* ESP_EFUSE_ERR_RST_ENABLE[];
efuse: Add support ESP32-C3 Updated: - CSV eFuse table - Kconfig - efuse_table_gen.py - UTs - espefuse.py efuse/c3: Fix the burn order of BLOCKs (MAX->0) efuse/c3: Support efuse API with keys, protection, purpose bits tool/ci: Adds test_efuse_table_on_host for esp32s3 and esp32c3
2020-06-23 22:52:51 -04:00
extern const esp_efuse_desc_t* ESP_EFUSE_MAC_FACTORY[];
extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_CLK[];
extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_Q_D1[];
extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D_D0[];
extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_CS[];
extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_HD_D3[];
extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_WP_D2[];
extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_DQS[];
extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D4[];
extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D5[];
extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D6[];
extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D7[];
efuse(esp32c3): Adds getting chip_revision and chip_pkg
2021-01-19 06:55:14 -05:00
extern const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION[];
extern const esp_efuse_desc_t* ESP_EFUSE_PKG_VERSION[];
extern const esp_efuse_desc_t* ESP_EFUSE_BLOCK1_VERSION[];
extern const esp_efuse_desc_t* ESP_EFUSE_OPTIONAL_UNIQUE_ID[];
system: reset dma when soft reset
2020-12-22 23:29:57 -05:00
extern const esp_efuse_desc_t* ESP_EFUSE_BLOCK2_VERSION[];
extern const esp_efuse_desc_t* ESP_EFUSE_TEMP_CALIB[];
extern const esp_efuse_desc_t* ESP_EFUSE_OCODE[];
extern const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN0[];
extern const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN1[];
extern const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN2[];
extern const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN3[];
extern const esp_efuse_desc_t* ESP_EFUSE_ADC1_CAL_VOL_ATTEN0[];
extern const esp_efuse_desc_t* ESP_EFUSE_ADC1_CAL_VOL_ATTEN1[];
extern const esp_efuse_desc_t* ESP_EFUSE_ADC1_CAL_VOL_ATTEN2[];
extern const esp_efuse_desc_t* ESP_EFUSE_ADC1_CAL_VOL_ATTEN3[];
efuse: Add support ESP32-C3 Updated: - CSV eFuse table - Kconfig - efuse_table_gen.py - UTs - espefuse.py efuse/c3: Fix the burn order of BLOCKs (MAX->0) efuse/c3: Support efuse API with keys, protection, purpose bits tool/ci: Adds test_efuse_table_on_host for esp32s3 and esp32c3
2020-06-23 22:52:51 -04:00
extern const esp_efuse_desc_t* ESP_EFUSE_USER_DATA[];
efuse: Add CUSTOM_MAC address for ESP32-C3/-S2/-S3/-H2
2021-07-19 06:16:42 -04:00
extern const esp_efuse_desc_t* ESP_EFUSE_USER_DATA_MAC_CUSTOM[];
efuse: Add support ESP32-C3 Updated: - CSV eFuse table - Kconfig - efuse_table_gen.py - UTs - espefuse.py efuse/c3: Fix the burn order of BLOCKs (MAX->0) efuse/c3: Support efuse API with keys, protection, purpose bits tool/ci: Adds test_efuse_table_on_host for esp32s3 and esp32c3
2020-06-23 22:52:51 -04:00
extern const esp_efuse_desc_t* ESP_EFUSE_KEY0[];
extern const esp_efuse_desc_t* ESP_EFUSE_KEY1[];
extern const esp_efuse_desc_t* ESP_EFUSE_KEY2[];
extern const esp_efuse_desc_t* ESP_EFUSE_KEY3[];
extern const esp_efuse_desc_t* ESP_EFUSE_KEY4[];
extern const esp_efuse_desc_t* ESP_EFUSE_KEY5[];
extern const esp_efuse_desc_t* ESP_EFUSE_SYS_DATA_PART2[];
ESP32C3: auto adjust voltage dbias storing in efuse and open glitch reset for ECO3 1. add some efuse api to get rtc & digital voltage 2. set dig_rtc voltage to a fix value storing in efuse no mater which cpu frequency 3. modify hardware code in bootloader to fit all c3 ECO3 version
2021-04-27 22:32:08 -04:00
extern const esp_efuse_desc_t* ESP_EFUSE_K_RTC_LDO[];
extern const esp_efuse_desc_t* ESP_EFUSE_K_DIG_LDO[];
extern const esp_efuse_desc_t* ESP_EFUSE_V_RTC_DBIAS20[];
extern const esp_efuse_desc_t* ESP_EFUSE_V_DIG_DBIAS20[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIG_DBIAS_HVT[];
extern const esp_efuse_desc_t* ESP_EFUSE_THRES_HVT[];
efuse: Add support ESP32-C3 Updated: - CSV eFuse table - Kconfig - efuse_table_gen.py - UTs - espefuse.py efuse/c3: Fix the burn order of BLOCKs (MAX->0) efuse/c3: Support efuse API with keys, protection, purpose bits tool/ci: Adds test_efuse_table_on_host for esp32s3 and esp32c3
2020-06-23 22:52:51 -04:00
#ifdef __cplusplus
}
#endif
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