2022-06-03 10:00:50 -04:00
|
|
|
/*
|
2023-06-14 22:28:25 -04:00
|
|
|
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
|
2022-06-03 10:00:50 -04:00
|
|
|
*
|
|
|
|
* SPDX-License-Identifier: Apache-2.0
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include <stddef.h>
|
|
|
|
#include <stdlib.h>
|
|
|
|
#include <stdio.h>
|
|
|
|
#include <string.h>
|
|
|
|
|
|
|
|
#include "esp_random.h"
|
2022-10-27 08:24:52 -04:00
|
|
|
#include "esp_heap_caps.h"
|
|
|
|
#include "esp_heap_caps_init.h"
|
2022-06-03 10:00:50 -04:00
|
|
|
#include <esp_mac.h>
|
|
|
|
|
|
|
|
#include "sdkconfig.h"
|
|
|
|
|
|
|
|
#include "nimble/nimble_port.h"
|
|
|
|
#include "nimble/nimble_port_freertos.h"
|
|
|
|
|
|
|
|
#ifdef ESP_PLATFORM
|
|
|
|
#include "esp_log.h"
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
2023-08-09 05:41:27 -04:00
|
|
|
#include "private/esp_coexist_internal.h"
|
2022-06-03 10:00:50 -04:00
|
|
|
#endif
|
|
|
|
|
2022-06-17 09:17:13 -04:00
|
|
|
#include "nimble/nimble_npl_os.h"
|
2022-06-03 10:00:50 -04:00
|
|
|
#include "nimble/ble_hci_trans.h"
|
2022-06-17 09:17:13 -04:00
|
|
|
#include "os/endian.h"
|
2022-06-03 10:00:50 -04:00
|
|
|
|
|
|
|
#include "esp_bt.h"
|
|
|
|
#include "esp_intr_alloc.h"
|
|
|
|
#include "esp_sleep.h"
|
|
|
|
#include "esp_pm.h"
|
|
|
|
#include "esp_phy_init.h"
|
|
|
|
#include "soc/syscon_reg.h"
|
|
|
|
#include "soc/modem_clkrst_reg.h"
|
|
|
|
#include "esp_private/periph_ctrl.h"
|
2022-06-17 09:17:13 -04:00
|
|
|
#include "hci_uart.h"
|
|
|
|
#include "bt_osi_mem.h"
|
|
|
|
|
2022-06-03 10:00:50 -04:00
|
|
|
#ifdef CONFIG_BT_BLUEDROID_ENABLED
|
|
|
|
#include "hci/hci_hal.h"
|
|
|
|
#endif
|
|
|
|
|
2023-09-08 03:50:28 -04:00
|
|
|
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
|
|
|
|
#include "esp_private/sleep_modem.h"
|
|
|
|
#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
|
|
|
|
|
2022-06-03 10:00:50 -04:00
|
|
|
#include "freertos/FreeRTOS.h"
|
|
|
|
#include "freertos/task.h"
|
|
|
|
|
|
|
|
#include "esp_private/periph_ctrl.h"
|
2022-06-08 03:48:41 -04:00
|
|
|
#include "esp_sleep.h"
|
2022-06-03 10:00:50 -04:00
|
|
|
|
2022-11-24 23:35:36 -05:00
|
|
|
#include "soc/syscon_reg.h"
|
|
|
|
#include "soc/dport_access.h"
|
2023-06-14 22:28:25 -04:00
|
|
|
|
|
|
|
#include "hal/efuse_ll.h"
|
2022-06-03 10:00:50 -04:00
|
|
|
/* Macro definition
|
|
|
|
************************************************************************
|
|
|
|
*/
|
|
|
|
|
|
|
|
#define NIMBLE_PORT_LOG_TAG "BLE_INIT"
|
|
|
|
#define OSI_COEX_VERSION 0x00010006
|
|
|
|
#define OSI_COEX_MAGIC_VALUE 0xFADEBEAD
|
|
|
|
|
2022-10-26 09:20:10 -04:00
|
|
|
#define EXT_FUNC_VERSION 0x20221122
|
2022-06-03 10:00:50 -04:00
|
|
|
#define EXT_FUNC_MAGIC_VALUE 0xA5A5A5A5
|
|
|
|
|
2022-10-12 23:47:33 -04:00
|
|
|
#define BT_ASSERT_PRINT ets_printf
|
2022-08-08 09:57:22 -04:00
|
|
|
|
|
|
|
#ifdef CONFIG_BT_BLUEDROID_ENABLED
|
|
|
|
/* ACL_DATA_MBUF_LEADINGSPCAE: The leadingspace in user info header for ACL data */
|
|
|
|
#define ACL_DATA_MBUF_LEADINGSPCAE 4
|
2023-08-17 23:55:48 -04:00
|
|
|
#endif // CONFIG_BT_BLUEDROID_ENABLED
|
|
|
|
|
2022-06-03 10:00:50 -04:00
|
|
|
/* Types definition
|
|
|
|
************************************************************************
|
|
|
|
*/
|
|
|
|
struct osi_coex_funcs_t {
|
|
|
|
uint32_t _magic;
|
|
|
|
uint32_t _version;
|
|
|
|
void (* _coex_wifi_sleep_set)(bool sleep);
|
|
|
|
int (* _coex_core_ble_conn_dyn_prio_get)(bool *low, bool *high);
|
|
|
|
void (* _coex_schm_status_bit_set)(uint32_t type, uint32_t status);
|
|
|
|
void (* _coex_schm_status_bit_clear)(uint32_t type, uint32_t status);
|
|
|
|
};
|
|
|
|
|
|
|
|
struct ext_funcs_t {
|
|
|
|
uint32_t ext_version;
|
|
|
|
int (*_esp_intr_alloc)(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle);
|
|
|
|
int (*_esp_intr_free)(void **ret_handle);
|
|
|
|
void *(* _malloc)(size_t size);
|
|
|
|
void (*_free)(void *p);
|
|
|
|
void (*_hal_uart_start_tx)(int);
|
2022-06-17 09:17:13 -04:00
|
|
|
int (*_hal_uart_init_cbs)(int, hci_uart_tx_char, hci_uart_tx_done, hci_uart_rx_char, void *);
|
|
|
|
int (*_hal_uart_config)(int, int32_t, uint8_t, uint8_t, uart_parity_t, uart_hw_flowcontrol_t);
|
2022-06-03 10:00:50 -04:00
|
|
|
int (*_hal_uart_close)(int);
|
|
|
|
void (*_hal_uart_blocking_tx)(int, uint8_t);
|
|
|
|
int (*_hal_uart_init)(int, void *);
|
|
|
|
int (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
|
|
|
|
void (* _task_delete)(void *task_handle);
|
|
|
|
void (*_osi_assert)(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2);
|
|
|
|
uint32_t (* _os_random)(void);
|
|
|
|
int (* _ecc_gen_key_pair)(uint8_t *public, uint8_t *priv);
|
|
|
|
int (* _ecc_gen_dh_key)(const uint8_t *remote_pub_key_x, const uint8_t *remote_pub_key_y, const uint8_t *local_priv_key, uint8_t *dhkey);
|
|
|
|
void (* _esp_reset_rpa_moudle)(void);
|
2022-10-26 09:20:10 -04:00
|
|
|
void (* _esp_bt_track_pll_cap)(void);
|
2022-06-03 10:00:50 -04:00
|
|
|
uint32_t magic;
|
|
|
|
};
|
|
|
|
|
2023-08-17 23:55:48 -04:00
|
|
|
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
|
|
|
typedef void (*interface_func_t) (uint32_t len, const uint8_t*addr, bool end);
|
|
|
|
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
2022-06-03 10:00:50 -04:00
|
|
|
|
|
|
|
/* External functions or variables
|
|
|
|
************************************************************************
|
|
|
|
*/
|
|
|
|
extern int ble_osi_coex_funcs_register(struct osi_coex_funcs_t *coex_funcs);
|
2022-06-17 09:17:13 -04:00
|
|
|
extern int ble_controller_init(esp_bt_controller_config_t *cfg);
|
2023-08-17 23:55:48 -04:00
|
|
|
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
2023-10-18 04:51:42 -04:00
|
|
|
extern int ble_log_init_async(interface_func_t bt_controller_log_interface, bool task_create, uint8_t buffers, uint32_t *bufs_size);
|
2023-08-17 23:55:48 -04:00
|
|
|
extern int ble_log_deinit_async(void);
|
|
|
|
extern void ble_log_async_output_dump_all(bool output);
|
2023-12-04 00:19:01 -05:00
|
|
|
extern void esp_panic_handler_reconfigure_wdts(uint32_t timeout_ms);
|
2023-08-17 23:55:48 -04:00
|
|
|
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
2022-06-03 10:00:50 -04:00
|
|
|
extern int ble_controller_deinit(void);
|
|
|
|
extern int ble_controller_enable(uint8_t mode);
|
|
|
|
extern int ble_controller_disable(void);
|
|
|
|
extern int esp_register_ext_funcs (struct ext_funcs_t *);
|
|
|
|
extern void esp_unregister_ext_funcs (void);
|
|
|
|
extern int esp_ble_ll_set_public_addr(const uint8_t *addr);
|
|
|
|
extern int esp_register_npl_funcs (struct npl_funcs_t *p_npl_func);
|
|
|
|
extern void esp_unregister_npl_funcs (void);
|
|
|
|
extern void npl_freertos_mempool_deinit(void);
|
|
|
|
extern void bt_bb_v2_init_cmplx(uint8_t i);
|
|
|
|
extern int os_msys_buf_alloc(void);
|
|
|
|
extern uint32_t r_os_cputime_get32(void);
|
|
|
|
extern uint32_t r_os_cputime_ticks_to_usecs(uint32_t ticks);
|
2022-06-08 03:48:41 -04:00
|
|
|
extern void r_ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg, void *w_arg, uint32_t us_to_enabled);
|
|
|
|
extern void r_ble_rtc_wake_up_state_clr(void);
|
2023-09-08 03:50:28 -04:00
|
|
|
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
|
|
|
|
extern void esp_ble_set_wakeup_overhead(uint32_t overhead);
|
|
|
|
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
|
2022-06-03 10:00:50 -04:00
|
|
|
extern int os_msys_init(void);
|
|
|
|
extern void os_msys_buf_free(void);
|
2022-06-24 08:59:41 -04:00
|
|
|
extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x,
|
|
|
|
const uint8_t *peer_pub_key_y,
|
|
|
|
const uint8_t *our_priv_key, uint8_t *out_dhkey);
|
|
|
|
extern int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv);
|
2022-08-08 09:57:22 -04:00
|
|
|
extern int ble_txpwr_set(esp_ble_enhanced_power_type_t power_type, uint16_t handle, int power_level);
|
|
|
|
extern int ble_txpwr_get(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
|
2022-12-06 07:54:59 -05:00
|
|
|
extern int ble_get_npl_element_info(esp_bt_controller_config_t *cfg, ble_npl_count_info_t * npl_info);
|
2023-05-11 23:59:00 -04:00
|
|
|
extern void bt_track_pll_cap(void);
|
2023-10-08 04:08:47 -04:00
|
|
|
|
|
|
|
#if CONFIG_BT_RELEASE_IRAM
|
|
|
|
extern uint32_t _iram_bt_text_start;
|
|
|
|
extern uint32_t _bss_bt_end;
|
|
|
|
#else
|
2022-10-27 08:24:52 -04:00
|
|
|
extern uint32_t _bt_bss_end;
|
2023-10-08 04:08:47 -04:00
|
|
|
extern uint32_t _bt_controller_data_start;
|
|
|
|
#endif
|
2022-06-03 10:00:50 -04:00
|
|
|
|
|
|
|
/* Local Function Declaration
|
|
|
|
*********************************************************************
|
|
|
|
*/
|
|
|
|
static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status);
|
|
|
|
static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status);
|
|
|
|
static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
|
|
|
|
static void task_delete_wrapper(void *task_handle);
|
2022-06-17 09:17:13 -04:00
|
|
|
#if CONFIG_BT_LE_HCI_INTERFACE_USE_UART
|
|
|
|
static void hci_uart_start_tx_wrapper(int uart_no);
|
|
|
|
static int hci_uart_init_cbs_wrapper(int uart_no, hci_uart_tx_char tx_func,
|
|
|
|
hci_uart_tx_done tx_done, hci_uart_rx_char rx_func, void *arg);
|
|
|
|
static int hci_uart_config_wrapper(int uart_no, int32_t speed, uint8_t databits, uint8_t stopbits,
|
|
|
|
uart_parity_t parity, uart_hw_flowcontrol_t flow_ctl);
|
|
|
|
static int hci_uart_close_wrapper(int uart_no);
|
|
|
|
static void hci_uart_blocking_tx_wrapper(int port, uint8_t data);
|
|
|
|
static int hci_uart_init_wrapper(int uart_no, void *cfg);
|
2023-08-17 23:55:48 -04:00
|
|
|
#endif // CONFIG_BT_LE_HCI_INTERFACE_USE_UART
|
|
|
|
static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler,
|
|
|
|
void *arg, void **ret_handle_in);
|
2022-06-03 10:00:50 -04:00
|
|
|
static int esp_intr_free_wrapper(void **ret_handle);
|
|
|
|
static void osi_assert_wrapper(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2);
|
|
|
|
static uint32_t osi_random_wrapper(void);
|
|
|
|
static void esp_reset_rpa_moudle(void);
|
2023-05-12 00:29:12 -04:00
|
|
|
static int esp_ecc_gen_key_pair(uint8_t *pub, uint8_t *priv);
|
|
|
|
static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer_pub_key_y,
|
|
|
|
const uint8_t *our_priv_key, uint8_t *out_dhkey);
|
2023-08-17 23:55:48 -04:00
|
|
|
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
|
|
|
static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, bool end);
|
|
|
|
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
2022-06-03 10:00:50 -04:00
|
|
|
/* Local variable definition
|
|
|
|
***************************************************************************
|
|
|
|
*/
|
|
|
|
/* Static variable declare */
|
|
|
|
static DRAM_ATTR esp_bt_controller_status_t ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
|
|
|
|
|
2023-10-18 04:51:42 -04:00
|
|
|
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
2023-12-04 00:19:01 -05:00
|
|
|
const static uint32_t log_bufs_size[] = {CONFIG_BT_LE_LOG_CTRL_BUF1_SIZE, CONFIG_BT_LE_LOG_HCI_BUF_SIZE, CONFIG_BT_LE_LOG_CTRL_BUF2_SIZE};
|
2023-10-18 04:51:42 -04:00
|
|
|
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
|
|
|
|
2022-11-28 03:52:02 -05:00
|
|
|
/* This variable tells if BLE is running */
|
|
|
|
static bool s_ble_active = false;
|
2022-06-03 10:00:50 -04:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
|
|
|
static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock = NULL;
|
|
|
|
#define BTDM_MIN_TIMER_UNCERTAINTY_US (200)
|
2023-08-17 23:55:48 -04:00
|
|
|
#endif // CONFIG_PM_ENABLE
|
2022-06-03 10:00:50 -04:00
|
|
|
|
2023-03-29 05:23:42 -04:00
|
|
|
#define BLE_RTC_DELAY_US (1800)
|
2022-06-03 10:00:50 -04:00
|
|
|
|
2022-08-08 09:57:22 -04:00
|
|
|
|
2022-06-03 10:00:50 -04:00
|
|
|
static const struct osi_coex_funcs_t s_osi_coex_funcs_ro = {
|
|
|
|
._magic = OSI_COEX_MAGIC_VALUE,
|
|
|
|
._version = OSI_COEX_VERSION,
|
|
|
|
._coex_wifi_sleep_set = NULL,
|
|
|
|
._coex_core_ble_conn_dyn_prio_get = NULL,
|
|
|
|
._coex_schm_status_bit_set = coex_schm_status_bit_set_wrapper,
|
|
|
|
._coex_schm_status_bit_clear = coex_schm_status_bit_clear_wrapper,
|
|
|
|
};
|
|
|
|
|
|
|
|
struct ext_funcs_t ext_funcs_ro = {
|
|
|
|
.ext_version = EXT_FUNC_VERSION,
|
|
|
|
._esp_intr_alloc = esp_intr_alloc_wrapper,
|
|
|
|
._esp_intr_free = esp_intr_free_wrapper,
|
2022-06-17 09:17:13 -04:00
|
|
|
._malloc = bt_osi_mem_malloc_internal,
|
|
|
|
._free = bt_osi_mem_free,
|
|
|
|
#if CONFIG_BT_LE_HCI_INTERFACE_USE_UART
|
|
|
|
._hal_uart_start_tx = hci_uart_start_tx_wrapper,
|
|
|
|
._hal_uart_init_cbs = hci_uart_init_cbs_wrapper,
|
|
|
|
._hal_uart_config = hci_uart_config_wrapper,
|
|
|
|
._hal_uart_close = hci_uart_close_wrapper,
|
|
|
|
._hal_uart_blocking_tx = hci_uart_blocking_tx_wrapper,
|
|
|
|
._hal_uart_init = hci_uart_init_wrapper,
|
|
|
|
#endif //CONFIG_BT_LE_HCI_INTERFACE_USE_UART
|
2022-06-03 10:00:50 -04:00
|
|
|
._task_create = task_create_wrapper,
|
|
|
|
._task_delete = task_delete_wrapper,
|
|
|
|
._osi_assert = osi_assert_wrapper,
|
|
|
|
._os_random = osi_random_wrapper,
|
2023-05-12 00:29:12 -04:00
|
|
|
._ecc_gen_key_pair = esp_ecc_gen_key_pair,
|
|
|
|
._ecc_gen_dh_key = esp_ecc_gen_dh_key,
|
2022-06-03 10:00:50 -04:00
|
|
|
._esp_reset_rpa_moudle = esp_reset_rpa_moudle,
|
2023-09-01 06:08:33 -04:00
|
|
|
._esp_bt_track_pll_cap = NULL,
|
2022-06-03 10:00:50 -04:00
|
|
|
.magic = EXT_FUNC_MAGIC_VALUE,
|
|
|
|
};
|
|
|
|
|
|
|
|
static void IRAM_ATTR esp_reset_rpa_moudle(void)
|
|
|
|
{
|
2022-11-24 23:35:36 -05:00
|
|
|
DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, BLE_RPA_REST_BIT);
|
|
|
|
DPORT_CLEAR_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, BLE_RPA_REST_BIT);
|
2022-06-03 10:00:50 -04:00
|
|
|
}
|
|
|
|
|
2023-08-17 23:55:48 -04:00
|
|
|
static void IRAM_ATTR osi_assert_wrapper(const uint32_t ln, const char *fn,
|
|
|
|
uint32_t param1, uint32_t param2)
|
2022-06-03 10:00:50 -04:00
|
|
|
{
|
2023-09-05 03:07:36 -04:00
|
|
|
BT_ASSERT_PRINT("BLE assert: line %d in function %s, param: 0x%x, 0x%x", ln, fn, param1, param2);
|
2023-08-17 23:55:48 -04:00
|
|
|
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
|
|
|
esp_ble_controller_log_dump_all(true);
|
|
|
|
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
2022-06-03 10:00:50 -04:00
|
|
|
assert(0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t IRAM_ATTR osi_random_wrapper(void)
|
|
|
|
{
|
|
|
|
return esp_random();
|
|
|
|
}
|
|
|
|
|
|
|
|
static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
|
|
|
|
{
|
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
|
|
|
coex_schm_status_bit_set(type, status);
|
2023-08-17 23:55:48 -04:00
|
|
|
#endif // CONFIG_SW_COEXIST_ENABLE
|
2022-06-03 10:00:50 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
|
|
|
|
{
|
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
|
|
|
coex_schm_status_bit_clear(type, status);
|
2023-08-17 23:55:48 -04:00
|
|
|
#endif // CONFIG_SW_COEXIST_ENABLE
|
2022-06-03 10:00:50 -04:00
|
|
|
}
|
2022-08-08 09:57:22 -04:00
|
|
|
|
2023-08-17 23:55:48 -04:00
|
|
|
#ifdef CONFIG_BT_BLUEDROID_ENABLED
|
2022-06-03 10:00:50 -04:00
|
|
|
bool esp_vhci_host_check_send_available(void)
|
|
|
|
{
|
|
|
|
if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* Allocates an mbuf for use by the nimble host.
|
|
|
|
*/
|
|
|
|
static struct os_mbuf *ble_hs_mbuf_gen_pkt(uint16_t leading_space)
|
|
|
|
{
|
|
|
|
struct os_mbuf *om;
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
om = os_msys_get_pkthdr(0, 0);
|
|
|
|
if (om == NULL) {
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (om->om_omp->omp_databuf_len < leading_space) {
|
|
|
|
rc = os_mbuf_free_chain(om);
|
|
|
|
assert(rc == 0);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
om->om_data += leading_space;
|
|
|
|
|
|
|
|
return om;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* Allocates an mbuf suitable for an HCI ACL data packet.
|
|
|
|
*
|
|
|
|
* @return An empty mbuf on success; null on memory
|
|
|
|
* exhaustion.
|
|
|
|
*/
|
|
|
|
struct os_mbuf *ble_hs_mbuf_acl_pkt(void)
|
|
|
|
{
|
|
|
|
return ble_hs_mbuf_gen_pkt(4 + 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
|
|
|
|
{
|
|
|
|
if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (*(data) == DATA_TYPE_COMMAND) {
|
|
|
|
struct ble_hci_cmd *cmd = NULL;
|
|
|
|
cmd = (struct ble_hci_cmd *) ble_hci_trans_buf_alloc(BLE_HCI_TRANS_BUF_CMD);
|
2023-08-24 03:13:55 -04:00
|
|
|
assert(cmd);
|
2022-06-03 10:00:50 -04:00
|
|
|
memcpy((uint8_t *)cmd, data + 1, len - 1);
|
|
|
|
ble_hci_trans_hs_cmd_tx((uint8_t *)cmd);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (*(data) == DATA_TYPE_ACL) {
|
2022-08-25 09:16:04 -04:00
|
|
|
struct os_mbuf *om = os_msys_get_pkthdr(len, ACL_DATA_MBUF_LEADINGSPCAE);
|
2022-06-03 10:00:50 -04:00
|
|
|
assert(om);
|
2023-02-28 04:43:46 -05:00
|
|
|
assert(os_mbuf_append(om, &data[1], len - 1) == 0);
|
2022-06-03 10:00:50 -04:00
|
|
|
ble_hci_trans_hs_acl_tx(om);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
|
|
|
|
{
|
|
|
|
if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
|
|
|
|
return ESP_FAIL;
|
|
|
|
}
|
|
|
|
|
|
|
|
ble_hci_trans_cfg_hs(ble_hs_hci_rx_evt, NULL, ble_hs_rx_data, NULL);
|
|
|
|
|
|
|
|
return ESP_OK;
|
|
|
|
}
|
2023-08-17 23:55:48 -04:00
|
|
|
#endif // CONFIG_BT_BLUEDROID_ENABLED
|
2022-06-03 10:00:50 -04:00
|
|
|
static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
|
|
|
|
{
|
|
|
|
return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
|
|
|
|
}
|
|
|
|
|
|
|
|
static void task_delete_wrapper(void *task_handle)
|
|
|
|
{
|
|
|
|
vTaskDelete(task_handle);
|
|
|
|
}
|
|
|
|
|
2023-05-12 00:29:12 -04:00
|
|
|
static int esp_ecc_gen_key_pair(uint8_t *pub, uint8_t *priv)
|
|
|
|
{
|
|
|
|
int rc = -1;
|
|
|
|
#if CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
|
|
|
|
rc = ble_sm_alg_gen_key_pair(pub, priv);
|
|
|
|
#endif // CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer_pub_key_y,
|
|
|
|
const uint8_t *our_priv_key, uint8_t *out_dhkey)
|
|
|
|
{
|
|
|
|
int rc = -1;
|
|
|
|
#if CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
|
|
|
|
rc = ble_sm_alg_gen_dhkey(peer_pub_key_x, peer_pub_key_y, our_priv_key, out_dhkey);
|
|
|
|
#endif // CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2022-06-03 10:00:50 -04:00
|
|
|
#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
|
2022-06-17 09:17:13 -04:00
|
|
|
static void hci_uart_start_tx_wrapper(int uart_no)
|
|
|
|
{
|
|
|
|
hci_uart_start_tx(uart_no);
|
2022-06-03 10:00:50 -04:00
|
|
|
}
|
|
|
|
|
2022-06-17 09:17:13 -04:00
|
|
|
static int hci_uart_init_cbs_wrapper(int uart_no, hci_uart_tx_char tx_func,
|
|
|
|
hci_uart_tx_done tx_done, hci_uart_rx_char rx_func, void *arg)
|
2022-06-03 10:00:50 -04:00
|
|
|
{
|
|
|
|
int rc = -1;
|
2022-06-17 09:17:13 -04:00
|
|
|
rc = hci_uart_init_cbs(uart_no, tx_func, tx_done, rx_func, arg);
|
2022-06-03 10:00:50 -04:00
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2022-06-17 09:17:13 -04:00
|
|
|
|
2023-08-17 23:55:48 -04:00
|
|
|
static int hci_uart_config_wrapper(int port_num, int32_t baud_rate, uint8_t data_bits,
|
|
|
|
uint8_t stop_bits,uart_parity_t parity,
|
|
|
|
uart_hw_flowcontrol_t flow_ctl)
|
2022-06-03 10:00:50 -04:00
|
|
|
{
|
|
|
|
int rc = -1;
|
2022-06-17 09:17:13 -04:00
|
|
|
rc = hci_uart_config(port_num, baud_rate, data_bits, stop_bits, parity, flow_ctl);
|
2022-06-03 10:00:50 -04:00
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2022-06-17 09:17:13 -04:00
|
|
|
static int hci_uart_close_wrapper(int uart_no)
|
2022-06-03 10:00:50 -04:00
|
|
|
{
|
|
|
|
int rc = -1;
|
2022-06-17 09:17:13 -04:00
|
|
|
rc = hci_uart_close(uart_no);
|
2022-06-03 10:00:50 -04:00
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2022-06-17 09:17:13 -04:00
|
|
|
static void hci_uart_blocking_tx_wrapper(int port, uint8_t data)
|
2022-06-03 10:00:50 -04:00
|
|
|
{
|
2022-06-17 09:17:13 -04:00
|
|
|
//This function is nowhere to use.
|
2022-06-03 10:00:50 -04:00
|
|
|
}
|
|
|
|
|
2022-06-17 09:17:13 -04:00
|
|
|
static int hci_uart_init_wrapper(int uart_no, void *cfg)
|
2022-06-03 10:00:50 -04:00
|
|
|
{
|
2022-06-17 09:17:13 -04:00
|
|
|
//This function is nowhere to use.
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif //CONFIG_BT_LE_HCI_INTERFACE_USE_UART
|
|
|
|
|
|
|
|
static int ble_hci_unregistered_hook(void*, void*)
|
|
|
|
{
|
|
|
|
ESP_LOGD(NIMBLE_PORT_LOG_TAG,"%s ble hci rx_evt is not registered.",__func__);
|
|
|
|
return 0;
|
2022-06-03 10:00:50 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle_in)
|
|
|
|
{
|
2022-11-24 23:35:36 -05:00
|
|
|
int rc = esp_intr_alloc(source, flags | ESP_INTR_FLAG_IRAM, handler, arg, (intr_handle_t *)ret_handle_in);
|
2022-06-03 10:00:50 -04:00
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int esp_intr_free_wrapper(void **ret_handle)
|
|
|
|
{
|
|
|
|
int rc = 0;
|
|
|
|
rc = esp_intr_free((intr_handle_t) * ret_handle);
|
|
|
|
*ret_handle = NULL;
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2023-09-08 03:50:28 -04:00
|
|
|
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
|
|
|
|
void sleep_modem_light_sleep_overhead_set(uint32_t overhead)
|
|
|
|
{
|
|
|
|
esp_ble_set_wakeup_overhead(overhead);
|
|
|
|
}
|
|
|
|
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
|
|
|
|
|
2022-06-03 10:00:50 -04:00
|
|
|
IRAM_ATTR void controller_sleep_cb(uint32_t enable_tick, void *arg)
|
|
|
|
{
|
2022-11-28 03:52:02 -05:00
|
|
|
if (!s_ble_active) {
|
|
|
|
return;
|
|
|
|
}
|
2022-06-03 10:00:50 -04:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
2022-06-08 03:48:41 -04:00
|
|
|
r_ble_rtc_wake_up_state_clr();
|
2022-11-28 03:52:02 -05:00
|
|
|
esp_pm_lock_release(s_pm_lock);
|
2022-06-03 10:00:50 -04:00
|
|
|
#endif // CONFIG_PM_ENABLE
|
2023-09-01 06:08:33 -04:00
|
|
|
esp_phy_disable(PHY_MODEM_BT);
|
2022-11-28 03:52:02 -05:00
|
|
|
s_ble_active = false;
|
2022-06-03 10:00:50 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
IRAM_ATTR void controller_wakeup_cb(void *arg)
|
|
|
|
{
|
2022-11-28 03:52:02 -05:00
|
|
|
if (s_ble_active) {
|
|
|
|
return;
|
|
|
|
}
|
2023-09-01 06:08:33 -04:00
|
|
|
esp_phy_enable(PHY_MODEM_BT);
|
2022-06-08 03:48:41 -04:00
|
|
|
// need to check if need to call pm lock here
|
2022-06-03 10:00:50 -04:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
2022-11-28 03:52:02 -05:00
|
|
|
esp_pm_lock_acquire(s_pm_lock);
|
2022-06-08 03:48:41 -04:00
|
|
|
#endif //CONFIG_PM_ENABLE
|
2022-11-28 03:52:02 -05:00
|
|
|
s_ble_active = true;
|
2022-06-03 10:00:50 -04:00
|
|
|
}
|
|
|
|
|
2022-11-28 03:52:02 -05:00
|
|
|
esp_err_t controller_sleep_init(void)
|
2022-06-03 10:00:50 -04:00
|
|
|
{
|
2022-11-28 03:52:02 -05:00
|
|
|
esp_err_t rc = 0;
|
2022-06-08 03:48:41 -04:00
|
|
|
#ifdef CONFIG_BT_LE_SLEEP_ENABLE
|
2023-07-30 23:53:37 -04:00
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "BLE modem sleep is enabled\n");
|
2022-06-08 03:48:41 -04:00
|
|
|
r_ble_lll_rfmgmt_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0, 500 + BLE_RTC_DELAY_US);
|
|
|
|
|
2022-06-03 10:00:50 -04:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
2022-06-08 03:48:41 -04:00
|
|
|
esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_ON);
|
2022-06-03 10:00:50 -04:00
|
|
|
#endif // CONFIG_PM_ENABLE
|
2022-06-08 03:48:41 -04:00
|
|
|
|
|
|
|
#endif // CONFIG_BT_LE_SLEEP_ENABLE
|
2022-06-03 10:00:50 -04:00
|
|
|
|
|
|
|
// enable light sleep
|
|
|
|
#ifdef CONFIG_PM_ENABLE
|
2022-11-28 03:52:02 -05:00
|
|
|
rc = esp_pm_lock_create(ESP_PM_CPU_FREQ_MAX, 0, "bt", &s_pm_lock);
|
|
|
|
if (rc != ESP_OK) {
|
2022-06-03 10:00:50 -04:00
|
|
|
goto error;
|
|
|
|
}
|
2023-09-08 03:50:28 -04:00
|
|
|
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
|
2022-06-03 10:00:50 -04:00
|
|
|
esp_sleep_enable_bt_wakeup();
|
2022-06-17 09:17:13 -04:00
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "Enable light sleep, the wake up source is BLE timer");
|
2022-06-03 10:00:50 -04:00
|
|
|
|
2023-09-08 03:50:28 -04:00
|
|
|
rc = esp_pm_register_inform_out_light_sleep_overhead_callback(sleep_modem_light_sleep_overhead_set);
|
|
|
|
if (rc != ESP_OK) {
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
|
2022-11-28 03:52:02 -05:00
|
|
|
return rc;
|
2022-06-03 10:00:50 -04:00
|
|
|
|
|
|
|
error:
|
2023-09-08 03:50:28 -04:00
|
|
|
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
|
|
|
|
esp_sleep_disable_bt_wakeup();
|
|
|
|
esp_pm_unregister_inform_out_light_sleep_overhead_callback(sleep_modem_light_sleep_overhead_set);
|
|
|
|
#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
|
2022-11-28 03:52:02 -05:00
|
|
|
/*lock should release first and then delete*/
|
2022-06-03 10:00:50 -04:00
|
|
|
if (s_pm_lock != NULL) {
|
|
|
|
esp_pm_lock_delete(s_pm_lock);
|
|
|
|
s_pm_lock = NULL;
|
|
|
|
}
|
2022-06-08 03:48:41 -04:00
|
|
|
#endif //CONFIG_PM_ENABLE
|
2022-11-28 03:52:02 -05:00
|
|
|
return rc;
|
2022-06-03 10:00:50 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
void controller_sleep_deinit(void)
|
|
|
|
{
|
2023-09-08 03:50:28 -04:00
|
|
|
#ifdef CONFIG_FREERTOS_USE_TICKLESS_IDLE
|
2022-06-08 03:48:41 -04:00
|
|
|
r_ble_rtc_wake_up_state_clr();
|
2022-09-19 09:32:54 -04:00
|
|
|
esp_sleep_disable_bt_wakeup();
|
2022-06-08 03:48:41 -04:00
|
|
|
esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_AUTO);
|
2023-09-08 03:50:28 -04:00
|
|
|
esp_pm_unregister_inform_out_light_sleep_overhead_callback(sleep_modem_light_sleep_overhead_set);
|
|
|
|
#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
|
|
|
|
#ifdef CONFIG_PM_ENABLE
|
2022-09-16 07:04:03 -04:00
|
|
|
/*lock should release first and then delete*/
|
2022-11-28 03:52:02 -05:00
|
|
|
esp_pm_lock_delete(s_pm_lock);
|
|
|
|
s_pm_lock = NULL;
|
|
|
|
#endif //CONFIG_PM_ENABLE
|
2022-06-03 10:00:50 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
void ble_rtc_clk_init(void)
|
|
|
|
{
|
|
|
|
// modem_clkrst_reg
|
|
|
|
// LP_TIMER_SEL_XTAL32K -> 0
|
|
|
|
// LP_TIMER_SEL_XTAL -> 1
|
|
|
|
// LP_TIMER_SEL_8M -> 0
|
|
|
|
// LP_TIMER_SEL_RTC_SLOW -> 0
|
|
|
|
SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_XTAL32K_S);
|
|
|
|
SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 1, MODEM_CLKRST_LP_TIMER_SEL_XTAL_S);
|
|
|
|
SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_8M_S);
|
|
|
|
SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_RTC_SLOW_S);
|
2022-07-12 09:10:58 -04:00
|
|
|
|
2022-07-12 22:54:41 -04:00
|
|
|
#ifdef CONFIG_XTAL_FREQ_26
|
2022-07-12 09:10:58 -04:00
|
|
|
// LP_TIMER_CLK_DIV_NUM -> 130
|
|
|
|
SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM, 129, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM_S);
|
|
|
|
#else
|
|
|
|
// LP_TIMER_CLK_DIV_NUM -> 250
|
2022-06-03 10:00:50 -04:00
|
|
|
SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM, 249, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM_S);
|
2022-07-12 22:54:41 -04:00
|
|
|
#endif // CONFIG_XTAL_FREQ_26
|
2022-06-03 10:00:50 -04:00
|
|
|
|
|
|
|
// MODEM_CLKRST_ETM_CLK_ACTIVE -> 1
|
|
|
|
// MODEM_CLKRST_ETM_CLK_SEL -> 0
|
|
|
|
SET_PERI_REG_BITS(MODEM_CLKRST_ETM_CLK_CONF_REG, 1, 1, MODEM_CLKRST_ETM_CLK_ACTIVE_S);
|
|
|
|
SET_PERI_REG_BITS(MODEM_CLKRST_ETM_CLK_CONF_REG, 1, 0, MODEM_CLKRST_ETM_CLK_SEL_S);
|
|
|
|
|
|
|
|
}
|
|
|
|
|
2022-06-17 09:17:13 -04:00
|
|
|
esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
|
2022-06-03 10:00:50 -04:00
|
|
|
{
|
2022-10-26 09:20:10 -04:00
|
|
|
esp_err_t ret = ESP_OK;
|
2022-12-06 07:54:59 -05:00
|
|
|
ble_npl_count_info_t npl_info;
|
|
|
|
memset(&npl_info, 0, sizeof(ble_npl_count_info_t));
|
2022-06-03 10:00:50 -04:00
|
|
|
if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
|
2022-12-02 01:28:33 -05:00
|
|
|
return ESP_ERR_INVALID_STATE;
|
2022-06-03 10:00:50 -04:00
|
|
|
}
|
2022-12-02 01:28:33 -05:00
|
|
|
|
|
|
|
if (!cfg) {
|
2022-06-03 10:00:50 -04:00
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "cfg is NULL");
|
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
|
|
|
|
|
|
|
ble_rtc_clk_init();
|
|
|
|
|
2022-12-02 01:28:33 -05:00
|
|
|
ret = esp_register_ext_funcs(&ext_funcs_ro);
|
|
|
|
if (ret != ESP_OK) {
|
2022-06-03 10:00:50 -04:00
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "register extend functions failed");
|
2022-12-02 01:28:33 -05:00
|
|
|
return ret;
|
2022-06-03 10:00:50 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Initialize the function pointers for OS porting */
|
|
|
|
npl_freertos_funcs_init();
|
|
|
|
struct npl_funcs_t *p_npl_funcs = npl_freertos_funcs_get();
|
|
|
|
if (!p_npl_funcs) {
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl functions get failed");
|
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
|
|
|
|
2022-12-02 01:28:33 -05:00
|
|
|
ret = esp_register_npl_funcs(p_npl_funcs);
|
|
|
|
if (ret != ESP_OK) {
|
2022-06-03 10:00:50 -04:00
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl functions register failed");
|
2022-10-26 09:20:10 -04:00
|
|
|
goto free_mem;
|
2022-06-03 10:00:50 -04:00
|
|
|
}
|
|
|
|
|
2022-12-06 07:54:59 -05:00
|
|
|
ble_get_npl_element_info(cfg, &npl_info);
|
2023-01-03 01:44:46 -05:00
|
|
|
npl_freertos_set_controller_npl_info(&npl_info);
|
|
|
|
if (npl_freertos_mempool_init() != 0) {
|
2022-06-03 10:00:50 -04:00
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl mempool init failed");
|
2022-10-26 09:20:10 -04:00
|
|
|
ret = ESP_ERR_INVALID_ARG;
|
|
|
|
goto free_mem;
|
2022-06-03 10:00:50 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Initialize the global memory pool */
|
2022-12-02 01:28:33 -05:00
|
|
|
ret = os_msys_buf_alloc();
|
|
|
|
if (ret != ESP_OK) {
|
2022-06-03 10:00:50 -04:00
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "os msys alloc failed");
|
2022-10-26 09:20:10 -04:00
|
|
|
goto free_mem;
|
2022-06-03 10:00:50 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
os_msys_init();
|
|
|
|
#if CONFIG_BT_NIMBLE_ENABLED
|
|
|
|
// ble_npl_eventq_init() need to use npl function in rom and must be called after esp_bt_controller_init()
|
|
|
|
/* Initialize default event queue */
|
|
|
|
ble_npl_eventq_init(nimble_port_get_dflt_eventq());
|
|
|
|
#endif
|
2022-11-24 07:18:27 -05:00
|
|
|
esp_phy_modem_init();
|
2022-06-03 10:00:50 -04:00
|
|
|
periph_module_enable(PERIPH_BT_MODULE);
|
2023-10-09 23:57:34 -04:00
|
|
|
periph_module_reset(PERIPH_BT_MODULE);
|
2022-06-03 10:00:50 -04:00
|
|
|
|
|
|
|
if (ble_osi_coex_funcs_register((struct osi_coex_funcs_t *)&s_osi_coex_funcs_ro) != 0) {
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "osi coex funcs reg failed");
|
2022-10-26 09:20:10 -04:00
|
|
|
ret = ESP_ERR_INVALID_ARG;
|
2023-08-17 23:55:48 -04:00
|
|
|
goto modem_deint;
|
2022-06-03 10:00:50 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
|
|
|
coex_init();
|
|
|
|
#endif
|
|
|
|
|
2023-11-16 22:05:03 -05:00
|
|
|
ret = ble_controller_init(cfg);
|
|
|
|
if (ret != ESP_OK) {
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_init failed %d", ret);
|
|
|
|
goto modem_deint;
|
|
|
|
}
|
|
|
|
|
2023-08-17 23:55:48 -04:00
|
|
|
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
|
|
|
interface_func_t bt_controller_log_interface;
|
|
|
|
bt_controller_log_interface = esp_bt_controller_log_interface;
|
2023-10-18 06:10:25 -04:00
|
|
|
uint8_t buffers = 0;
|
2023-10-18 04:51:42 -04:00
|
|
|
#if CONFIG_BT_LE_CONTROLLER_LOG_CTRL_ENABLED
|
|
|
|
buffers |= ESP_BLE_LOG_BUF_CONTROLLER;
|
|
|
|
#endif // CONFIG_BT_LE_CONTROLLER_LOG_CTRL_ENABLED
|
|
|
|
#if CONFIG_BT_LE_CONTROLLER_LOG_HCI_ENABLED
|
|
|
|
buffers |= ESP_BLE_LOG_BUF_HCI;
|
|
|
|
#endif // CONFIG_BT_LE_CONTROLLER_LOG_HCI_ENABLED
|
2023-08-17 23:55:48 -04:00
|
|
|
#if CONFIG_BT_LE_CONTROLLER_LOG_DUMP_ONLY
|
2023-10-18 04:51:42 -04:00
|
|
|
ret = ble_log_init_async(bt_controller_log_interface, false, buffers, (uint32_t *)log_bufs_size);
|
2023-08-17 23:55:48 -04:00
|
|
|
#else
|
2023-10-18 04:51:42 -04:00
|
|
|
ret = ble_log_init_async(bt_controller_log_interface, true, buffers, (uint32_t *)log_bufs_size);
|
2023-08-17 23:55:48 -04:00
|
|
|
#endif // CONFIG_BT_CONTROLLER_LOG_DUMP
|
|
|
|
if (ret != ESP_OK) {
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_log_init failed %d", ret);
|
2023-11-17 07:35:12 -05:00
|
|
|
goto controller_init_err;
|
2023-08-17 23:55:48 -04:00
|
|
|
}
|
|
|
|
#endif // CONFIG_BT_CONTROLLER_LOG_ENABLED
|
|
|
|
|
2022-11-28 03:52:02 -05:00
|
|
|
ret = controller_sleep_init();
|
|
|
|
if (ret != ESP_OK) {
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "controller_sleep_init failed %d", ret);
|
|
|
|
goto free_controller;
|
|
|
|
}
|
2022-06-03 10:00:50 -04:00
|
|
|
|
|
|
|
uint8_t mac[6];
|
|
|
|
ESP_ERROR_CHECK(esp_read_mac((uint8_t *)mac, ESP_MAC_BT));
|
|
|
|
|
|
|
|
swap_in_place(mac, 6);
|
|
|
|
|
|
|
|
esp_ble_ll_set_public_addr(mac);
|
|
|
|
|
|
|
|
ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
|
2022-06-17 09:17:13 -04:00
|
|
|
|
|
|
|
ble_hci_trans_cfg_hs((ble_hci_trans_rx_cmd_fn *)ble_hci_unregistered_hook,NULL,
|
|
|
|
(ble_hci_trans_rx_acl_fn *)ble_hci_unregistered_hook,NULL);
|
2022-06-03 10:00:50 -04:00
|
|
|
return ESP_OK;
|
2022-11-28 03:52:02 -05:00
|
|
|
free_controller:
|
|
|
|
controller_sleep_deinit();
|
2023-08-17 23:55:48 -04:00
|
|
|
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
2023-11-17 07:35:12 -05:00
|
|
|
controller_init_err:
|
2023-08-17 23:55:48 -04:00
|
|
|
ble_log_deinit_async();
|
|
|
|
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
2023-11-16 22:05:03 -05:00
|
|
|
ble_controller_deinit();
|
2023-11-17 07:35:12 -05:00
|
|
|
modem_deint:
|
2022-11-30 03:39:40 -05:00
|
|
|
esp_phy_modem_deinit();
|
2023-10-09 23:57:34 -04:00
|
|
|
periph_module_disable(PERIPH_BT_MODULE);
|
2022-10-26 09:20:10 -04:00
|
|
|
#if CONFIG_BT_NIMBLE_ENABLED
|
|
|
|
ble_npl_eventq_deinit(nimble_port_get_dflt_eventq());
|
|
|
|
#endif // CONFIG_BT_NIMBLE_ENABLED
|
|
|
|
free_mem:
|
|
|
|
os_msys_buf_free();
|
|
|
|
npl_freertos_mempool_deinit();
|
|
|
|
esp_unregister_npl_funcs();
|
|
|
|
npl_freertos_funcs_deinit();
|
|
|
|
esp_unregister_ext_funcs();
|
|
|
|
return ret;
|
2022-06-03 10:00:50 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t esp_bt_controller_deinit(void)
|
|
|
|
{
|
|
|
|
if ((ble_controller_status < ESP_BT_CONTROLLER_STATUS_INITED) || (ble_controller_status >= ESP_BT_CONTROLLER_STATUS_ENABLED)) {
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
|
|
|
|
return ESP_FAIL;
|
|
|
|
}
|
|
|
|
|
|
|
|
controller_sleep_deinit();
|
|
|
|
|
2023-08-17 23:55:48 -04:00
|
|
|
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
|
|
|
ble_log_deinit_async();
|
|
|
|
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
2023-11-17 07:35:12 -05:00
|
|
|
ble_controller_deinit();
|
2022-11-28 03:52:02 -05:00
|
|
|
|
2023-10-09 23:57:34 -04:00
|
|
|
periph_module_disable(PERIPH_BT_MODULE);
|
|
|
|
|
2022-06-03 10:00:50 -04:00
|
|
|
#if CONFIG_BT_NIMBLE_ENABLED
|
|
|
|
/* De-initialize default event queue */
|
|
|
|
ble_npl_eventq_deinit(nimble_port_get_dflt_eventq());
|
|
|
|
#endif
|
|
|
|
os_msys_buf_free();
|
|
|
|
|
|
|
|
esp_unregister_npl_funcs();
|
|
|
|
|
|
|
|
esp_unregister_ext_funcs();
|
|
|
|
|
|
|
|
/* De-initialize npl functions */
|
|
|
|
npl_freertos_funcs_deinit();
|
|
|
|
|
|
|
|
npl_freertos_mempool_deinit();
|
|
|
|
|
2022-11-24 07:18:27 -05:00
|
|
|
esp_phy_modem_deinit();
|
2022-06-03 10:00:50 -04:00
|
|
|
|
|
|
|
ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
|
|
|
|
|
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
|
|
|
|
{
|
2023-01-04 02:34:05 -05:00
|
|
|
esp_err_t ret = ESP_OK;
|
|
|
|
|
2022-06-03 10:00:50 -04:00
|
|
|
if (mode != ESP_BT_MODE_BLE) {
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller mode");
|
|
|
|
return ESP_FAIL;
|
|
|
|
}
|
|
|
|
if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
|
|
|
|
return ESP_FAIL;
|
|
|
|
}
|
2023-07-30 23:53:37 -04:00
|
|
|
if (!s_ble_active) {
|
|
|
|
#if CONFIG_PM_ENABLE
|
|
|
|
esp_pm_lock_acquire(s_pm_lock);
|
|
|
|
#endif // CONFIG_PM_ENABLE
|
|
|
|
// init phy
|
2023-09-01 06:08:33 -04:00
|
|
|
esp_phy_enable(PHY_MODEM_BT);
|
2023-07-30 23:53:37 -04:00
|
|
|
s_ble_active = true;
|
|
|
|
}
|
|
|
|
// init bb
|
|
|
|
bt_bb_v2_init_cmplx(1);
|
|
|
|
|
2022-06-03 10:00:50 -04:00
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
|
|
|
coex_enable();
|
|
|
|
#endif
|
|
|
|
if (ble_controller_enable(mode) != 0) {
|
2023-01-04 02:34:05 -05:00
|
|
|
ret = ESP_FAIL;
|
|
|
|
goto error;
|
2022-06-03 10:00:50 -04:00
|
|
|
}
|
2023-01-04 02:34:05 -05:00
|
|
|
|
2022-06-03 10:00:50 -04:00
|
|
|
ble_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;
|
|
|
|
return ESP_OK;
|
2023-01-04 02:34:05 -05:00
|
|
|
|
|
|
|
error:
|
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
|
|
|
coex_disable();
|
|
|
|
#endif
|
2023-07-30 23:53:37 -04:00
|
|
|
if (s_ble_active) {
|
2023-09-01 06:08:33 -04:00
|
|
|
esp_phy_disable(PHY_MODEM_BT);
|
2023-07-30 23:53:37 -04:00
|
|
|
#if CONFIG_PM_ENABLE
|
|
|
|
esp_pm_lock_release(s_pm_lock);
|
|
|
|
#endif // CONFIG_PM_ENABLE
|
|
|
|
s_ble_active = false;
|
|
|
|
}
|
2023-01-04 02:34:05 -05:00
|
|
|
return ret;
|
2022-06-03 10:00:50 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t esp_bt_controller_disable(void)
|
|
|
|
{
|
|
|
|
if (ble_controller_status < ESP_BT_CONTROLLER_STATUS_ENABLED) {
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
|
|
|
|
return ESP_FAIL;
|
|
|
|
}
|
|
|
|
if (ble_controller_disable() != 0) {
|
|
|
|
return ESP_FAIL;
|
|
|
|
}
|
2023-07-30 23:53:37 -04:00
|
|
|
|
|
|
|
if (s_ble_active) {
|
2023-09-01 06:08:33 -04:00
|
|
|
esp_phy_disable(PHY_MODEM_BT);
|
2023-07-30 23:53:37 -04:00
|
|
|
#if CONFIG_PM_ENABLE
|
|
|
|
esp_pm_lock_release(s_pm_lock);
|
|
|
|
#endif // CONFIG_PM_ENABLE
|
|
|
|
s_ble_active = false;
|
|
|
|
}
|
2023-01-04 02:34:05 -05:00
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
|
|
|
coex_disable();
|
|
|
|
#endif
|
2022-06-03 10:00:50 -04:00
|
|
|
ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
|
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode)
|
|
|
|
{
|
2022-10-27 08:24:52 -04:00
|
|
|
ESP_LOGD(NIMBLE_PORT_LOG_TAG, "%s not implemented, return OK", __func__);
|
2022-06-03 10:00:50 -04:00
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
2022-10-27 08:24:52 -04:00
|
|
|
static esp_err_t try_heap_caps_add_region(intptr_t start, intptr_t end)
|
|
|
|
{
|
|
|
|
int ret = heap_caps_add_region(start, end);
|
|
|
|
/* heap_caps_add_region() returns ESP_ERR_INVALID_SIZE if the memory region is
|
|
|
|
* is too small to fit a heap. This cannot be termed as a fatal error and hence
|
|
|
|
* we replace it by ESP_OK
|
|
|
|
*/
|
|
|
|
if (ret == ESP_ERR_INVALID_SIZE) {
|
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2022-06-03 10:00:50 -04:00
|
|
|
esp_err_t esp_bt_mem_release(esp_bt_mode_t mode)
|
|
|
|
{
|
2022-10-27 08:24:52 -04:00
|
|
|
intptr_t mem_start, mem_end;
|
|
|
|
|
2023-10-08 04:08:47 -04:00
|
|
|
#if CONFIG_BT_RELEASE_IRAM && CONFIG_ESP_SYSTEM_PMP_IDRAM_SPLIT
|
|
|
|
/* Release Bluetooth text section and merge Bluetooth data, bss & text into a large free heap
|
|
|
|
* region when esp_bt_mem_release is called, total saving ~21kB or more of IRAM. ESP32-C2 has
|
|
|
|
* only 3 configurable PMP entries available, rest of them are hard-coded. We cannot split the
|
|
|
|
* memory into 3 different regions (IRAM, BLE-IRAM, DRAM). So `ESP_SYSTEM_PMP_IDRAM_SPLIT` needs
|
|
|
|
* to be disabled.
|
|
|
|
*/
|
|
|
|
ESP_LOGE(NIMBLE_PORT_LOG_TAG, "`ESP_SYSTEM_PMP_IDRAM_SPLIT` should be disabled!");
|
|
|
|
assert(0);
|
|
|
|
#endif // CONFIG_BT_RELEASE_IRAM && CONFIG_ESP_SYSTEM_PMP_IDRAM_SPLIT
|
|
|
|
|
2023-04-03 22:49:44 -04:00
|
|
|
if (mode & ESP_BT_MODE_BLE) {
|
2023-10-08 04:08:47 -04:00
|
|
|
#if CONFIG_BT_RELEASE_IRAM
|
|
|
|
mem_start = (intptr_t)MAP_IRAM_TO_DRAM((intptr_t)&_iram_bt_text_start);
|
|
|
|
mem_end = (intptr_t)&_bss_bt_end;
|
|
|
|
#else
|
|
|
|
mem_start = (intptr_t)&_bt_controller_data_start;
|
2022-10-27 08:24:52 -04:00
|
|
|
mem_end = (intptr_t)&_bt_bss_end;
|
2023-10-08 04:08:47 -04:00
|
|
|
#endif // CONFIG_BT_RELEASE_IRAM
|
2022-10-27 08:24:52 -04:00
|
|
|
if (mem_start != mem_end) {
|
2023-10-08 04:08:47 -04:00
|
|
|
ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Release BLE [0x%08x] - [0x%08x], len %d", mem_start,
|
|
|
|
mem_end, mem_end - mem_start);
|
2023-04-03 22:49:44 -04:00
|
|
|
ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
|
|
|
|
}
|
2022-10-27 08:24:52 -04:00
|
|
|
}
|
|
|
|
|
2022-06-03 10:00:50 -04:00
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
esp_bt_controller_status_t esp_bt_controller_get_status(void)
|
|
|
|
{
|
|
|
|
return ble_controller_status;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* extra functions */
|
|
|
|
esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
|
|
|
|
{
|
2022-08-08 09:57:22 -04:00
|
|
|
esp_err_t stat = ESP_FAIL;
|
|
|
|
|
|
|
|
switch (power_type) {
|
|
|
|
case ESP_BLE_PWR_TYPE_DEFAULT:
|
|
|
|
case ESP_BLE_PWR_TYPE_ADV:
|
|
|
|
case ESP_BLE_PWR_TYPE_SCAN:
|
|
|
|
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
|
|
|
|
stat = ESP_OK;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL0:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL1:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL2:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL3:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL4:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL5:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL6:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL7:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL8:
|
|
|
|
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type, power_level) == 0) {
|
|
|
|
stat = ESP_OK;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
stat = ESP_ERR_NOT_SUPPORTED;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return stat;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type, uint16_t handle, esp_power_level_t power_level)
|
|
|
|
{
|
|
|
|
esp_err_t stat = ESP_FAIL;
|
|
|
|
switch (power_type) {
|
|
|
|
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
|
|
|
|
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
|
|
|
|
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
|
|
|
|
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
|
|
|
|
stat = ESP_OK;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
|
|
|
|
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
|
|
|
|
if (ble_txpwr_set(power_type, handle, power_level) == 0) {
|
|
|
|
stat = ESP_OK;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
stat = ESP_ERR_NOT_SUPPORTED;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return stat;
|
2022-06-03 10:00:50 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
|
|
|
|
{
|
2022-08-08 09:57:22 -04:00
|
|
|
int tx_level = 0;
|
|
|
|
|
|
|
|
switch (power_type) {
|
|
|
|
case ESP_BLE_PWR_TYPE_ADV:
|
|
|
|
case ESP_BLE_PWR_TYPE_SCAN:
|
|
|
|
case ESP_BLE_PWR_TYPE_DEFAULT:
|
|
|
|
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
|
|
|
|
break;
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL0:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL1:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL2:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL3:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL4:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL5:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL6:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL7:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL8:
|
|
|
|
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return ESP_PWR_LVL_INVALID;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (tx_level < 0) {
|
|
|
|
return ESP_PWR_LVL_INVALID;
|
|
|
|
}
|
|
|
|
|
|
|
|
return (esp_power_level_t)tx_level;
|
2022-06-03 10:00:50 -04:00
|
|
|
}
|
|
|
|
|
2022-08-08 09:57:22 -04:00
|
|
|
esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t power_type, uint16_t handle)
|
|
|
|
{
|
|
|
|
int tx_level = 0;
|
|
|
|
|
|
|
|
switch (power_type) {
|
|
|
|
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
|
|
|
|
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
|
|
|
|
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
|
|
|
|
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
|
|
|
|
break;
|
|
|
|
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
|
|
|
|
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
|
|
|
|
tx_level = ble_txpwr_get(power_type, handle);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return ESP_PWR_LVL_INVALID;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (tx_level < 0) {
|
|
|
|
return ESP_PWR_LVL_INVALID;
|
|
|
|
}
|
|
|
|
|
|
|
|
return (esp_power_level_t)tx_level;
|
|
|
|
}
|
|
|
|
|
2023-06-14 22:28:25 -04:00
|
|
|
uint8_t esp_ble_get_chip_rev_version(void)
|
|
|
|
{
|
|
|
|
return efuse_ll_get_chip_wafer_version_minor();
|
|
|
|
}
|
|
|
|
|
2023-08-17 23:55:48 -04:00
|
|
|
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
2023-09-06 09:51:45 -04:00
|
|
|
static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, bool end)
|
|
|
|
{
|
|
|
|
for (int i = 0; i < len; i++) {
|
2023-10-27 03:17:09 -04:00
|
|
|
esp_rom_printf("%02x ", addr[i]);
|
2023-09-06 09:51:45 -04:00
|
|
|
}
|
|
|
|
if (end) {
|
|
|
|
esp_rom_printf("\n");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2023-08-17 23:55:48 -04:00
|
|
|
void esp_ble_controller_log_dump_all(bool output)
|
|
|
|
{
|
2023-12-04 00:19:01 -05:00
|
|
|
portMUX_TYPE spinlock = portMUX_INITIALIZER_UNLOCKED;
|
2023-09-06 09:51:45 -04:00
|
|
|
|
|
|
|
portENTER_CRITICAL_SAFE(&spinlock);
|
2023-12-04 00:19:01 -05:00
|
|
|
esp_panic_handler_reconfigure_wdts(5000);
|
2023-08-17 23:55:48 -04:00
|
|
|
BT_ASSERT_PRINT("\r\n[DUMP_START:");
|
|
|
|
ble_log_async_output_dump_all(output);
|
2023-12-29 02:30:39 -05:00
|
|
|
BT_ASSERT_PRINT(":DUMP_END]\r\n");
|
2023-09-06 09:51:45 -04:00
|
|
|
portEXIT_CRITICAL_SAFE(&spinlock);
|
2023-08-17 23:55:48 -04:00
|
|
|
}
|
|
|
|
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
2022-08-08 09:57:22 -04:00
|
|
|
|
2024-01-17 02:37:13 -05:00
|
|
|
#if (!CONFIG_BT_NIMBLE_ENABLED) && (CONFIG_BT_CONTROLLER_ENABLED)
|
|
|
|
#if CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
|
2022-06-03 10:00:50 -04:00
|
|
|
#define BLE_SM_KEY_ERR 0x17
|
|
|
|
#if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
|
|
|
|
#include "mbedtls/aes.h"
|
|
|
|
#if CONFIG_BT_LE_SM_SC
|
|
|
|
#include "mbedtls/cipher.h"
|
|
|
|
#include "mbedtls/entropy.h"
|
|
|
|
#include "mbedtls/ctr_drbg.h"
|
|
|
|
#include "mbedtls/cmac.h"
|
|
|
|
#include "mbedtls/ecdh.h"
|
|
|
|
#include "mbedtls/ecp.h"
|
2024-01-17 02:37:13 -05:00
|
|
|
|
|
|
|
static mbedtls_ecp_keypair keypair;
|
|
|
|
#endif // CONFIG_BT_LE_SM_SC
|
2022-06-03 10:00:50 -04:00
|
|
|
|
|
|
|
#else
|
|
|
|
#include "tinycrypt/aes.h"
|
|
|
|
#include "tinycrypt/constants.h"
|
|
|
|
#include "tinycrypt/utils.h"
|
|
|
|
|
|
|
|
#if CONFIG_BT_LE_SM_SC
|
|
|
|
#include "tinycrypt/cmac_mode.h"
|
|
|
|
#include "tinycrypt/ecc_dh.h"
|
2024-01-17 02:37:13 -05:00
|
|
|
#endif // CONFIG_BT_LE_SM_SC
|
|
|
|
#endif // CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
|
2022-06-03 10:00:50 -04:00
|
|
|
|
2024-01-17 02:37:13 -05:00
|
|
|
/* Based on Core Specification 4.2 Vol 3. Part H 2.3.5.6.1 */
|
|
|
|
static const uint8_t ble_sm_alg_dbg_priv_key[32] = {
|
|
|
|
0x3f, 0x49, 0xf6, 0xd4, 0xa3, 0xc5, 0x5f, 0x38, 0x74, 0xc9, 0xb3, 0xe3,
|
|
|
|
0xd2, 0x10, 0x3f, 0x50, 0x4a, 0xff, 0x60, 0x7b, 0xeb, 0x40, 0xb7, 0x99,
|
|
|
|
0x58, 0x99, 0xb8, 0xa6, 0xcd, 0x3c, 0x1a, 0xbd
|
|
|
|
};
|
2022-06-03 10:00:50 -04:00
|
|
|
|
|
|
|
int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x, const uint8_t *peer_pub_key_y,
|
|
|
|
const uint8_t *our_priv_key, uint8_t *out_dhkey)
|
|
|
|
{
|
|
|
|
uint8_t dh[32];
|
|
|
|
uint8_t pk[64];
|
|
|
|
uint8_t priv[32];
|
|
|
|
int rc = BLE_SM_KEY_ERR;
|
|
|
|
|
|
|
|
swap_buf(pk, peer_pub_key_x, 32);
|
|
|
|
swap_buf(&pk[32], peer_pub_key_y, 32);
|
|
|
|
swap_buf(priv, our_priv_key, 32);
|
|
|
|
|
|
|
|
#if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
|
|
|
|
struct mbedtls_ecp_point pt = {0}, Q = {0};
|
|
|
|
mbedtls_mpi z = {0}, d = {0};
|
|
|
|
mbedtls_ctr_drbg_context ctr_drbg = {0};
|
|
|
|
mbedtls_entropy_context entropy = {0};
|
|
|
|
|
|
|
|
uint8_t pub[65] = {0};
|
|
|
|
/* Hardcoded first byte of pub key for MBEDTLS_ECP_PF_UNCOMPRESSED */
|
|
|
|
pub[0] = 0x04;
|
|
|
|
memcpy(&pub[1], pk, 64);
|
|
|
|
|
|
|
|
/* Initialize the required structures here */
|
|
|
|
mbedtls_ecp_point_init(&pt);
|
|
|
|
mbedtls_ecp_point_init(&Q);
|
|
|
|
mbedtls_ctr_drbg_init(&ctr_drbg);
|
|
|
|
mbedtls_entropy_init(&entropy);
|
|
|
|
mbedtls_mpi_init(&d);
|
|
|
|
mbedtls_mpi_init(&z);
|
|
|
|
|
|
|
|
/* Below 3 steps are to validate public key on curve secp256r1 */
|
|
|
|
if (mbedtls_ecp_group_load(&keypair.MBEDTLS_PRIVATE(grp), MBEDTLS_ECP_DP_SECP256R1) != 0) {
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (mbedtls_ecp_point_read_binary(&keypair.MBEDTLS_PRIVATE(grp), &pt, pub, 65) != 0) {
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (mbedtls_ecp_check_pubkey(&keypair.MBEDTLS_PRIVATE(grp), &pt) != 0) {
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Set PRNG */
|
2024-01-17 02:37:13 -05:00
|
|
|
if ((rc = mbedtls_ctr_drbg_seed(&ctr_drbg, mbedtls_entropy_func, &entropy, NULL, 0)) != 0) {
|
2022-06-03 10:00:50 -04:00
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Prepare point Q from pub key */
|
|
|
|
if (mbedtls_ecp_point_read_binary(&keypair.MBEDTLS_PRIVATE(grp), &Q, pub, 65) != 0) {
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (mbedtls_mpi_read_binary(&d, priv, 32) != 0) {
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
rc = mbedtls_ecdh_compute_shared(&keypair.MBEDTLS_PRIVATE(grp), &z, &Q, &d,
|
|
|
|
mbedtls_ctr_drbg_random, &ctr_drbg);
|
|
|
|
if (rc != 0) {
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
rc = mbedtls_mpi_write_binary(&z, dh, 32);
|
|
|
|
if (rc != 0) {
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
exit:
|
|
|
|
mbedtls_ecp_point_free(&pt);
|
|
|
|
mbedtls_mpi_free(&z);
|
|
|
|
mbedtls_mpi_free(&d);
|
|
|
|
mbedtls_ecp_point_free(&Q);
|
|
|
|
mbedtls_entropy_free(&entropy);
|
|
|
|
mbedtls_ctr_drbg_free(&ctr_drbg);
|
|
|
|
if (rc != 0) {
|
|
|
|
return BLE_SM_KEY_ERR;
|
|
|
|
}
|
|
|
|
|
|
|
|
#else
|
|
|
|
if (uECC_valid_public_key(pk, &curve_secp256r1) < 0) {
|
|
|
|
return BLE_SM_KEY_ERR;
|
|
|
|
}
|
|
|
|
|
|
|
|
rc = uECC_shared_secret(pk, priv, dh, &curve_secp256r1);
|
|
|
|
if (rc == TC_CRYPTO_FAIL) {
|
|
|
|
return BLE_SM_KEY_ERR;
|
|
|
|
}
|
2024-01-17 02:37:13 -05:00
|
|
|
#endif // CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
|
2022-06-03 10:00:50 -04:00
|
|
|
|
|
|
|
swap_buf(out_dhkey, dh, 32);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
#if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
|
|
|
|
static int mbedtls_gen_keypair(uint8_t *public_key, uint8_t *private_key)
|
|
|
|
{
|
|
|
|
int rc = BLE_SM_KEY_ERR;
|
|
|
|
mbedtls_entropy_context entropy = {0};
|
|
|
|
mbedtls_ctr_drbg_context ctr_drbg = {0};
|
|
|
|
|
|
|
|
mbedtls_entropy_init(&entropy);
|
|
|
|
mbedtls_ctr_drbg_init(&ctr_drbg);
|
|
|
|
mbedtls_ecp_keypair_init(&keypair);
|
|
|
|
|
|
|
|
if ((rc = mbedtls_ctr_drbg_seed(&ctr_drbg, mbedtls_entropy_func, &entropy,
|
|
|
|
NULL, 0)) != 0) {
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((rc = mbedtls_ecp_gen_key(MBEDTLS_ECP_DP_SECP256R1, &keypair,
|
|
|
|
mbedtls_ctr_drbg_random, &ctr_drbg)) != 0) {
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((rc = mbedtls_mpi_write_binary(&keypair.MBEDTLS_PRIVATE(d), private_key, 32)) != 0) {
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
size_t olen = 0;
|
|
|
|
uint8_t pub[65] = {0};
|
|
|
|
|
|
|
|
if ((rc = mbedtls_ecp_point_write_binary(&keypair.MBEDTLS_PRIVATE(grp), &keypair.MBEDTLS_PRIVATE(Q), MBEDTLS_ECP_PF_UNCOMPRESSED,
|
|
|
|
&olen, pub, 65)) != 0) {
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
memcpy(public_key, &pub[1], 64);
|
|
|
|
|
|
|
|
exit:
|
|
|
|
mbedtls_ctr_drbg_free(&ctr_drbg);
|
|
|
|
mbedtls_entropy_free(&entropy);
|
|
|
|
if (rc != 0) {
|
|
|
|
mbedtls_ecp_keypair_free(&keypair);
|
|
|
|
return BLE_SM_KEY_ERR;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
2024-01-17 02:37:13 -05:00
|
|
|
#endif // CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
|
2022-06-03 10:00:50 -04:00
|
|
|
|
|
|
|
/**
|
|
|
|
* pub: 64 bytes
|
|
|
|
* priv: 32 bytes
|
|
|
|
*/
|
|
|
|
int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv)
|
|
|
|
{
|
|
|
|
#if CONFIG_BT_LE_SM_SC_DEBUG_KEYS
|
|
|
|
swap_buf(pub, ble_sm_alg_dbg_pub_key, 32);
|
|
|
|
swap_buf(&pub[32], &ble_sm_alg_dbg_pub_key[32], 32);
|
|
|
|
swap_buf(priv, ble_sm_alg_dbg_priv_key, 32);
|
|
|
|
#else
|
|
|
|
uint8_t pk[64];
|
|
|
|
|
|
|
|
do {
|
|
|
|
#if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
|
|
|
|
if (mbedtls_gen_keypair(pk, priv) != 0) {
|
|
|
|
return BLE_SM_KEY_ERR;
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
if (uECC_make_key(pk, priv, &curve_secp256r1) != TC_CRYPTO_SUCCESS) {
|
|
|
|
return BLE_SM_KEY_ERR;
|
|
|
|
}
|
2024-01-17 02:37:13 -05:00
|
|
|
#endif // CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
|
2022-06-03 10:00:50 -04:00
|
|
|
/* Make sure generated key isn't debug key. */
|
|
|
|
} while (memcmp(priv, ble_sm_alg_dbg_priv_key, 32) == 0);
|
|
|
|
|
|
|
|
swap_buf(pub, pk, 32);
|
|
|
|
swap_buf(&pub[32], &pk[32], 32);
|
|
|
|
swap_in_place(priv, 32);
|
2024-01-17 02:37:13 -05:00
|
|
|
#endif // CONFIG_BT_LE_SM_SC_DEBUG_KEYS
|
2022-06-03 10:00:50 -04:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2024-01-17 02:37:13 -05:00
|
|
|
#endif // CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
|
|
|
|
#endif // (!CONFIG_BT_NIMBLE_ENABLED) && (CONFIG_BT_CONTROLLER_ENABLED)
|
|
|
|
|