Fixed interrupt latency when cache is disable on ESP32-C2

This commit is contained in:
zwl 2022-11-25 12:35:36 +08:00
parent 1732a6d044
commit 81d6b8f011
4 changed files with 13 additions and 7 deletions

View File

@ -52,6 +52,8 @@
#include "esp_private/periph_ctrl.h"
#include "esp_sleep.h"
#include "soc/syscon_reg.h"
#include "soc/dport_access.h"
/* Macro definition
************************************************************************
*/
@ -233,7 +235,8 @@ struct ext_funcs_t ext_funcs_ro = {
static void IRAM_ATTR esp_reset_rpa_moudle(void)
{
periph_module_reset(PERIPH_MODEM_RPA_MODULE);
DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, BLE_RPA_REST_BIT);
DPORT_CLEAR_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, BLE_RPA_REST_BIT);
}
static void IRAM_ATTR osi_assert_wrapper(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2)
@ -400,7 +403,7 @@ static int ble_hci_unregistered_hook(void*, void*)
static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle_in)
{
int rc = esp_intr_alloc(source, flags, handler, arg, (intr_handle_t *)ret_handle_in);
int rc = esp_intr_alloc(source, flags | ESP_INTR_FLAG_IRAM, handler, arg, (intr_handle_t *)ret_handle_in);
return rc;
}

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@ -50,6 +50,9 @@
#include "esp_private/periph_ctrl.h"
#include "esp_sleep.h"
#include "soc/syscon_reg.h"
#include "soc/dport_access.h"
/* Macro definition
************************************************************************
*/
@ -216,7 +219,8 @@ struct ext_funcs_t ext_funcs_ro = {
static int IRAM_ATTR esp_reset_rpa_moudle(void)
{
periph_module_reset(PERIPH_MODEM_RPA_MODULE);
DPORT_SET_PERI_REG_MASK(SYSTEM_MODEM_RST_EN_REG, SYSTEM_BLE_SEC_AAR_RST);
DPORT_CLEAR_PERI_REG_MASK(SYSTEM_MODEM_RST_EN_REG, SYSTEM_BLE_SEC_AAR_RST);
return 0;
}
@ -385,7 +389,7 @@ static int ble_hci_unregistered_hook(void*, void*)
static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle_in)
{
int rc = esp_intr_alloc(source, flags, handler, arg, (intr_handle_t *)ret_handle_in);
int rc = esp_intr_alloc(source, flags | ESP_INTR_FLAG_IRAM, handler, arg, (intr_handle_t *)ret_handle_in);
return rc;
}

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@ -36,12 +36,12 @@ IRAM_ATTR void *bt_osi_mem_calloc(size_t n, size_t size)
IRAM_ATTR void *bt_osi_mem_malloc_internal(size_t size)
{
return heap_caps_malloc(size, MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
return heap_caps_malloc(size, MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT|MALLOC_CAP_DMA);
}
IRAM_ATTR void *bt_osi_mem_calloc_internal(size_t n, size_t size)
{
return heap_caps_calloc(n, size, MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
return heap_caps_calloc(n, size, MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT|MALLOC_CAP_DMA);
}
IRAM_ATTR void bt_osi_mem_free(void *ptr)

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@ -1364,7 +1364,6 @@ r_get_max_skip = 0x40001950;
r_get_peer_id_offset = 0x40001954;
r_get_peer_irk_offset = 0x40001958;
r_get_peer_rpa_offset = 0x4000195c;
r_hal_rtc_irq_handler = 0x40001964;
r_hal_timer_disable_irq = 0x4000196c;
r_hal_timer_process = 0x40001978;
r_hal_timer_read = 0x4000197c;