2024-04-07 03:24:42 -04:00
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/*
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* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "soc/soc.h"
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#include "esp_attr.h"
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#include "hal/pau_hal.h"
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#include "hal/pau_types.h"
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2024-06-21 02:10:21 -04:00
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#include "hal/lp_aon_ll.h"
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2024-04-07 03:24:42 -04:00
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void pau_hal_set_regdma_entry_link_addr(pau_hal_context_t *hal, pau_regdma_link_addr_t *link_addr)
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{
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2024-06-21 02:10:21 -04:00
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lp_aon_ll_set_regdma_link_addr((uint32_t)(*link_addr)[0]);
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2024-04-07 03:24:42 -04:00
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}
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2024-06-21 02:10:21 -04:00
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void IRAM_ATTR pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_restore)
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2024-04-07 03:24:42 -04:00
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{
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pau_ll_clear_regdma_backup_done_intr_state(hal->dev);
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pau_ll_set_regdma_select_wifimac_link(hal->dev);
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pau_ll_set_regdma_wifimac_link_backup_direction(hal->dev, backup_or_restore);
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pau_ll_set_regdma_wifimac_link_backup_start_enable(hal->dev);
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while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW));
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}
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2024-06-21 02:10:21 -04:00
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void IRAM_ATTR pau_hal_stop_regdma_modem_link(pau_hal_context_t *hal)
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2024-04-07 03:24:42 -04:00
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{
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pau_ll_set_regdma_wifimac_link_backup_start_disable(hal->dev);
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pau_ll_set_regdma_deselect_wifimac_link(hal->dev);
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pau_ll_clear_regdma_backup_done_intr_state(hal->dev);
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}
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2024-06-21 02:10:21 -04:00
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void IRAM_ATTR pau_hal_start_regdma_extra_link(pau_hal_context_t *hal, bool backup_or_restore)
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2024-04-07 03:24:42 -04:00
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{
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pau_ll_clear_regdma_backup_done_intr_state(hal->dev);
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/* The link 3 of REGDMA is reserved, we use it as an extra linked list to
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* provide backup and restore services for BLE, IEEE802.15.4 and possibly
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2024-08-12 03:37:08 -04:00
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* other modules.
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* It is also used as software trigger REGDMA to backup and restore, and is
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* used by the UT to test module driver retention function.
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*/
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2024-04-07 03:24:42 -04:00
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pau_ll_select_regdma_entry_link(hal->dev, 3);
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pau_ll_set_regdma_entry_link_backup_direction(hal->dev, backup_or_restore);
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pau_ll_set_regdma_entry_link_backup_start_enable(hal->dev);
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while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW));
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}
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2024-06-21 02:10:21 -04:00
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void IRAM_ATTR pau_hal_stop_regdma_extra_link(pau_hal_context_t *hal)
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2024-04-07 03:24:42 -04:00
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{
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pau_ll_set_regdma_entry_link_backup_start_disable(hal->dev);
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pau_ll_select_regdma_entry_link(hal->dev, 0); /* restore link select to default */
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pau_ll_clear_regdma_backup_done_intr_state(hal->dev);
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}
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2024-06-21 02:10:21 -04:00
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#if SOC_PM_PAU_REGDMA_LINK_CONFIGURABLE
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void pau_hal_regdma_link_count_config(pau_hal_context_t *hal, int count)
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{
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HAL_ASSERT(count > 0);
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lp_aon_ll_set_regdma_link_count(count - 1);
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}
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#endif
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2024-07-17 08:41:53 -04:00
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void pau_hal_set_regdma_work_timeout(pau_hal_context_t *hal, uint32_t loop_num, uint32_t time)
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{
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HAL_ASSERT(loop_num > 0 && time > 0);
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lp_aon_ll_set_regdma_link_loop_threshold(loop_num);
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lp_aon_ll_set_regdma_link_reg_access_tout_threshold(time);
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}
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2024-06-28 06:11:30 -04:00
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void pau_hal_set_regdma_wait_timeout(pau_hal_context_t *hal, int count, int interval)
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{
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HAL_ASSERT(count > 0 && interval > 0);
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lp_aon_ll_set_regdma_link_wait_retry_count(count);
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lp_aon_ll_set_regdma_link_wait_read_interval(interval);
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}
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