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feat(esp_hw_support): support the new version regdma driver for esp32c5mp

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This commit is contained in:
Lou Tianhao 2024-06-21 14:10:21 +08:00
parent 6c9ed891ee
commit 50791931a1
11 changed files with 110 additions and 66 deletions
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13
components/esp_hw_support/port/pau_regdma.c
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@ -36,6 +36,9 @@ pau_context_t * __attribute__((weak)) IRAM_ATTR PAU_instance(void)
if (pau_hal.dev == NULL) {
pau_hal.dev = &PAU;
pau_hal_enable_bus_clock(true);
#if SOC_PM_PAU_REGDMA_LINK_CONFIGURABLE
pau_hal_regdma_link_count_config(&pau_hal, SOC_PM_PAU_LINK_NUM);
#endif
#if SOC_PAU_IN_TOP_DOMAIN
pau_hal_lp_sys_initialize();
#endif
@ -51,18 +54,20 @@ void pau_regdma_set_entry_link_addr(pau_regdma_link_addr_t *link_entries)
}
#if SOC_PM_SUPPORT_PMU_MODEM_STATE
#if SOC_PM_PAU_REGDMA_LINK_WIFIMAC
void pau_regdma_set_modem_link_addr(void *link_addr)
{
pau_hal_set_regdma_modem_link_addr(PAU_instance()->hal, link_addr);
}
#endif
void pau_regdma_trigger_modem_link_backup(void)
void IRAM_ATTR pau_regdma_trigger_modem_link_backup(void)
{
pau_hal_start_regdma_modem_link(PAU_instance()->hal, true);
pau_hal_stop_regdma_modem_link(PAU_instance()->hal);
}
void pau_regdma_trigger_modem_link_restore(void)
void IRAM_ATTR pau_regdma_trigger_modem_link_restore(void)
{
pau_hal_start_regdma_modem_link(PAU_instance()->hal, false);
pau_hal_stop_regdma_modem_link(PAU_instance()->hal);
@ -79,7 +84,9 @@ void IRAM_ATTR pau_regdma_set_system_link_addr(void *link_addr)
* a relatively large amount of memory space. */
pau_hal_regdma_clock_configure(PAU_instance()->hal, true);
#if SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR
pau_hal_set_regdma_system_link_addr(PAU_instance()->hal, link_addr);
#endif
}
void IRAM_ATTR pau_regdma_trigger_system_link_backup(void)
@ -97,7 +104,9 @@ void IRAM_ATTR pau_regdma_trigger_system_link_restore(void)
void IRAM_ATTR pau_regdma_set_extra_link_addr(void *link_addr)
{
#if SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR
pau_hal_set_regdma_extra_link_addr(PAU_instance()->hal, link_addr);
#endif
}
void IRAM_ATTR pau_regdma_trigger_extra_link_backup(void)

14
components/hal/esp32c5/include/hal/lp_aon_ll.h
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@ -110,6 +110,20 @@ static inline void lp_aon_ll_clear_lpcore_etm_wakeup_flag(void)
REG_SET_BIT(LP_AON_LPCORE_REG, LP_AON_LPCORE_ETM_WAKEUP_FLAG_CLR);
}
/**
* @brief Set the maximum number of linked lists supported by REGDMA
* @param count: the maximum number of regdma link
*/
static inline void lp_aon_ll_set_regdma_link_count(int count)
{
HAL_FORCE_MODIFY_U32_REG_FIELD(LP_AON.backup_dma_cfg0, branch_link_length_aon, count);
}
static inline void lp_aon_ll_set_regdma_link_addr(uint32_t addr)
{
HAL_FORCE_MODIFY_U32_REG_FIELD(LP_AON.backup_dma_cfg2, link_addr_aon, addr);
}
#ifdef __cplusplus
}
#endif

73
components/hal/esp32c5/include/hal/pau_ll.h
View File

@ -34,138 +34,107 @@ static inline void pau_ll_enable_bus_clock(bool enable)
static inline uint32_t pau_ll_get_regdma_backup_flow_error(pau_dev_t *dev)
{
HAL_ASSERT(false && "pau not supported yet");
return 0;
return dev->regdma_conf.flow_err;
}
static inline void pau_ll_select_regdma_entry_link(pau_dev_t *dev, int link)
{
HAL_ASSERT(false && "pau not supported yet");
dev->regdma_conf.link_sel = link;
}
static inline void pau_ll_set_regdma_entry_link_backup_direction(pau_dev_t *dev, bool to_mem)
{
HAL_ASSERT(false && "pau not supported yet");
dev->regdma_conf.to_mem = to_mem ? 1 : 0;
}
static inline void pau_ll_set_regdma_entry_link_backup_start_enable(pau_dev_t *dev)
{
HAL_ASSERT(false && "pau not supported yet");
dev->regdma_conf.start = 1;
}
static inline void pau_ll_set_regdma_entry_link_backup_start_disable(pau_dev_t *dev)
{
HAL_ASSERT(false && "pau not supported yet");
dev->regdma_conf.start = 0;
}
static inline void pau_ll_set_regdma_select_wifimac_link(pau_dev_t *dev)
{
HAL_ASSERT(false && "pau not supported yet");
dev->regdma_conf.sel_mac = 1;
}
static inline void pau_ll_set_regdma_deselect_wifimac_link(pau_dev_t *dev)
{
HAL_ASSERT(false && "pau not supported yet");
dev->regdma_conf.sel_mac = 0;
}
static inline void pau_ll_set_regdma_wifimac_link_backup_direction(pau_dev_t *dev, bool to_mem)
{
HAL_ASSERT(false && "pau not supported yet");
dev->regdma_conf.to_mem_mac = to_mem ? 1 : 0;
}
static inline void pau_ll_set_regdma_wifimac_link_backup_start_enable(pau_dev_t *dev)
{
HAL_ASSERT(false && "pau not supported yet");
dev->regdma_conf.start_mac = 1;
}
static inline void pau_ll_set_regdma_wifimac_link_backup_start_disable(pau_dev_t *dev)
{
HAL_ASSERT(false && "pau not supported yet");
}
static inline void pau_ll_set_regdma_link0_addr(pau_dev_t *dev, void *link_addr)
{
HAL_ASSERT(false && "pau not supported yet");
}
static inline void pau_ll_set_regdma_link1_addr(pau_dev_t *dev, void *link_addr)
{
HAL_ASSERT(false && "pau not supported yet");
}
static inline void pau_ll_set_regdma_link2_addr(pau_dev_t *dev, void *link_addr)
{
HAL_ASSERT(false && "pau not supported yet");
}
static inline void pau_ll_set_regdma_link3_addr(pau_dev_t *dev, void *link_addr)
{
HAL_ASSERT(false && "pau not supported yet");
}
static inline void pau_ll_set_regdma_wifimac_link_addr(pau_dev_t *dev, void *link_addr)
{
HAL_ASSERT(false && "pau not supported yet");
dev->regdma_conf.start_mac = 0;
}
static inline uint32_t pau_ll_get_regdma_current_link_addr(pau_dev_t *dev)
{
HAL_ASSERT(false && "pau not supported yet");
return 0;
return dev->regdma_current_link_addr.val;
}
static inline uint32_t pau_ll_get_regdma_backup_addr(pau_dev_t *dev)
{
HAL_ASSERT(false && "pau not supported yet");
return 0;
return dev->regdma_peri_addr.val;
}
static inline uint32_t pau_ll_get_regdma_memory_addr(pau_dev_t *dev)
{
HAL_ASSERT(false && "pau not supported yet");
return 0;
return dev->regdma_mem_addr.val;
}
static inline uint32_t pau_ll_get_regdma_intr_raw_signal(pau_dev_t *dev)
{
HAL_ASSERT(false && "pau not supported yet");
return 0;
return dev->int_raw.val;
}
static inline uint32_t pau_ll_get_regdma_intr_status(pau_dev_t *dev)
{
HAL_ASSERT(false && "pau not supported yet");
return 0;
return dev->int_st.val;
}
static inline void pau_ll_set_regdma_backup_done_intr_enable(pau_dev_t *dev)
{
HAL_ASSERT(false && "pau not supported yet");
dev->int_ena.done_int_ena = 1;
}
static inline void pau_ll_set_regdma_backup_done_intr_disable(pau_dev_t *dev)
{
HAL_ASSERT(false && "pau not supported yet");
dev->int_ena.done_int_ena = 0;
}
static inline void pau_ll_set_regdma_backup_error_intr_enable(pau_dev_t *dev)
{
HAL_ASSERT(false && "pau not supported yet");
dev->int_ena.error_int_ena = 1;
}
static inline void pau_ll_set_regdma_backup_error_intr_disable(pau_dev_t *dev)
{
HAL_ASSERT(false && "pau not supported yet");
dev->int_ena.error_int_ena = 0;
}
static inline void pau_ll_clear_regdma_backup_done_intr_state(pau_dev_t *dev)
{
HAL_ASSERT(false && "pau not supported yet");
dev->int_clr.done_int_clr = 1;
}
static inline void pau_ll_clear_regdma_backup_error_intr_state(pau_dev_t *dev)
{
HAL_ASSERT(false && "pau not supported yet");
dev->int_clr.error_int_clr = 1;
}
#ifdef __cplusplus

23
components/hal/esp32c5/pau_hal.c
View File

@ -8,17 +8,14 @@
#include "esp_attr.h"
#include "hal/pau_hal.h"
#include "hal/pau_types.h"
#include "hal/lp_aon_ll.h"
void pau_hal_set_regdma_entry_link_addr(pau_hal_context_t *hal, pau_regdma_link_addr_t *link_addr)
{
pau_ll_set_regdma_link0_addr(hal->dev, (*link_addr)[0]);
pau_ll_set_regdma_link1_addr(hal->dev, (*link_addr)[1]);
pau_ll_set_regdma_link2_addr(hal->dev, (*link_addr)[2]);
/* The link 3 of REGDMA is reserved, PMU state switching will not use
* REGDMA link 3 */
lp_aon_ll_set_regdma_link_addr((uint32_t)(*link_addr)[0]);
}
void pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_restore)
void IRAM_ATTR pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_restore)
{
pau_ll_clear_regdma_backup_done_intr_state(hal->dev);
pau_ll_set_regdma_select_wifimac_link(hal->dev);
@ -28,14 +25,14 @@ void pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_rest
while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW));
}
void pau_hal_stop_regdma_modem_link(pau_hal_context_t *hal)
void IRAM_ATTR pau_hal_stop_regdma_modem_link(pau_hal_context_t *hal)
{
pau_ll_set_regdma_wifimac_link_backup_start_disable(hal->dev);
pau_ll_set_regdma_deselect_wifimac_link(hal->dev);
pau_ll_clear_regdma_backup_done_intr_state(hal->dev);
}
void pau_hal_start_regdma_extra_link(pau_hal_context_t *hal, bool backup_or_restore)
void IRAM_ATTR pau_hal_start_regdma_extra_link(pau_hal_context_t *hal, bool backup_or_restore)
{
pau_ll_clear_regdma_backup_done_intr_state(hal->dev);
/* The link 3 of REGDMA is reserved, we use it as an extra linked list to
@ -51,9 +48,17 @@ void pau_hal_start_regdma_extra_link(pau_hal_context_t *hal, bool backup_or_rest
while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW));
}
void pau_hal_stop_regdma_extra_link(pau_hal_context_t *hal)
void IRAM_ATTR pau_hal_stop_regdma_extra_link(pau_hal_context_t *hal)
{
pau_ll_set_regdma_entry_link_backup_start_disable(hal->dev);
pau_ll_select_regdma_entry_link(hal->dev, 0); /* restore link select to default */
pau_ll_clear_regdma_backup_done_intr_state(hal->dev);
}
#if SOC_PM_PAU_REGDMA_LINK_CONFIGURABLE
void pau_hal_regdma_link_count_config(pau_hal_context_t *hal, int count)
{
HAL_ASSERT(count > 0);
lp_aon_ll_set_regdma_link_count(count - 1);
}
#endif

16
components/hal/include/hal/pau_hal.h
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@ -38,6 +38,7 @@ typedef struct {
void pau_hal_set_regdma_entry_link_addr(pau_hal_context_t *hal, pau_regdma_link_addr_t *link_addr);
#if SOC_PM_SUPPORT_PMU_MODEM_STATE
#if SOC_PM_PAU_REGDMA_LINK_WIFIMAC
/**
* @brief Set regdma modem link address
*
@ -45,6 +46,7 @@ void pau_hal_set_regdma_entry_link_addr(pau_hal_context_t *hal, pau_regdma_link_
* @param link_addr modem link address value
*/
#define pau_hal_set_regdma_modem_link_addr(hal, addr) pau_ll_set_regdma_wifimac_link_addr((hal)->dev, (addr))
#endif
/**
* @brief Start transmission on regdma modem link
@ -63,6 +65,7 @@ void pau_hal_stop_regdma_modem_link(pau_hal_context_t *hal);
#endif
#if SOC_PM_RETENTION_SW_TRIGGER_REGDMA
#if SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR
/**
* @brief Set regdma system link address
*
@ -70,6 +73,7 @@ void pau_hal_stop_regdma_modem_link(pau_hal_context_t *hal);
* @param link_addr main link address value
*/
#define pau_hal_set_regdma_system_link_addr(hal, addr) pau_ll_set_regdma_link0_addr(hal->dev, (addr))
#endif
/**
* @brief Start transmission on regdma system link
@ -86,6 +90,7 @@ void pau_hal_start_regdma_system_link(pau_hal_context_t *hal, bool backup_or_res
void pau_hal_stop_regdma_system_link(pau_hal_context_t *hal);
#endif
#if SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR
/**
* @brief Set regdma extra link address
*
@ -93,6 +98,7 @@ void pau_hal_stop_regdma_system_link(pau_hal_context_t *hal);
* @param link_addr extra link address value
*/
#define pau_hal_set_regdma_extra_link_addr(hal, addr) pau_ll_set_regdma_link3_addr(hal->dev, (addr))
#endif
/**
* @brief Start transmission on regdma extra link
@ -118,6 +124,16 @@ void pau_hal_stop_regdma_extra_link(pau_hal_context_t *hal);
void pau_hal_regdma_clock_configure(pau_hal_context_t *hal, bool enable);
#endif
#if SOC_PM_PAU_REGDMA_LINK_CONFIGURABLE
/**
* @brief Enable or disable PAU module clock
*
* @param hal regdma hal context
* @param count the maximum number of regdma linked list
*/
void pau_hal_regdma_link_count_config(pau_hal_context_t *hal, int count);
#endif
#if SOC_PAU_IN_TOP_DOMAIN
/**
* If PAU is in TOP power domain, configuration will be lost after sleep, it is necessary

8
components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
View File

@ -1219,6 +1219,14 @@ config SOC_PM_CPU_RETENTION_BY_SW
bool
default y
config SOC_PM_PAU_LINK_NUM
int
default 4
config SOC_PM_PAU_REGDMA_LINK_CONFIGURABLE
bool
default y
config SOC_CLK_RC_FAST_SUPPORT_CALIBRATION
bool
default y

3
components/soc/esp32c5/include/soc/soc_caps.h
View File

@ -559,7 +559,8 @@
// #define SOC_PM_MODEM_RETENTION_BY_REGDMA (1)
// #define SOC_PM_RETENTION_HAS_CLOCK_BUG (1)
// #define SOC_PM_PAU_LINK_NUM (4)
#define SOC_PM_PAU_LINK_NUM (4)
#define SOC_PM_PAU_REGDMA_LINK_CONFIGURABLE (1)
/*-------------------------- CLOCK SUBSYSTEM CAPS ----------------------------------------*/
#define SOC_CLK_RC_FAST_SUPPORT_CALIBRATION (1)

8
components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
View File

@ -1399,6 +1399,14 @@ config SOC_PM_PAU_LINK_NUM
int
default 4
config SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR
bool
default y
config SOC_PM_PAU_REGDMA_LINK_WIFIMAC
bool
default y
config SOC_CLK_RC_FAST_SUPPORT_CALIBRATION
bool
default y

4
components/soc/esp32c6/include/soc/soc_caps.h
View File

@ -551,7 +551,9 @@
#define SOC_PM_MODEM_RETENTION_BY_REGDMA (1)
#define SOC_PM_RETENTION_HAS_CLOCK_BUG (1)
#define SOC_PM_PAU_LINK_NUM (4)
#define SOC_PM_PAU_LINK_NUM (4)
#define SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR (1)
#define SOC_PM_PAU_REGDMA_LINK_WIFIMAC (1)
/*-------------------------- CLOCK SUBSYSTEM CAPS ----------------------------------------*/
#define SOC_CLK_RC_FAST_SUPPORT_CALIBRATION (1)

8
components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
View File

@ -1343,6 +1343,14 @@ config SOC_PM_PAU_LINK_NUM
int
default 4
config SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR
bool
default y
config SOC_PM_PAU_REGDMA_LINK_WIFIMAC
bool
default y
config SOC_PM_CPU_RETENTION_BY_SW
bool
default y

6
components/soc/esp32h2/include/soc/soc_caps.h
View File

@ -528,7 +528,11 @@
#define SOC_PM_SUPPORT_RC_FAST_PD (1)
#define SOC_PM_SUPPORT_VDDSDIO_PD (1)
#define SOC_PM_SUPPORT_TOP_PD (1)
#define SOC_PM_PAU_LINK_NUM (4)
#define SOC_PM_PAU_LINK_NUM (4)
#define SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR (1)
#define SOC_PM_PAU_REGDMA_LINK_WIFIMAC (1)
#define SOC_PM_CPU_RETENTION_BY_SW (1)
#define SOC_PM_MODEM_RETENTION_BY_REGDMA (1)
#define SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY (1) /*!<Supports CRC only the stub code in RTC memory */