2020-07-14 08:36:05 -04:00
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menu "ESP32S3-Specific"
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visible if IDF_TARGET_ESP32S3
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choice ESP32S3_DEFAULT_CPU_FREQ_MHZ
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prompt "CPU frequency"
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default ESP32S3_DEFAULT_CPU_FREQ_40 if IDF_ENV_FPGA
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default ESP32S3_DEFAULT_CPU_FREQ_160 if !IDF_ENV_FPGA
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help
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CPU frequency to be set on application startup.
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config ESP32S3_DEFAULT_CPU_FREQ_40
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bool "40 MHz"
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depends on IDF_ENV_FPGA
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config ESP32S3_DEFAULT_CPU_FREQ_80
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bool "80 MHz"
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config ESP32S3_DEFAULT_CPU_FREQ_160
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bool "160 MHz"
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config ESP32S3_DEFAULT_CPU_FREQ_240
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bool "240 MHz"
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endchoice
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config ESP32S3_DEFAULT_CPU_FREQ_MHZ
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int
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default 40 if ESP32S3_DEFAULT_CPU_FREQ_40
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default 80 if ESP32S3_DEFAULT_CPU_FREQ_80
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default 160 if ESP32S3_DEFAULT_CPU_FREQ_160
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default 240 if ESP32S3_DEFAULT_CPU_FREQ_240
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menu "Cache config"
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choice ESP32S3_INSTRUCTION_CACHE_SIZE
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prompt "Instruction cache size"
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default ESP32S3_INSTRUCTION_CACHE_16KB
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help
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Instruction cache size to be set on application startup.
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If you use 16KB instruction cache rather than 32KB instruction cache,
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then the other 16KB will be managed by heap allocator.
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config ESP32S3_INSTRUCTION_CACHE_16KB
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bool "16KB"
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config ESP32S3_INSTRUCTION_CACHE_32KB
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bool "32KB"
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endchoice
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config ESP32S3_INSTRUCTION_CACHE_SIZE
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hex
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default 0x4000 if ESP32S3_INSTRUCTION_CACHE_16KB
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default 0x8000 if ESP32S3_INSTRUCTION_CACHE_32KB
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choice ESP32S3_ICACHE_ASSOCIATED_WAYS
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prompt "Instruction cache associated ways"
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default ESP32S3_INSTRUCTION_CACHE_8WAYS
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help
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Instruction cache associated ways to be set on application startup.
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config ESP32S3_INSTRUCTION_CACHE_4WAYS
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bool "4 ways"
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config ESP32S3_INSTRUCTION_CACHE_8WAYS
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bool "8 ways"
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endchoice
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config ESP32S3_ICACHE_ASSOCIATED_WAYS
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int
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default 4 if ESP32S3_INSTRUCTION_CACHE_4WAYS
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default 8 if ESP32S3_INSTRUCTION_CACHE_8WAYS
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choice ESP32S3_INSTRUCTION_CACHE_LINE_SIZE
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prompt "Instruction cache line size"
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default ESP32S3_INSTRUCTION_CACHE_LINE_32B
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help
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Instruction cache line size to be set on application startup.
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config ESP32S3_INSTRUCTION_CACHE_LINE_16B
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bool "16 Bytes"
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depends on ESP32S3_INSTRUCTION_CACHE_16KB
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config ESP32S3_INSTRUCTION_CACHE_LINE_32B
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bool "32 Bytes"
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endchoice
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config ESP32S3_INSTRUCTION_CACHE_LINE_SIZE
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int
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default 16 if ESP32S3_INSTRUCTION_CACHE_LINE_16B
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default 32 if ESP32S3_INSTRUCTION_CACHE_LINE_32B
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config ESP32S3_INSTRUCTION_CACHE_WRAP
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2021-11-08 02:47:30 -05:00
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bool ## TODO IDF-4307
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2020-07-14 08:36:05 -04:00
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default "n"
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help
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If enabled, instruction cache will use wrap mode to read spi flash or spi ram.
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The wrap length equals to ESP32S3_INSTRUCTION_CACHE_LINE_SIZE.
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However, it depends on complex conditions.
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choice ESP32S3_DATA_CACHE_SIZE
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prompt "Data cache size"
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default ESP32S3_DATA_CACHE_32KB
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help
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Data cache size to be set on application startup.
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If you use 32KB data cache rather than 64KB data cache,
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the other 32KB will be added to the heap.
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config ESP32S3_DATA_CACHE_16KB
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bool "16KB"
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config ESP32S3_DATA_CACHE_32KB
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bool "32KB"
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config ESP32S3_DATA_CACHE_64KB
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bool "64KB"
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endchoice
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config ESP32S3_DATA_CACHE_SIZE
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hex
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2020-10-10 04:22:49 -04:00
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# For 16KB the actual configuration is 32kb cache, but 16kb will be reserved for heap at startup
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default 0x8000 if ESP32S3_DATA_CACHE_16KB
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2020-07-14 08:36:05 -04:00
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default 0x8000 if ESP32S3_DATA_CACHE_32KB
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default 0x10000 if ESP32S3_DATA_CACHE_64KB
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choice ESP32S3_DCACHE_ASSOCIATED_WAYS
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prompt "Data cache associated ways"
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default ESP32S3_DATA_CACHE_8WAYS
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help
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Data cache associated ways to be set on application startup.
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config ESP32S3_DATA_CACHE_4WAYS
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bool "4 ways"
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config ESP32S3_DATA_CACHE_8WAYS
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bool "8 ways"
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endchoice
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config ESP32S3_DCACHE_ASSOCIATED_WAYS
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int
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default 4 if ESP32S3_DATA_CACHE_4WAYS
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default 8 if ESP32S3_DATA_CACHE_8WAYS
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choice ESP32S3_DATA_CACHE_LINE_SIZE
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prompt "Data cache line size"
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default ESP32S3_DATA_CACHE_LINE_32B
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help
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Data cache line size to be set on application startup.
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config ESP32S3_DATA_CACHE_LINE_16B
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bool "16 Bytes"
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depends on ESP32S3_DATA_CACHE_16KB || ESP32S3_DATA_CACHE_32KB
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config ESP32S3_DATA_CACHE_LINE_32B
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bool "32 Bytes"
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2020-10-10 04:22:49 -04:00
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config ESP32S3_DATA_CACHE_LINE_64B
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bool "64 Bytes"
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2020-07-14 08:36:05 -04:00
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endchoice
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config ESP32S3_DATA_CACHE_LINE_SIZE
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int
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default 16 if ESP32S3_DATA_CACHE_LINE_16B
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default 32 if ESP32S3_DATA_CACHE_LINE_32B
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2020-10-10 04:22:49 -04:00
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default 64 if ESP32S3_DATA_CACHE_LINE_64B
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2020-07-14 08:36:05 -04:00
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config ESP32S3_DATA_CACHE_WRAP
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2021-11-08 02:47:30 -05:00
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bool ## TODO IDF-4307
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2020-07-14 08:36:05 -04:00
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default "n"
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help
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If enabled, data cache will use wrap mode to read spi flash or spi ram.
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The wrap length equals to ESP32S3_DATA_CACHE_LINE_SIZE.
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However, it depends on complex conditions.
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endmenu # Cache config
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# Hint: to support SPIRAM across multiple chips, check CONFIG_SPIRAM instead
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config ESP32S3_SPIRAM_SUPPORT
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bool "Support for external, SPI-connected RAM"
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default "n"
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select SPIRAM
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help
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This enables support for an external SPI RAM chip, connected in parallel with the
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main SPI flash chip.
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menu "SPI RAM config"
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depends on ESP32S3_SPIRAM_SUPPORT
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2021-04-15 05:13:48 -04:00
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choice SPIRAM_MODE
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prompt "Mode (QUAD/OCT) of SPI RAM chip in use"
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default SPIRAM_MODE_QUAD
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config SPIRAM_MODE_QUAD
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bool "Quad Mode PSRAM"
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config SPIRAM_MODE_OCT
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bool "Octal Mode PSRAM"
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endchoice
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2020-07-14 08:36:05 -04:00
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choice SPIRAM_TYPE
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2021-04-15 05:13:48 -04:00
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prompt "Type of SPIRAM chip in use"
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2020-08-10 07:33:00 -04:00
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default SPIRAM_TYPE_AUTO
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config SPIRAM_TYPE_AUTO
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bool "Auto-detect"
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config SPIRAM_TYPE_ESPPSRAM16
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bool "ESP-PSRAM16 or APS1604"
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2021-04-15 05:13:48 -04:00
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depends on SPIRAM_MODE_QUAD
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2020-07-14 08:36:05 -04:00
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config SPIRAM_TYPE_ESPPSRAM32
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bool "ESP-PSRAM32 or IS25WP032"
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2021-04-15 05:13:48 -04:00
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depends on SPIRAM_MODE_QUAD
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2020-08-10 07:33:00 -04:00
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2020-07-14 08:36:05 -04:00
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config SPIRAM_TYPE_ESPPSRAM64
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2021-04-15 05:13:48 -04:00
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bool "ESP-PSRAM64 , LY68L6400 or APS6408"
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2020-07-14 08:36:05 -04:00
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endchoice
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config SPIRAM_SIZE
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int
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2020-08-10 07:33:00 -04:00
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default -1 if SPIRAM_TYPE_AUTO
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default 2097152 if SPIRAM_TYPE_ESPPSRAM16
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2020-07-14 08:36:05 -04:00
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default 4194304 if SPIRAM_TYPE_ESPPSRAM32
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default 8388608 if SPIRAM_TYPE_ESPPSRAM64
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2021-04-15 05:13:48 -04:00
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default 16777216 if SPIRAM_TYPE_ESPPSRAM128
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default 33554432 if SPIRAM_TYPE_ESPPSRAM256
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2020-07-14 08:36:05 -04:00
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default 0
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menu "PSRAM Clock and CS IO for ESP32S3"
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depends on ESP32S3_SPIRAM_SUPPORT
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config DEFAULT_PSRAM_CLK_IO
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int "PSRAM CLK IO number"
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range 0 33
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default 30
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help
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The PSRAM Clock IO can be any unused GPIO, please refer to your hardware design.
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config DEFAULT_PSRAM_CS_IO
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int "PSRAM CS IO number"
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range 0 33
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default 26
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help
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The PSRAM CS IO can be any unused GPIO, please refer to your hardware design.
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endmenu
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config SPIRAM_FETCH_INSTRUCTIONS
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bool "Cache fetch instructions from SPI RAM"
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default n
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help
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If enabled, instruction in flash will be copied into SPIRAM.
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If SPIRAM_RODATA also enabled, you can run the instruction when erasing or programming the flash.
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config SPIRAM_RODATA
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bool "Cache load read only data from SPI RAM"
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default n
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help
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If enabled, rodata in flash will be copied into SPIRAM.
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If SPIRAM_FETCH_INSTRUCTIONS is also enabled,
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you can run the instruction when erasing or programming the flash.
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choice SPIRAM_SPEED
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prompt "Set RAM clock speed"
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default SPIRAM_SPEED_40M
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help
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Select the speed for the SPI RAM chip.
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2021-08-12 23:30:54 -04:00
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config SPIRAM_SPEED_120M
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depends on SPIRAM_MODE_QUAD
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bool "120MHz clock speed"
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2020-07-14 08:36:05 -04:00
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config SPIRAM_SPEED_80M
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bool "80MHz clock speed"
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config SPIRAM_SPEED_40M
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bool "40Mhz clock speed"
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endchoice
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# insert non-chip-specific items here
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2021-02-18 08:09:27 -05:00
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source "$IDF_PATH/components/esp_hw_support/Kconfig.spiram.common"
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2020-07-14 08:36:05 -04:00
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endmenu
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config ESP32S3_MEMMAP_TRACEMEM
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bool
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default "n"
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config ESP32S3_MEMMAP_TRACEMEM_TWOBANKS
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bool
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default "n"
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config ESP32S3_TRAX
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bool "Use TRAX tracing feature"
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default "n"
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select ESP32S3_MEMMAP_TRACEMEM
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help
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The esp32-s3 contains a feature which allows you to trace the execution path the processor
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has taken through the program. This is stored in a chunk of 32K (16K for single-processor)
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of memory that can't be used for general purposes anymore. Disable this if you do not know
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what this is.
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config ESP32S3_TRAX_TWOBANKS
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bool "Reserve memory for tracing both pro as well as app cpu execution"
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default "n"
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depends on ESP32S3_TRAX && !FREERTOS_UNICORE
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select ESP32S3_MEMMAP_TRACEMEM_TWOBANKS
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help
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The esp32-s3 contains a feature which allows you to trace the execution path the processor
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has taken through the program. This is stored in a chunk of 32K (16K for single-processor)
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of memory that can't be used for general purposes anymore. Disable this if you do not know
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what this is.
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config ESP32S3_TRACEMEM_RESERVE_DRAM
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hex
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default 0x8000 if ESP32S3_MEMMAP_TRACEMEM && ESP32S3_MEMMAP_TRACEMEM_TWOBANKS
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default 0x4000 if ESP32S3_MEMMAP_TRACEMEM && !ESP32S3_MEMMAP_TRACEMEM_TWOBANKS
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default 0x0
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config ESP32S3_ULP_COPROC_ENABLED
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bool "Enable Ultra Low Power (ULP) Coprocessor"
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default "n"
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help
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Set to 'y' if you plan to load a firmware for the coprocessor.
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If this option is enabled, further coprocessor configuration will appear in the Components menu.
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config ESP32S3_ULP_COPROC_RESERVE_MEM
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int
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prompt "RTC slow memory reserved for coprocessor" if ESP32S3_ULP_COPROC_ENABLED
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default 512 if ESP32S3_ULP_COPROC_ENABLED
|
2021-06-01 05:10:28 -04:00
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range 32 8176 if ESP32S3_ULP_COPROC_ENABLED
|
2020-07-14 08:36:05 -04:00
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default 0 if !ESP32S3_ULP_COPROC_ENABLED
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range 0 0 if !ESP32S3_ULP_COPROC_ENABLED
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help
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Bytes of memory to reserve for ULP coprocessor firmware & data.
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Data is reserved at the beginning of RTC slow memory.
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config ESP32S3_DEBUG_OCDAWARE
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bool "Make exception and panic handlers JTAG/OCD aware"
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default y
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select FREERTOS_DEBUG_OCDAWARE
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help
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The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and
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instead of panicking, have the debugger stop on the offending instruction.
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config ESP32S3_BROWNOUT_DET
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bool "Hardware brownout detect & reset"
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2021-05-24 21:11:33 -04:00
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depends on !IDF_ENV_FPGA
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2020-07-14 08:36:05 -04:00
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default y
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help
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The ESP32-S3 has a built-in brownout detector which can detect if the voltage is lower than
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a specific value. If this happens, it will reset the chip in order to prevent unintended
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behaviour.
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choice ESP32S3_BROWNOUT_DET_LVL_SEL
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prompt "Brownout voltage level"
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depends on ESP32S3_BROWNOUT_DET
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default ESP32S3_BROWNOUT_DET_LVL_SEL_7
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help
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The brownout detector will reset the chip when the supply voltage is approximately
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below this level. Note that there may be some variation of brownout voltage level
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between each ESP3-S3 chip.
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#The voltage levels here are estimates, more work needs to be done to figure out the exact voltages
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#of the brownout threshold levels.
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config ESP32S3_BROWNOUT_DET_LVL_SEL_7
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bool "2.44V"
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config ESP32S3_BROWNOUT_DET_LVL_SEL_6
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bool "2.56V"
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config ESP32S3_BROWNOUT_DET_LVL_SEL_5
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bool "2.67V"
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config ESP32S3_BROWNOUT_DET_LVL_SEL_4
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bool "2.84V"
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config ESP32S3_BROWNOUT_DET_LVL_SEL_3
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bool "2.98V"
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config ESP32S3_BROWNOUT_DET_LVL_SEL_2
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bool "3.19V"
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config ESP32S3_BROWNOUT_DET_LVL_SEL_1
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bool "3.30V"
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endchoice
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config ESP32S3_BROWNOUT_DET_LVL
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int
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default 1 if ESP32S3_BROWNOUT_DET_LVL_SEL_1
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default 2 if ESP32S3_BROWNOUT_DET_LVL_SEL_2
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default 3 if ESP32S3_BROWNOUT_DET_LVL_SEL_3
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default 4 if ESP32S3_BROWNOUT_DET_LVL_SEL_4
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default 5 if ESP32S3_BROWNOUT_DET_LVL_SEL_5
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default 6 if ESP32S3_BROWNOUT_DET_LVL_SEL_6
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default 7 if ESP32S3_BROWNOUT_DET_LVL_SEL_7
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# Note about the use of "FRC1" name: currently FRC1 timer is not used for
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|
# high resolution timekeeping anymore. Instead the esp_timer API, implemented
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# using FRC2 timer, is used.
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# FRC1 name in the option name is kept for compatibility.
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choice ESP32S3_TIME_SYSCALL
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prompt "Timers used for gettimeofday function"
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default ESP32S3_TIME_SYSCALL_USE_RTC_FRC1
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|
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help
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|
|
This setting defines which hardware timers are used to
|
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|
|
implement 'gettimeofday' and 'time' functions in C library.
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- If both high-resolution and RTC timers are used, timekeeping will
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continue in deep sleep. Time will be reported at 1 microsecond
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resolution. This is the default, and the recommended option.
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- If only high-resolution timer is used, gettimeofday will
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|
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provide time at microsecond resolution.
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Time will not be preserved when going into deep sleep mode.
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- If only RTC timer is used, timekeeping will continue in
|
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|
deep sleep, but time will be measured at 6.(6) microsecond
|
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|
|
resolution. Also the gettimeofday function itself may take
|
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|
|
longer to run.
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|
- If no timers are used, gettimeofday and time functions
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|
|
return -1 and set errno to ENOSYS.
|
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|
|
- When RTC is used for timekeeping, two RTC_STORE registers are
|
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|
|
used to keep time in deep sleep mode.
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|
config ESP32S3_TIME_SYSCALL_USE_RTC_FRC1
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|
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bool "RTC and high-resolution timer"
|
2020-10-20 02:09:32 -04:00
|
|
|
select ESP_TIME_FUNCS_USE_RTC_TIMER
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|
|
select ESP_TIME_FUNCS_USE_ESP_TIMER
|
2020-07-14 08:36:05 -04:00
|
|
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config ESP32S3_TIME_SYSCALL_USE_RTC
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|
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bool "RTC"
|
2020-10-20 02:09:32 -04:00
|
|
|
select ESP_TIME_FUNCS_USE_RTC_TIMER
|
2020-07-14 08:36:05 -04:00
|
|
|
config ESP32S3_TIME_SYSCALL_USE_FRC1
|
|
|
|
|
bool "High-resolution timer"
|
2020-10-20 02:09:32 -04:00
|
|
|
select ESP_TIME_FUNCS_USE_ESP_TIMER
|
2020-07-14 08:36:05 -04:00
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|
|
config ESP32S3_TIME_SYSCALL_USE_NONE
|
|
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|
|
bool "None"
|
2020-10-20 02:09:32 -04:00
|
|
|
select ESP_TIME_FUNCS_USE_NONE
|
2020-07-14 08:36:05 -04:00
|
|
|
endchoice
|
|
|
|
|
|
|
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|
|
choice ESP32S3_RTC_CLK_SRC
|
|
|
|
|
prompt "RTC clock source"
|
|
|
|
|
default ESP32S3_RTC_CLK_SRC_INT_RC
|
|
|
|
|
help
|
|
|
|
|
Choose which clock is used as RTC clock source.
|
|
|
|
|
|
|
|
|
|
config ESP32S3_RTC_CLK_SRC_INT_RC
|
2021-03-18 12:15:18 -04:00
|
|
|
bool "Internal 150kHz RC oscillator"
|
2020-07-14 08:36:05 -04:00
|
|
|
config ESP32S3_RTC_CLK_SRC_EXT_CRYS
|
|
|
|
|
bool "External 32kHz crystal"
|
|
|
|
|
select ESP_SYSTEM_RTC_EXT_XTAL
|
|
|
|
|
config ESP32S3_RTC_CLK_SRC_EXT_OSC
|
|
|
|
|
bool "External 32kHz oscillator at 32K_XP pin"
|
2021-08-29 23:30:12 -04:00
|
|
|
select ESP_SYSTEM_RTC_EXT_OSC
|
2020-07-14 08:36:05 -04:00
|
|
|
config ESP32S3_RTC_CLK_SRC_INT_8MD256
|
|
|
|
|
bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"
|
|
|
|
|
endchoice
|
|
|
|
|
|
|
|
|
|
config ESP32S3_RTC_CLK_CAL_CYCLES
|
|
|
|
|
int "Number of cycles for RTC_SLOW_CLK calibration"
|
2020-10-28 03:58:28 -04:00
|
|
|
default 3000 if ESP32S3_RTC_CLK_SRC_EXT_CRYS || ESP32S3_RTC_CLK_SRC_EXT_OSC || ESP32S3_RTC_CLK_SRC_INT_8MD256
|
2021-04-19 03:58:15 -04:00
|
|
|
default 1024 if ESP32S3_RTC_CLK_SRC_INT_RC
|
|
|
|
|
range 0 27000 if ESP32S3_RTC_CLK_SRC_EXT_CRYS || ESP32S3_RTC_CLK_SRC_EXT_OSC || ESP32S3_RTC_CLK_SRC_INT_8MD256
|
|
|
|
|
range 0 32766 if ESP32S3_RTC_CLK_SRC_INT_RC
|
2020-07-14 08:36:05 -04:00
|
|
|
help
|
|
|
|
|
When the startup code initializes RTC_SLOW_CLK, it can perform
|
|
|
|
|
calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
|
|
|
|
|
frequency. This option sets the number of RTC_SLOW_CLK cycles measured
|
|
|
|
|
by the calibration routine. Higher numbers increase calibration
|
|
|
|
|
precision, which may be important for applications which spend a lot of
|
|
|
|
|
time in deep sleep. Lower numbers reduce startup time.
|
|
|
|
|
|
|
|
|
|
When this option is set to 0, clock calibration will not be performed at
|
|
|
|
|
startup, and approximate clock frequencies will be assumed:
|
|
|
|
|
|
2021-03-18 12:15:18 -04:00
|
|
|
- 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
|
2020-07-14 08:36:05 -04:00
|
|
|
- 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
|
|
|
|
|
In case more value will help improve the definition of the launch of the crystal.
|
|
|
|
|
If the crystal could not start, it will be switched to internal RC.
|
|
|
|
|
|
2021-04-01 07:55:15 -04:00
|
|
|
config ESP32S3_DEEP_SLEEP_WAKEUP_DELAY
|
|
|
|
|
int "Extra delay in deep sleep wake stub (in us)"
|
|
|
|
|
default 2000
|
|
|
|
|
range 0 5000
|
|
|
|
|
help
|
|
|
|
|
When ESP32S3 exits deep sleep, the CPU and the flash chip are powered on
|
|
|
|
|
at the same time. CPU will run deep sleep stub first, and then
|
|
|
|
|
proceed to load code from flash. Some flash chips need sufficient
|
|
|
|
|
time to pass between power on and first read operation. By default,
|
|
|
|
|
without any extra delay, this time is approximately 900us, although
|
|
|
|
|
some flash chip types need more than that.
|
|
|
|
|
|
|
|
|
|
By default extra delay is set to 2000us. When optimizing startup time
|
|
|
|
|
for applications which require it, this value may be reduced.
|
|
|
|
|
|
|
|
|
|
If you are seeing "flash read err, 1000" message printed to the
|
|
|
|
|
console after deep sleep reset, try increasing this value.
|
|
|
|
|
|
2020-07-14 08:36:05 -04:00
|
|
|
config ESP32S3_NO_BLOBS
|
|
|
|
|
bool "No Binary Blobs"
|
|
|
|
|
depends on !BT_ENABLED
|
|
|
|
|
default n
|
|
|
|
|
help
|
|
|
|
|
If enabled, this disables the linking of binary libraries in the application build. Note
|
|
|
|
|
that after enabling this Wi-Fi/Bluetooth will not work.
|
|
|
|
|
|
|
|
|
|
config ESP32S3_RTCDATA_IN_FAST_MEM
|
|
|
|
|
bool "Place RTC_DATA_ATTR and RTC_RODATA_ATTR variables into RTC fast memory segment"
|
|
|
|
|
default n
|
|
|
|
|
help
|
|
|
|
|
This option allows to place .rtc_data and .rtc_rodata sections into
|
|
|
|
|
RTC fast memory segment to free the slow memory region for ULP programs.
|
|
|
|
|
|
|
|
|
|
config ESP32S3_USE_FIXED_STATIC_RAM_SIZE
|
|
|
|
|
bool "Use fixed static RAM size"
|
|
|
|
|
default n
|
|
|
|
|
help
|
|
|
|
|
If this option is disabled, the DRAM part of the heap starts right after the .bss section,
|
|
|
|
|
within the dram0_0 region. As a result, adding or removing some static variables
|
|
|
|
|
will change the available heap size.
|
|
|
|
|
|
|
|
|
|
If this option is enabled, the DRAM part of the heap starts right after the dram0_0 region,
|
|
|
|
|
where its length is set with ESP32S3_FIXED_STATIC_RAM_SIZE
|
|
|
|
|
|
|
|
|
|
config ESP32S3_FIXED_STATIC_RAM_SIZE
|
|
|
|
|
hex "Fixed Static RAM size"
|
|
|
|
|
default 0x10000
|
|
|
|
|
range 0 0x34000
|
|
|
|
|
depends on ESP32S3_USE_FIXED_STATIC_RAM_SIZE
|
|
|
|
|
help
|
|
|
|
|
RAM size dedicated for static variables (.data & .bss sections).
|
|
|
|
|
|
2020-11-10 02:40:01 -05:00
|
|
|
endmenu # ESP32S3-Specific
|
