esp-idf/examples/system/ulp/ulp_riscv/interrupts/CMakeLists.txt
Sudeep Mohanty 4230acb971 feat(ulp-riscv): Added new example to demonstrate ULP RISC-V interrupts
This commit adds a new example which demonstrates how the ULP RISC-V
co-processor handles interrupts.
2024-01-18 15:59:49 +01:00

7 lines
245 B
CMake

# The following lines of boilerplate have to be in your project's CMakeLists
# in this exact order for cmake to work correctly
cmake_minimum_required(VERSION 3.16)
include($ENV{IDF_PATH}/tools/cmake/project.cmake)
project(ulp_riscv_interrupts)