esp-idf/components/idf_test/include/esp32s2/idf_performance_target.h
Marius Vikhammer 32fd9d6c63 s2 crypto: update perf test to use cache comp timer
Updated S2 hardware accelerated crypto to use the cache compensated timer.

Re-enabled RSA performance test and set lower targets now that results are more stable

Closes: IDF-1174
2020-03-23 11:30:55 +08:00

19 lines
1.1 KiB
C

#pragma once
#define IDF_PERFORMANCE_MIN_AES_CBC_THROUGHPUT_MBSEC 43.0
#define IDF_PERFORMANCE_MIN_AES_GCM_THROUGHPUT_MBSEC 2.1
// SHA256 hardware throughput at 240MHz, threshold set lower than worst case
#define IDF_PERFORMANCE_MIN_SHA256_THROUGHPUT_MBSEC 90.0
// esp_sha() time to process 32KB of input data from RAM
#define IDF_PERFORMANCE_MAX_TIME_SHA1_32KB 900
#define IDF_PERFORMANCE_MAX_TIME_SHA512_32KB 800
#define IDF_PERFORMANCE_MAX_RSA_2048KEY_PUBLIC_OP 13500
#define IDF_PERFORMANCE_MAX_RSA_2048KEY_PRIVATE_OP 130000
#define IDF_PERFORMANCE_MAX_RSA_4096KEY_PUBLIC_OP 62000
#define IDF_PERFORMANCE_MAX_RSA_4096KEY_PRIVATE_OP 800000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 32
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 30