esp-idf/components/soc
Darian Leung fb2d6a44eb CAN: ISR runs when cache is disabled
This commit adds the feature where the CAN ISR will continue to
run even if the cache is disabled. Whilst cache is disabled, any
received messages will go into the RX queue, and any pending TX
messages in the TX queue will be transmitted. This feature should
be enabled using the CONFIG_CAN_ISR_IN_IRAM option.
2021-03-09 08:47:58 +08:00
..
esp32 CAN: Fix BRP field initialization onf ESP32 ECO3 2021-03-09 08:47:58 +08:00
esp32s2beta adc_i2s: solve the i2s_adc issue when using wifi 2020-12-15 20:57:02 +08:00
include CAN: Simplify caps header 2021-03-09 08:47:57 +08:00
src CAN: ISR runs when cache is disabled 2021-03-09 08:47:58 +08:00
test soc: fix unit tests not included in the build 2019-11-18 15:58:49 +07:00
CMakeLists.txt CAN: ISR runs when cache is disabled 2021-03-09 08:47:58 +08:00
component.mk add esp32s2beta in soc component 2019-06-11 13:06:32 +08:00
linker.lf CAN: ISR runs when cache is disabled 2021-03-09 08:47:58 +08:00