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https://github.com/espressif/esp-idf.git
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23d08fbe85
Issue Description: If master is in HD mode, if it sends data without receiving data, it will still enable the RX DMA because of old version ESP32 silicon issue. And because there is no correctly linked RX DMA descriptor, an inlink_dscr_error intr will be seen, which will influence the following RX transactions. This issue is only found on ESP32.
235 lines
8.8 KiB
C
235 lines
8.8 KiB
C
#include "test/test_common_spi.h"
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#include "driver/spi_slave.h"
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#include "esp_log.h"
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#include "driver/gpio.h"
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int test_freq_default[]=TEST_FREQ_DEFAULT();
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const char MASTER_TAG[] = "test_master";
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const char SLAVE_TAG[] = "test_slave";
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DRAM_ATTR uint8_t spitest_master_send[] = {
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0x93, 0x34, 0x56, 0x78, 0x9a, 0xbc, 0xde, 0xf0, 0xaa, 0xcc, 0xff, 0xee, 0x55, 0x77, 0x88, 0x43,
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0x74,
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0x93, 0x34, 0x56, 0x78, 0x9a, 0xbc, 0xde, 0xf0, 0xaa, 0xcc, 0xff, 0xee, 0x55, 0x77, 0x88, 0x43,
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0x74,
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0x93, 0x34, 0x56, 0x78, 0x9a, 0xbc, 0xde, 0xf0, 0xaa, 0xcc, 0xff, 0xee, 0x55, 0x77, 0x88, 0x43,
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0x74,
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};
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DRAM_ATTR uint8_t spitest_slave_send[] = {
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0xaa, 0xdc, 0xba, 0x98, 0x76, 0x54, 0x32, 0x10, 0x13, 0x57, 0x9b, 0xdf, 0x24, 0x68, 0xac, 0xe0,
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0xda,
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0xaa, 0xdc, 0xba, 0x98, 0x76, 0x54, 0x32, 0x10, 0x13, 0x57, 0x9b, 0xdf, 0x24, 0x68, 0xac, 0xe0,
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0xda,
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0xaa, 0xdc, 0xba, 0x98, 0x76, 0x54, 0x32, 0x10, 0x13, 0x57, 0x9b, 0xdf, 0x24, 0x68, 0xac, 0xe0,
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0xda,
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};
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void spitest_def_param(void* arg)
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{
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spitest_param_set_t *param_set=(spitest_param_set_t*)arg;
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param_set->test_size = 8;
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if (param_set->freq_list==NULL) param_set->freq_list = test_freq_default;
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}
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/**********************************************************************************
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* functions for slave task
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*********************************************************************************/
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esp_err_t init_slave_context(spi_slave_task_context_t *context)
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{
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context->data_to_send = xQueueCreate( 16, sizeof( slave_txdata_t ));
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if ( context->data_to_send == NULL ) {
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return ESP_ERR_NO_MEM;
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}
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context->data_received = xRingbufferCreate( 1024, RINGBUF_TYPE_NOSPLIT );
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if ( context->data_received == NULL ) {
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return ESP_ERR_NO_MEM;
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}
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context->spi=TEST_SLAVE_HOST;
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return ESP_OK;
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}
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void deinit_slave_context(spi_slave_task_context_t *context)
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{
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TEST_ASSERT( context->data_to_send != NULL );
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vQueueDelete( context->data_to_send );
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context->data_to_send = NULL;
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TEST_ASSERT( context->data_received != NULL );
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vRingbufferDelete( context->data_received );
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context->data_received = NULL;
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}
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/* The task requires a queue and a ringbuf, which should be initialized before task starts.
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Send ``slave_txdata_t`` to the queue to make the task send data;
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the task returns data got to the ringbuf, which should have sufficient size.
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*/
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void spitest_slave_task(void* arg)
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{
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spi_slave_task_context_t* context = (spi_slave_task_context_t*) arg;
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QueueHandle_t queue = context->data_to_send;
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RingbufHandle_t ringbuf = context->data_received;
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uint8_t recvbuf[320+8];
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slave_txdata_t txdata;
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ESP_LOGI( SLAVE_TAG, "slave up" );
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//never quit, but blocked by the queue, waiting to be killed, when no more send from main task.
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while( 1 ) {
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BaseType_t ret = xQueueReceive( queue, &txdata, portMAX_DELAY );
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assert(ret);
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spi_slave_transaction_t t = {};
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t.length = txdata.len;
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t.tx_buffer = txdata.start;
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t.rx_buffer = recvbuf+8;
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//loop until trans_len != 0 to skip glitches
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do {
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TEST_ESP_OK( spi_slave_transmit( context->spi, &t, portMAX_DELAY ) );
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} while ( t.trans_len <= 2 );
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memcpy(recvbuf, &t.trans_len, sizeof(uint32_t));
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*(uint8_t**)(recvbuf+4) = (uint8_t*)txdata.start;
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ESP_LOGD( SLAVE_TAG, "received: %d", t.trans_len );
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xRingbufferSend( ringbuf, recvbuf, 8+(t.trans_len+7)/8, portMAX_DELAY );
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}
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}
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void slave_pull_up(const spi_bus_config_t* cfg, int spics_io_num)
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{
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gpio_set_pull_mode(cfg->mosi_io_num, GPIO_PULLUP_ONLY);
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gpio_set_pull_mode(cfg->sclk_io_num, GPIO_PULLUP_ONLY);
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gpio_set_pull_mode(spics_io_num, GPIO_PULLUP_ONLY);
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}
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/**********************************************************************************
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* functions for slave task
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*********************************************************************************/
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static int test_len[] = {1, 3, 5, 7, 9, 11, 33, 64};
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void spitest_init_transactions(const spitest_param_set_t *cfg, spitest_context_t* context)
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{
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spi_transaction_t* trans = context->master_trans;
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uint8_t *rx_buf_ptr = context->master_rxbuf;
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const spi_dup_t dup = cfg->dup;
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for (int i = 0; i < cfg->test_size; i++) {
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const void* tx_buffer = spitest_master_send + i%8;
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int length = 8*test_len[i];
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if (cfg->length_aligned) length = (length+31)&(~31);
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if (dup == HALF_DUPLEX_MISO) {
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trans[i] = (spi_transaction_t) {
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.rx_buffer = rx_buf_ptr,
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.rxlength = length,
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};
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} else if (dup == HALF_DUPLEX_MOSI) {
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trans[i] = (spi_transaction_t) {
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.tx_buffer = tx_buffer,
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.length = length,
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};
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} else {
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trans[i] = (spi_transaction_t) {
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.tx_buffer = tx_buffer,
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.length = length,
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.rx_buffer = rx_buf_ptr,
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};
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}
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rx_buf_ptr = (uint8_t*)( (uint32_t)(rx_buf_ptr + (length+7)/8 + 3) & (~3));
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const void* slave_tx = spitest_slave_send + (cfg->slave_unaligned_addr? i%3: (i%3)*4);
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//prepare slave tx data
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context->slave_trans[i] = (slave_txdata_t) {
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.start = slave_tx,
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.len = 512,
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};
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if (cfg->slave_dma_chan != 0) context->slave_trans[i].len = 1024;
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}
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}
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void spitest_master_print_data(spi_transaction_t *t, int rxlength)
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{
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if (t->tx_buffer) ESP_LOG_BUFFER_HEX( "master tx", t->tx_buffer, t->length/8 );
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if (t->rx_buffer) ESP_LOG_BUFFER_HEX( "master rx", t->rx_buffer, rxlength/8 );
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}
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void spitest_slave_print_data(slave_rxdata_t *t, bool print_rxdata)
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{
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int rcv_len = (t->len+7)/8;
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ESP_LOGI(SLAVE_TAG, "trans_len: %d", t->len);
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ESP_LOG_BUFFER_HEX("slave tx", t->tx_start, rcv_len);
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if (print_rxdata) ESP_LOG_BUFFER_HEX("slave rx", t->data, rcv_len);
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}
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esp_err_t spitest_check_data(int len, spi_transaction_t *master_t, slave_rxdata_t *slave_t, bool check_master_data, bool check_slave_len, bool check_slave_data)
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{
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esp_err_t ret = ESP_OK;
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uint32_t rcv_len = slave_t->len;
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//currently the rcv_len can be in range of [t->length-1, t->length+3]
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if (check_slave_len &&
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(rcv_len < len - 1 || rcv_len > len + 4)) {
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ret = ESP_FAIL;
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}
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if (check_master_data &&
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memcmp(slave_t->tx_start, master_t->rx_buffer, (len + 7) / 8) != 0 ) {
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ret = ESP_FAIL;
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}
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if (check_slave_data &&
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memcmp(master_t->tx_buffer, slave_t->data, (len + 7) / 8) != 0 ) {
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ret = ESP_FAIL;
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}
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if (ret != ESP_OK) {
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ESP_LOGI(SLAVE_TAG, "slave_recv_len: %d", rcv_len);
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spitest_master_print_data(master_t, len);
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spitest_slave_print_data(slave_t, true);
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//already failed, try to use the TEST_ASSERT to output the reason...
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if (check_slave_len) {
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TEST_ASSERT(rcv_len >= len - 1 && rcv_len <= len + 4);
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}
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TEST_ASSERT_EQUAL_HEX8_ARRAY(slave_t->tx_start, master_t->rx_buffer, (len + 7) / 8);
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TEST_ASSERT_EQUAL_HEX8_ARRAY(master_t->tx_buffer, slave_t->data, (len + 7) / 8);
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}
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return ESP_OK;
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}
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void master_free_device_bus(spi_device_handle_t spi)
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{
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TEST_ESP_OK( spi_bus_remove_device(spi) );
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TEST_ESP_OK( spi_bus_free(TEST_SPI_HOST) );
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}
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void spitest_gpio_output_sel(uint32_t gpio_num, int func, uint32_t signal_idx)
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{
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PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[gpio_num], func);
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GPIO.func_out_sel_cfg[gpio_num].func_sel = signal_idx;
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}
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void spitest_gpio_input_sel(uint32_t gpio_num, int func, uint32_t signal_idx)
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{
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PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[gpio_num], func);
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GPIO.func_in_sel_cfg[signal_idx].func_sel = gpio_num;
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}
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//Note this cs_num is the ID of the connected devices' ID, e.g. if 2 devices are connected to the bus,
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//then the cs_num of the 1st and 2nd devices are 0 and 1 respectively.
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void same_pin_func_sel(spi_bus_config_t bus, spi_device_interface_config_t dev, uint8_t cs_num)
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{
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spitest_gpio_output_sel(bus.mosi_io_num, FUNC_GPIO, spi_periph_signal[TEST_SPI_HOST].spid_out);
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spitest_gpio_input_sel(bus.mosi_io_num, FUNC_GPIO, spi_periph_signal[TEST_SLAVE_HOST].spid_in);
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spitest_gpio_output_sel(bus.miso_io_num, FUNC_GPIO, spi_periph_signal[TEST_SLAVE_HOST].spiq_out);
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spitest_gpio_input_sel(bus.miso_io_num, FUNC_GPIO, spi_periph_signal[TEST_SPI_HOST].spiq_in);
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spitest_gpio_output_sel(dev.spics_io_num, FUNC_GPIO, spi_periph_signal[TEST_SPI_HOST].spics_out[cs_num]);
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spitest_gpio_input_sel(dev.spics_io_num, FUNC_GPIO, spi_periph_signal[TEST_SLAVE_HOST].spics_in);
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spitest_gpio_output_sel(bus.sclk_io_num, FUNC_GPIO, spi_periph_signal[TEST_SPI_HOST].spiclk_out);
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spitest_gpio_input_sel(bus.sclk_io_num, FUNC_GPIO, spi_periph_signal[TEST_SLAVE_HOST].spiclk_in);
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#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
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GPIO.func_in_sel_cfg[FSPIQ_IN_IDX].sig_in_sel = 1;
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#endif
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}
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