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f78c96a3d7
In the situation when bootloader was compiled for 240MHz, and app was compiled for 160MHz, and the chip is a revision 0 chip, the bootloader will assume that the application has also been running at 240MHz. This will cause the chip to lock up later. Modify this to use a run time check of DPORT_CPUPERIOD_SEL, which indicates which of the PLL frequencies was used. Closes https://github.com/espressif/esp-idf/issues/2731.