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f7755f4175
After we have the performance dashboard, we have more data and no longer depend on the threshold to ensure performance. Set looser performance thresholds to avoid CI failure.
105 lines
5.7 KiB
C
105 lines
5.7 KiB
C
#pragma once
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// AES-CBC hardware throughput (accounts for worst-case performance with PSRAM workaround)
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#define IDF_PERFORMANCE_MIN_AES_CBC_THROUGHPUT_MBSEC 8.2
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#define IDF_PERFORMANCE_MIN_AES_GCM_THROUGHPUT_MBSEC 0.5
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// SHA256 hardware throughput at 240MHz, threshold set lower than worst case
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#define IDF_PERFORMANCE_MIN_SHA256_THROUGHPUT_MBSEC 8.0
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// esp_sha() time to process 32KB of input data from RAM
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#define IDF_PERFORMANCE_MAX_TIME_SHA1_32KB 5000
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#define IDF_PERFORMANCE_MAX_TIME_SHA512_32KB 4500
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#define IDF_PERFORMANCE_MAX_RSA_2048KEY_PUBLIC_OP 19000
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#define IDF_PERFORMANCE_MAX_RSA_2048KEY_PRIVATE_OP 190000
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#define IDF_PERFORMANCE_MAX_RSA_4096KEY_PUBLIC_OP 90000
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#define IDF_PERFORMANCE_MAX_RSA_4096KEY_PRIVATE_OP 870000
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#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 30
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#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 27
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/*
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* Flash Performance value
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* 4 subsections: legacy, normal (new driver after v4.0), SPI1 (external but on SPI1), external (SPI2)
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* These thresholds are set to about 70% of the average test data, under certain condition.
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* Contact Espressif for details.
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*/
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B
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//The single_core config is much faster than other configs. Use the value of other configs
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//Collect data and correct it later
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B 0
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B
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//The single_core config is much faster than other configs. Use the value of other configs
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B 35300
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB (697*1000)
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB (6780*1000)
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE
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//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE 11200
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B
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//The single_core config is much faster than other configs. Use the value of other configs
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B 20100
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B
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//The single_core config is much faster than other configs. Use the value of other configs
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B 35200
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB (754*1000)
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB (6650*1000)
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE
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//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE 45300
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B
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//The single_core config is much faster than other configs. Use the value of other configs
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B 16200
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B
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//The single_core config is much faster than other configs. Use the value of other configs
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B 33600
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB (484*1000)
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB (1512*1000)
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE
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//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE 49600
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B 73500
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B (261*1000)
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB (470*1000)
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB (261*1000)
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE
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//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE 30900
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#endif
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// floating point instructions per divide and per sqrt (configured for worst-case with PSRAM workaround)
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#define IDF_PERFORMANCE_MAX_CYCLES_PER_DIV 70
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#define IDF_PERFORMANCE_MAX_CYCLES_PER_SQRT 140
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