Ivan Grokhotkov f355ecac40
ci(sdspi): re-enable probe/rw tests for slot 1
These tests were disabled since SDMMC_FREQ_HIGHSPEED with sdspi didn't
work on ESP32 and ESP32-S3. However we don't have other tests for
slot 1, meaning that we weren't running probe and perf tests at all.

This commit re-enables the tests, keeping them with SDMMC_FREQ_DEFAULT
2024-05-02 16:44:16 +02:00
..

Supported Targets ESP32 ESP32-C2 ESP32-C3 ESP32-C6 ESP32-H2 ESP32-P4 ESP32-S2 ESP32-S3